Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

tools/power turbostat: Rename "LLCkRPS" column to "LLCMRPS"

The purpose of the LLC References per Second LLC column
is to qualify the significance of the LLC%hit column.

If RPS is high, then the hit rate matters.
If RPS is low, then the hit rate is not significant.

Remove unnecessary and distracting precision in the RPS column
by dividing my a million rather than by a thousand.

Signed-off-by: Len Brown <len.brown@intel.com>

Len Brown 041e9759 785953cf

+16 -16
+1 -1
tools/power/x86/turbostat/turbostat.8
··· 161 161 .PP 162 162 \fBSMI\fP The number of System Management Interrupts serviced CPU during the measurement interval. While this counter is actually per-CPU, SMI are triggered on all processors, so the number should be the same for all CPUs. 163 163 .PP 164 - \fBLLCkRPS\fP Last Level Cache Thousands of References Per Second. For CPUs with an L3 LLC, this is the number of references that CPU made to the L3 (and the number of misses that CPU made to it's L2). For CPUs with an L2 LLC, this is the number of references to the L2 (and the number of misses to the CPU's L1). The system summary row shows the sum for all CPUs. In both cases, the value displayed is the actual value divided by 1000 in the interest of usually fitting into 8 columns. 164 + \fBLLCMRPS\fP Last Level Cache Millions of References Per Second. For CPUs with an L3 LLC, this is the number of references that CPU made to the L3 (and the number of misses that CPU made to it's L2). For CPUs with an L2 LLC, this is the number of references to the L2 (and the number of misses to the CPU's L1). The system summary row shows the sum for all CPUs. In both cases, the value displayed is the actual value divided by 1,000,000. If this value is large, then the LLC%hit column is significant. If this value is small, then the LLC%hit column is not significant. 165 165 .PP 166 166 \fBLLC%hit\fP Last Level Cache Hit Rate %. Hit Rate Percent = 100.0 * (References - Misses)/References. The system summary row shows the weighted average for all CPUs (100.0 * (Sum_References - Sum_Misses)/Sum_References). 167 167 .PP
+15 -15
tools/power/x86/turbostat/turbostat.c
··· 210 210 { 0x0, "NMI", NULL, 0, 0, 0, NULL, 0 }, 211 211 { 0x0, "CPU%c1e", NULL, 0, 0, 0, NULL, 0 }, 212 212 { 0x0, "pct_idle", NULL, 0, 0, 0, NULL, 0 }, 213 - { 0x0, "LLCkRPS", NULL, 0, 0, 0, NULL, 0 }, 213 + { 0x0, "LLCMRPS", NULL, 0, 0, 0, NULL, 0 }, 214 214 { 0x0, "LLC%hit", NULL, 0, 0, 0, NULL, 0 }, 215 215 }; 216 216 ··· 281 281 BIC_NMI, 282 282 BIC_CPU_c1e, 283 283 BIC_pct_idle, 284 - BIC_LLC_RPS, 284 + BIC_LLC_MRPS, 285 285 BIC_LLC_HIT, 286 286 MAX_BIC 287 287 }; ··· 424 424 SET_BIC(BIC_pct_idle, &bic_group_idle); 425 425 426 426 BIC_INIT(&bic_group_cache); 427 - SET_BIC(BIC_LLC_RPS, &bic_group_cache); 427 + SET_BIC(BIC_LLC_MRPS, &bic_group_cache); 428 428 SET_BIC(BIC_LLC_HIT, &bic_group_cache); 429 429 430 430 BIC_INIT(&bic_group_other); ··· 2440 2440 static void bic_disable_perf_access(void) 2441 2441 { 2442 2442 CLR_BIC(BIC_IPC, &bic_enabled); 2443 - CLR_BIC(BIC_LLC_RPS, &bic_enabled); 2443 + CLR_BIC(BIC_LLC_MRPS, &bic_enabled); 2444 2444 CLR_BIC(BIC_LLC_HIT, &bic_enabled); 2445 2445 } 2446 2446 ··· 2814 2814 if (DO_BIC(BIC_SMI)) 2815 2815 outp += sprintf(outp, "%sSMI", (printed++ ? delim : "")); 2816 2816 2817 - if (DO_BIC(BIC_LLC_RPS)) 2818 - outp += sprintf(outp, "%sLLCkRPS", (printed++ ? delim : "")); 2817 + if (DO_BIC(BIC_LLC_MRPS)) 2818 + outp += sprintf(outp, "%sLLCMRPS", (printed++ ? delim : "")); 2819 2819 2820 2820 if (DO_BIC(BIC_LLC_HIT)) 2821 2821 outp += sprintf(outp, "%sLLC%%hit", (printed++ ? delim : "")); ··· 3306 3306 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count); 3307 3307 3308 3308 /* LLC Stats */ 3309 - if (DO_BIC(BIC_LLC_RPS) || DO_BIC(BIC_LLC_HIT)) { 3310 - if (DO_BIC(BIC_LLC_RPS)) 3311 - outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), t->llc.references / interval_float / 1000); 3309 + if (DO_BIC(BIC_LLC_MRPS) || DO_BIC(BIC_LLC_HIT)) { 3310 + if (DO_BIC(BIC_LLC_MRPS)) 3311 + outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), t->llc.references / interval_float / 1000000); 3312 3312 3313 3313 if (DO_BIC(BIC_LLC_HIT)) 3314 3314 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), pct((t->llc.references - t->llc.misses), t->llc.references)); ··· 3855 3855 if (DO_BIC(BIC_SMI)) 3856 3856 old->smi_count = new->smi_count - old->smi_count; 3857 3857 3858 - if (DO_BIC(BIC_LLC_RPS)) 3858 + if (DO_BIC(BIC_LLC_MRPS)) 3859 3859 old->llc.references = new->llc.references - old->llc.references; 3860 3860 3861 3861 if (DO_BIC(BIC_LLC_HIT)) ··· 5067 5067 5068 5068 get_smi_aperf_mperf(cpu, t); 5069 5069 5070 - if (DO_BIC(BIC_LLC_RPS) || DO_BIC(BIC_LLC_HIT)) 5070 + if (DO_BIC(BIC_LLC_MRPS) || DO_BIC(BIC_LLC_HIT)) 5071 5071 get_perf_llc_stats(cpu, &t->llc); 5072 5072 5073 5073 if (DO_BIC(BIC_IPC)) ··· 8344 8344 if (fd_instr_count_percpu == NULL) 8345 8345 err(-1, "calloc fd_instr_count_percpu"); 8346 8346 } 8347 - if (BIC_IS_ENABLED(BIC_LLC_RPS)) { 8347 + if (BIC_IS_ENABLED(BIC_LLC_MRPS)) { 8348 8348 fd_llc_percpu = calloc(topo.max_cpu_num + 1, sizeof(int)); 8349 8349 if (fd_llc_percpu == NULL) 8350 8350 err(-1, "calloc fd_llc_percpu"); ··· 9066 9066 9067 9067 if (no_perf) 9068 9068 return; 9069 - if (!(BIC_IS_ENABLED(BIC_LLC_RPS) && BIC_IS_ENABLED(BIC_LLC_HIT))) 9069 + if (!(BIC_IS_ENABLED(BIC_LLC_MRPS) && BIC_IS_ENABLED(BIC_LLC_HIT))) 9070 9070 return; 9071 9071 9072 9072 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) { ··· 9089 9089 return; 9090 9090 } 9091 9091 } 9092 - BIC_PRESENT(BIC_LLC_RPS); 9092 + BIC_PRESENT(BIC_LLC_MRPS); 9093 9093 BIC_PRESENT(BIC_LLC_HIT); 9094 9094 } 9095 9095 ··· 9518 9518 if (!has_perf_instr_count_access()) 9519 9519 no_perf = 1; 9520 9520 9521 - if (BIC_IS_ENABLED(BIC_LLC_RPS) || BIC_IS_ENABLED(BIC_LLC_HIT)) 9521 + if (BIC_IS_ENABLED(BIC_LLC_MRPS) || BIC_IS_ENABLED(BIC_LLC_HIT)) 9522 9522 if (!has_perf_llc_access()) 9523 9523 no_perf = 1; 9524 9524