Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
perf/arm_cspmu: Add pmpidr support
The PMIIDR value is composed by the values in PMPIDR registers.
We can use PMPIDR registers as alternative for device
identification for systems that do not implement PMIIDR.
Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Signed-off-by: Will Deacon <will@kernel.org>
authored by
Besar Wicaksono
and committed by
Will Deacon
04330be8
a2573bc7
+75
-6
+41
-3
drivers/perf/arm_cspmu/arm_cspmu.c
+41
-3
drivers/perf/arm_cspmu/arm_cspmu.c
···
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{
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.module_name = "nvidia_cspmu",
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.pmiidr_val = ARM_CSPMU_IMPL_ID_NVIDIA,
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-
.pmiidr_mask = ARM_CSPMU_PMIIDR_IMPLEMENTER,
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.pmiidr_mask = PMIIDR_IMPLEMENTER,
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.module = NULL,
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.impl_init_ops = NULL,
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},
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{
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.module_name = "ampere_cspmu",
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.pmiidr_val = ARM_CSPMU_IMPL_ID_AMPERE,
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-
.pmiidr_mask = ARM_CSPMU_PMIIDR_IMPLEMENTER,
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.pmiidr_mask = PMIIDR_IMPLEMENTER,
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.module = NULL,
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.impl_init_ops = NULL,
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},
···
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return NULL;
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}
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+
static u32 arm_cspmu_get_pmiidr(struct arm_cspmu *cspmu)
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{
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u32 pmiidr, pmpidr;
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pmiidr = readl(cspmu->base0 + PMIIDR);
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+
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if (pmiidr != 0)
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return pmiidr;
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/* Construct PMIIDR value from PMPIDRs. */
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pmpidr = readl(cspmu->base0 + PMPIDR0);
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pmiidr |= FIELD_PREP(PMIIDR_PRODUCTID_PART_0,
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FIELD_GET(PMPIDR0_PART_0, pmpidr));
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+
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pmpidr = readl(cspmu->base0 + PMPIDR1);
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pmiidr |= FIELD_PREP(PMIIDR_PRODUCTID_PART_1,
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FIELD_GET(PMPIDR1_PART_1, pmpidr));
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pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_0,
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FIELD_GET(PMPIDR1_DES_0, pmpidr));
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+
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pmpidr = readl(cspmu->base0 + PMPIDR2);
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pmiidr |= FIELD_PREP(PMIIDR_VARIANT,
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FIELD_GET(PMPIDR2_REVISION, pmpidr));
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pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_1,
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FIELD_GET(PMPIDR2_DES_1, pmpidr));
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+
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pmpidr = readl(cspmu->base0 + PMPIDR3);
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pmiidr |= FIELD_PREP(PMIIDR_REVISION,
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FIELD_GET(PMPIDR3_REVAND, pmpidr));
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pmpidr = readl(cspmu->base0 + PMPIDR4);
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pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_2,
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FIELD_GET(PMPIDR4_DES_2, pmpidr));
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return pmiidr;
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}
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+
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#define DEFAULT_IMPL_OP(name) .name = arm_cspmu_##name
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static int arm_cspmu_init_impl_ops(struct arm_cspmu *cspmu)
···
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/* Start with a default PMU implementation */
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cspmu->impl.module = THIS_MODULE;
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-
cspmu->impl.pmiidr = readl(cspmu->base0 + PMIIDR);
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cspmu->impl.pmiidr = arm_cspmu_get_pmiidr(cspmu);
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cspmu->impl.ops = (struct arm_cspmu_impl_ops) {
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DEFAULT_IMPL_OP(get_event_attrs),
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DEFAULT_IMPL_OP(get_format_attrs),
+33
-2
drivers/perf/arm_cspmu/arm_cspmu.h
+33
-2
drivers/perf/arm_cspmu/arm_cspmu.h
···
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#define PMCFGR 0xE00
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#define PMCR 0xE04
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#define PMIIDR 0xE08
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#define PMPIDR0 0xFE0
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#define PMPIDR1 0xFE4
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#define PMPIDR2 0xFE8
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#define PMPIDR3 0xFEC
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#define PMPIDR4 0xFD0
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/* PMCFGR register field */
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#define PMCFGR_NCG GENMASK(31, 28)
···
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#define PMCR_E BIT(0)
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/* PMIIDR register field */
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-
#define ARM_CSPMU_PMIIDR_IMPLEMENTER GENMASK(11, 0)
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#define ARM_CSPMU_PMIIDR_PRODUCTID GENMASK(31, 20)
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#define PMIIDR_IMPLEMENTER GENMASK(11, 0)
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#define PMIIDR_IMPLEMENTER_DES_0 GENMASK(3, 0)
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#define PMIIDR_IMPLEMENTER_DES_1 GENMASK(6, 4)
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#define PMIIDR_IMPLEMENTER_DES_2 GENMASK(11, 8)
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#define PMIIDR_REVISION GENMASK(15, 12)
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#define PMIIDR_VARIANT GENMASK(19, 16)
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#define PMIIDR_PRODUCTID GENMASK(31, 20)
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#define PMIIDR_PRODUCTID_PART_0 GENMASK(27, 20)
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#define PMIIDR_PRODUCTID_PART_1 GENMASK(31, 28)
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/* PMPIDR0 register field */
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#define PMPIDR0_PART_0 GENMASK(7, 0)
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/* PMPIDR1 register field */
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#define PMPIDR1_DES_0 GENMASK(7, 4)
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#define PMPIDR1_PART_1 GENMASK(3, 0)
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/* PMPIDR2 register field */
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#define PMPIDR2_REVISION GENMASK(7, 4)
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#define PMPIDR2_DES_1 GENMASK(2, 0)
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/* PMPIDR3 register field */
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#define PMPIDR3_REVAND GENMASK(7, 4)
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#define PMPIDR3_CMOD GENMASK(3, 0)
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/* PMPIDR4 register field */
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#define PMPIDR4_SIZE GENMASK(7, 4)
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#define PMPIDR4_DES_2 GENMASK(3, 0)
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/* JEDEC-assigned JEP106 identification code */
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#define ARM_CSPMU_IMPL_ID_NVIDIA 0x36B
+1
-1
drivers/perf/arm_cspmu/nvidia_cspmu.c
+1
-1
drivers/perf/arm_cspmu/nvidia_cspmu.c