Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mips-fixes_6.4_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fixes from Thomas Bogendoerfer:
- fixes to get alchemy platform back in shape
- fix for initrd detection
* tag 'mips-fixes_6.4_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
mips: Move initrd_start check after initrd address sanitisation.
MIPS: Alchemy: fix dbdma2
MIPS: Restore Au1300 support
MIPS: unhide PATA_PLATFORM
+26
-16
+1
arch/mips/Kconfig
+1
arch/mips/Kconfig
+15
-12
arch/mips/alchemy/common/dbdma.c
+15
-12
arch/mips/alchemy/common/dbdma.c
···
30
30
*
31
31
*/
32
32
33
+
#include <linux/dma-map-ops.h> /* for dma_default_coherent */
33
34
#include <linux/init.h>
34
35
#include <linux/kernel.h>
35
36
#include <linux/slab.h>
···
624
623
dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
625
624
626
625
/*
627
-
* There is an errata on the Au1200/Au1550 parts that could result
628
-
* in "stale" data being DMA'ed. It has to do with the snoop logic on
629
-
* the cache eviction buffer. DMA_NONCOHERENT is on by default for
630
-
* these parts. If it is fixed in the future, these dma_cache_inv will
631
-
* just be nothing more than empty macros. See io.h.
626
+
* There is an erratum on certain Au1200/Au1550 revisions that could
627
+
* result in "stale" data being DMA'ed. It has to do with the snoop
628
+
* logic on the cache eviction buffer. dma_default_coherent is set
629
+
* to false on these parts.
632
630
*/
633
-
dma_cache_wback_inv((unsigned long)buf, nbytes);
631
+
if (!dma_default_coherent)
632
+
dma_cache_wback_inv(KSEG0ADDR(buf), nbytes);
634
633
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
635
634
wmb(); /* drain writebuffer */
636
635
dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
637
636
ctp->chan_ptr->ddma_dbell = 0;
637
+
wmb(); /* force doorbell write out to dma engine */
638
638
639
639
/* Get next descriptor pointer. */
640
640
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
···
687
685
dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
688
686
#endif
689
687
/*
690
-
* There is an errata on the Au1200/Au1550 parts that could result in
691
-
* "stale" data being DMA'ed. It has to do with the snoop logic on the
692
-
* cache eviction buffer. DMA_NONCOHERENT is on by default for these
693
-
* parts. If it is fixed in the future, these dma_cache_inv will just
694
-
* be nothing more than empty macros. See io.h.
688
+
* There is an erratum on certain Au1200/Au1550 revisions that could
689
+
* result in "stale" data being DMA'ed. It has to do with the snoop
690
+
* logic on the cache eviction buffer. dma_default_coherent is set
691
+
* to false on these parts.
695
692
*/
696
-
dma_cache_inv((unsigned long)buf, nbytes);
693
+
if (!dma_default_coherent)
694
+
dma_cache_inv(KSEG0ADDR(buf), nbytes);
697
695
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
698
696
wmb(); /* drain writebuffer */
699
697
dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
700
698
ctp->chan_ptr->ddma_dbell = 0;
699
+
wmb(); /* force doorbell write out to dma engine */
701
700
702
701
/* Get next descriptor pointer. */
703
702
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
+5
arch/mips/kernel/cpu-probe.c
+5
arch/mips/kernel/cpu-probe.c
···
1502
1502
break;
1503
1503
}
1504
1504
break;
1505
+
case PRID_IMP_NETLOGIC_AU13XX:
1506
+
c->cputype = CPU_ALCHEMY;
1507
+
__cpu_name[cpu] = "Au1300";
1508
+
break;
1505
1509
}
1506
1510
}
1507
1511
···
1867
1863
cpu_probe_mips(c, cpu);
1868
1864
break;
1869
1865
case PRID_COMP_ALCHEMY:
1866
+
case PRID_COMP_NETLOGIC:
1870
1867
cpu_probe_alchemy(c, cpu);
1871
1868
break;
1872
1869
case PRID_COMP_SIBYTE:
+5
-4
arch/mips/kernel/setup.c
+5
-4
arch/mips/kernel/setup.c
···
158
158
pr_err("initrd start must be page aligned\n");
159
159
goto disable;
160
160
}
161
-
if (initrd_start < PAGE_OFFSET) {
162
-
pr_err("initrd start < PAGE_OFFSET\n");
163
-
goto disable;
164
-
}
165
161
166
162
/*
167
163
* Sanitize initrd addresses. For example firmware
···
169
173
end = __pa(initrd_end);
170
174
initrd_end = (unsigned long)__va(end);
171
175
initrd_start = (unsigned long)__va(__pa(initrd_start));
176
+
177
+
if (initrd_start < PAGE_OFFSET) {
178
+
pr_err("initrd start < PAGE_OFFSET\n");
179
+
goto disable;
180
+
}
172
181
173
182
ROOT_DEV = Root_RAM0;
174
183
return PFN_UP(end);