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drm/i915/dram: move fsb_freq and mem_freq to dram info

Store fsb_freq and mem_freq in dram info the same way we do for other
memory info on later platforms for a slightly more unified approach.

This allows us to remove fsb_freq, mem_freq and is_ddr3 members from
struct drm_i915_private and struct xe_device.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/a38c4b105ba9098fa0b128cb86cd4eb63bcc27e8.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Jani Nikula 0492e13e 10e656f8

+26 -30
+8 -5
drivers/gpu/drm/i915/display/i9xx_wm.c
··· 3 3 * Copyright © 2023 Intel Corporation 4 4 */ 5 5 6 + #include "soc/intel_dram.h" 7 + 6 8 #include "i915_drv.h" 7 9 #include "i915_reg.h" 8 10 #include "i9xx_wm.h" ··· 87 85 88 86 static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display) 89 87 { 90 - struct drm_i915_private *i915 = to_i915(display->drm); 88 + const struct dram_info *dram_info = intel_dram_info(display->drm); 89 + bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3; 91 90 int i; 92 91 93 92 for (i = 0; i < ARRAY_SIZE(cxsr_latency_table); i++) { ··· 96 93 bool is_desktop = !display->platform.mobile; 97 94 98 95 if (is_desktop == latency->is_desktop && 99 - i915->is_ddr3 == latency->is_ddr3 && 100 - DIV_ROUND_CLOSEST(i915->fsb_freq, 1000) == latency->fsb_freq && 101 - DIV_ROUND_CLOSEST(i915->mem_freq, 1000) == latency->mem_freq) 96 + is_ddr3 == latency->is_ddr3 && 97 + DIV_ROUND_CLOSEST(dram_info->fsb_freq, 1000) == latency->fsb_freq && 98 + DIV_ROUND_CLOSEST(dram_info->mem_freq, 1000) == latency->mem_freq) 102 99 return latency; 103 100 } 104 101 105 102 drm_dbg_kms(display->drm, 106 103 "Could not find CxSR latency for DDR%s, FSB %u kHz, MEM %u kHz\n", 107 - i915->is_ddr3 ? "3" : "2", i915->fsb_freq, i915->mem_freq); 104 + is_ddr3 ? "3" : "2", dram_info->fsb_freq, dram_info->mem_freq); 108 105 109 106 return NULL; 110 107 }
-2
drivers/gpu/drm/i915/i915_drv.h
··· 239 239 240 240 bool preserve_bios_swizzle; 241 241 242 - unsigned int fsb_freq, mem_freq, is_ddr3; 243 - 244 242 unsigned int hpll_freq; 245 243 unsigned int czclk_freq; 246 244
+16 -22
drivers/gpu/drm/i915/soc/intel_dram.c
··· 150 150 return 0; 151 151 } 152 152 153 - static void detect_mem_freq(struct drm_i915_private *i915) 154 - { 155 - i915->mem_freq = intel_mem_freq(i915); 156 - 157 - if (IS_PINEVIEW(i915)) 158 - i915->is_ddr3 = pnv_is_ddr3(i915); 159 - 160 - if (i915->mem_freq) 161 - drm_dbg(&i915->drm, "DDR speed: %d kHz\n", i915->mem_freq); 162 - } 163 - 164 153 static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915) 165 154 { 166 155 u32 fsb; ··· 242 253 return 0; 243 254 } 244 255 245 - static void detect_fsb_freq(struct drm_i915_private *i915) 256 + static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info) 246 257 { 247 - i915->fsb_freq = intel_fsb_freq(i915); 248 - if (i915->fsb_freq) 249 - drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", i915->fsb_freq); 258 + dram_info->fsb_freq = intel_fsb_freq(i915); 259 + if (dram_info->fsb_freq) 260 + drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq); 261 + 262 + dram_info->mem_freq = intel_mem_freq(i915); 263 + if (dram_info->mem_freq) 264 + drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq); 265 + 266 + if (IS_PINEVIEW(i915) && pnv_is_ddr3(i915)) 267 + dram_info->type = INTEL_DRAM_DDR3; 268 + 269 + return 0; 250 270 } 251 271 252 272 static int intel_dimm_num_devices(const struct dram_dimm_info *dimm) ··· 728 730 if (IS_DG2(i915) || !HAS_DISPLAY(display)) 729 731 return 0; 730 732 731 - detect_fsb_freq(i915); 732 - detect_mem_freq(i915); 733 - 734 - if (GRAPHICS_VER(i915) < 9) 735 - return 0; 736 - 737 733 dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL); 738 734 if (!dram_info) 739 735 return -ENOMEM; ··· 748 756 ret = gen11_get_dram_info(i915, dram_info); 749 757 else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915)) 750 758 ret = bxt_get_dram_info(i915, dram_info); 751 - else 759 + else if (GRAPHICS_VER(i915) >= 9) 752 760 ret = skl_get_dram_info(i915, dram_info); 761 + else 762 + ret = i915_get_dram_info(i915, dram_info); 753 763 754 764 drm_dbg_kms(&i915->drm, "DRAM type: %s\n", 755 765 intel_dram_type_str(dram_info->type));
+2
drivers/gpu/drm/i915/soc/intel_dram.h
··· 29 29 } type; 30 30 u8 num_qgv_points; 31 31 u8 num_psf_gv_points; 32 + unsigned int fsb_freq; 33 + unsigned int mem_freq; 32 34 }; 33 35 34 36 void intel_dram_edram_detect(struct drm_i915_private *i915);
-1
drivers/gpu/drm/xe/xe_device_types.h
··· 621 621 struct { 622 622 unsigned int hpll_freq; 623 623 unsigned int czclk_freq; 624 - unsigned int fsb_freq, mem_freq, is_ddr3; 625 624 }; 626 625 #endif 627 626 };