Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: codecs: tx-macro: split widgets per different LPASS versions
TX macro codec differs slightly between different Qualcomm Low Power
Audio SubSystem (LPASS) block versions. In LPASS version 9.2 the
register responsible for TX SMIC MUXn muxes is different, thus to
properly support it, the driver needs to register different widgets per
different LPASS version.
Prepare for supporting this register difference by refactoring existing
code:
1. Move few widgets (TX SMIC MUXn, TX SWR_ADCn, TX SWR_DMICn) out of
common 'tx_macro_dapm_widgets[]' array to a new per-variant specific
array 'tx_macro_dapm_widgets_v9[]'.
2. Move also related audio routes into new array.
3. Store pointers to these variant-specific arrays in new variant-data
structure 'tx_macro_data'.
4. Add variant-specific widgets and routes in component probe, instead
of driver probe.
The change should have no real impact, except re-shuffling code and
registering some widgets and audio routes in component probe, instead of
driver probe.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240226115925.53953-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Krzysztof Kozlowski
and committed by
Mark Brown
051e8872
0c4ebb28
+232
-151
+6
sound/soc/codecs/lpass-macro-common.h
+6
sound/soc/codecs/lpass-macro-common.h
···
11
11
/* The soundwire block should be internally reset at probe */
12
12
#define LPASS_MACRO_FLAG_RESET_SWR BIT(1)
13
13
14
+
enum lpass_version {
15
+
LPASS_VER_9_0_0,
16
+
LPASS_VER_10_0_0,
17
+
LPASS_VER_11_0_0,
18
+
};
19
+
14
20
struct lpass_macro {
15
21
struct device *macro_pd;
16
22
struct device *dcodec_pd;
+226
-151
sound/soc/codecs/lpass-tx-macro.c
+226
-151
sound/soc/codecs/lpass-tx-macro.c
···
255
255
struct delayed_work dwork;
256
256
};
257
257
258
+
struct tx_macro_data {
259
+
unsigned int flags;
260
+
unsigned int ver;
261
+
const struct snd_soc_dapm_widget *extra_widgets;
262
+
size_t extra_widgets_num;
263
+
const struct snd_soc_dapm_route *extra_routes;
264
+
size_t extra_routes_num;
265
+
};
266
+
258
267
struct tx_macro {
259
268
struct device *dev;
269
+
const struct tx_macro_data *data;
260
270
struct snd_soc_component *component;
261
271
struct hpf_work tx_hpf_work[NUM_DECIMATORS];
262
272
struct tx_mute_work tx_mute_dwork[NUM_DECIMATORS];
···
1247
1237
static const struct snd_kcontrol_new tx_dec6_mux = SOC_DAPM_ENUM("tx_dec6", tx_dec6_enum);
1248
1238
static const struct snd_kcontrol_new tx_dec7_mux = SOC_DAPM_ENUM("tx_dec7", tx_dec7_enum);
1249
1239
1250
-
static const char * const smic_mux_text[] = {
1251
-
"ZERO", "ADC0", "ADC1", "ADC2", "ADC3", "SWR_DMIC0",
1252
-
"SWR_DMIC1", "SWR_DMIC2", "SWR_DMIC3", "SWR_DMIC4",
1253
-
"SWR_DMIC5", "SWR_DMIC6", "SWR_DMIC7"
1254
-
};
1255
-
1256
-
static SOC_ENUM_SINGLE_DECL(tx_smic0_enum, CDC_TX_INP_MUX_ADC_MUX0_CFG0,
1257
-
0, smic_mux_text);
1258
-
1259
-
static SOC_ENUM_SINGLE_DECL(tx_smic1_enum, CDC_TX_INP_MUX_ADC_MUX1_CFG0,
1260
-
0, smic_mux_text);
1261
-
1262
-
static SOC_ENUM_SINGLE_DECL(tx_smic2_enum, CDC_TX_INP_MUX_ADC_MUX2_CFG0,
1263
-
0, smic_mux_text);
1264
-
1265
-
static SOC_ENUM_SINGLE_DECL(tx_smic3_enum, CDC_TX_INP_MUX_ADC_MUX3_CFG0,
1266
-
0, smic_mux_text);
1267
-
1268
-
static SOC_ENUM_SINGLE_DECL(tx_smic4_enum, CDC_TX_INP_MUX_ADC_MUX4_CFG0,
1269
-
0, smic_mux_text);
1270
-
1271
-
static SOC_ENUM_SINGLE_DECL(tx_smic5_enum, CDC_TX_INP_MUX_ADC_MUX5_CFG0,
1272
-
0, smic_mux_text);
1273
-
1274
-
static SOC_ENUM_SINGLE_DECL(tx_smic6_enum, CDC_TX_INP_MUX_ADC_MUX6_CFG0,
1275
-
0, smic_mux_text);
1276
-
1277
-
static SOC_ENUM_SINGLE_DECL(tx_smic7_enum, CDC_TX_INP_MUX_ADC_MUX7_CFG0,
1278
-
0, smic_mux_text);
1279
-
1280
-
static const struct snd_kcontrol_new tx_smic0_mux = SOC_DAPM_ENUM_EXT("tx_smic0", tx_smic0_enum,
1281
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1282
-
static const struct snd_kcontrol_new tx_smic1_mux = SOC_DAPM_ENUM_EXT("tx_smic1", tx_smic1_enum,
1283
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1284
-
static const struct snd_kcontrol_new tx_smic2_mux = SOC_DAPM_ENUM_EXT("tx_smic2", tx_smic2_enum,
1285
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1286
-
static const struct snd_kcontrol_new tx_smic3_mux = SOC_DAPM_ENUM_EXT("tx_smic3", tx_smic3_enum,
1287
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1288
-
static const struct snd_kcontrol_new tx_smic4_mux = SOC_DAPM_ENUM_EXT("tx_smic4", tx_smic4_enum,
1289
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1290
-
static const struct snd_kcontrol_new tx_smic5_mux = SOC_DAPM_ENUM_EXT("tx_smic5", tx_smic5_enum,
1291
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1292
-
static const struct snd_kcontrol_new tx_smic6_mux = SOC_DAPM_ENUM_EXT("tx_smic6", tx_smic6_enum,
1293
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1294
-
static const struct snd_kcontrol_new tx_smic7_mux = SOC_DAPM_ENUM_EXT("tx_smic7", tx_smic7_enum,
1295
-
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1296
-
1297
1240
static const char * const dmic_mux_text[] = {
1298
1241
"ZERO", "DMIC0", "DMIC1", "DMIC2", "DMIC3",
1299
1242
"DMIC4", "DMIC5", "DMIC6", "DMIC7"
···
1392
1429
SND_SOC_DAPM_MIXER("TX_AIF3_CAP Mixer", SND_SOC_NOPM, TX_MACRO_AIF3_CAP, 0,
1393
1430
tx_aif3_cap_mixer, ARRAY_SIZE(tx_aif3_cap_mixer)),
1394
1431
1395
-
SND_SOC_DAPM_MUX("TX SMIC MUX0", SND_SOC_NOPM, 0, 0, &tx_smic0_mux),
1396
-
SND_SOC_DAPM_MUX("TX SMIC MUX1", SND_SOC_NOPM, 0, 0, &tx_smic1_mux),
1397
-
SND_SOC_DAPM_MUX("TX SMIC MUX2", SND_SOC_NOPM, 0, 0, &tx_smic2_mux),
1398
-
SND_SOC_DAPM_MUX("TX SMIC MUX3", SND_SOC_NOPM, 0, 0, &tx_smic3_mux),
1399
-
SND_SOC_DAPM_MUX("TX SMIC MUX4", SND_SOC_NOPM, 0, 0, &tx_smic4_mux),
1400
-
SND_SOC_DAPM_MUX("TX SMIC MUX5", SND_SOC_NOPM, 0, 0, &tx_smic5_mux),
1401
-
SND_SOC_DAPM_MUX("TX SMIC MUX6", SND_SOC_NOPM, 0, 0, &tx_smic6_mux),
1402
-
SND_SOC_DAPM_MUX("TX SMIC MUX7", SND_SOC_NOPM, 0, 0, &tx_smic7_mux),
1403
-
1404
1432
SND_SOC_DAPM_MUX("TX DMIC MUX0", SND_SOC_NOPM, 4, 0, &tx_dmic0_mux),
1405
1433
SND_SOC_DAPM_MUX("TX DMIC MUX1", SND_SOC_NOPM, 4, 0, &tx_dmic1_mux),
1406
1434
SND_SOC_DAPM_MUX("TX DMIC MUX2", SND_SOC_NOPM, 4, 0, &tx_dmic2_mux),
···
1401
1447
SND_SOC_DAPM_MUX("TX DMIC MUX6", SND_SOC_NOPM, 4, 0, &tx_dmic6_mux),
1402
1448
SND_SOC_DAPM_MUX("TX DMIC MUX7", SND_SOC_NOPM, 4, 0, &tx_dmic7_mux),
1403
1449
1404
-
SND_SOC_DAPM_INPUT("TX SWR_ADC0"),
1405
-
SND_SOC_DAPM_INPUT("TX SWR_ADC1"),
1406
-
SND_SOC_DAPM_INPUT("TX SWR_ADC2"),
1407
-
SND_SOC_DAPM_INPUT("TX SWR_ADC3"),
1408
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC0"),
1409
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC1"),
1410
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC2"),
1411
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC3"),
1412
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC4"),
1413
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC5"),
1414
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC6"),
1415
-
SND_SOC_DAPM_INPUT("TX SWR_DMIC7"),
1416
1450
SND_SOC_DAPM_INPUT("TX DMIC0"),
1417
1451
SND_SOC_DAPM_INPUT("TX DMIC1"),
1418
1452
SND_SOC_DAPM_INPUT("TX DMIC2"),
···
1522
1580
{"TX DMIC MUX0", "DMIC6", "TX DMIC6"},
1523
1581
{"TX DMIC MUX0", "DMIC7", "TX DMIC7"},
1524
1582
1583
+
{"TX DEC1 MUX", "MSM_DMIC", "TX DMIC MUX1"},
1584
+
{"TX DMIC MUX1", "DMIC0", "TX DMIC0"},
1585
+
{"TX DMIC MUX1", "DMIC1", "TX DMIC1"},
1586
+
{"TX DMIC MUX1", "DMIC2", "TX DMIC2"},
1587
+
{"TX DMIC MUX1", "DMIC3", "TX DMIC3"},
1588
+
{"TX DMIC MUX1", "DMIC4", "TX DMIC4"},
1589
+
{"TX DMIC MUX1", "DMIC5", "TX DMIC5"},
1590
+
{"TX DMIC MUX1", "DMIC6", "TX DMIC6"},
1591
+
{"TX DMIC MUX1", "DMIC7", "TX DMIC7"},
1592
+
1593
+
{"TX DEC2 MUX", "MSM_DMIC", "TX DMIC MUX2"},
1594
+
{"TX DMIC MUX2", "DMIC0", "TX DMIC0"},
1595
+
{"TX DMIC MUX2", "DMIC1", "TX DMIC1"},
1596
+
{"TX DMIC MUX2", "DMIC2", "TX DMIC2"},
1597
+
{"TX DMIC MUX2", "DMIC3", "TX DMIC3"},
1598
+
{"TX DMIC MUX2", "DMIC4", "TX DMIC4"},
1599
+
{"TX DMIC MUX2", "DMIC5", "TX DMIC5"},
1600
+
{"TX DMIC MUX2", "DMIC6", "TX DMIC6"},
1601
+
{"TX DMIC MUX2", "DMIC7", "TX DMIC7"},
1602
+
1603
+
{"TX DEC3 MUX", "MSM_DMIC", "TX DMIC MUX3"},
1604
+
{"TX DMIC MUX3", "DMIC0", "TX DMIC0"},
1605
+
{"TX DMIC MUX3", "DMIC1", "TX DMIC1"},
1606
+
{"TX DMIC MUX3", "DMIC2", "TX DMIC2"},
1607
+
{"TX DMIC MUX3", "DMIC3", "TX DMIC3"},
1608
+
{"TX DMIC MUX3", "DMIC4", "TX DMIC4"},
1609
+
{"TX DMIC MUX3", "DMIC5", "TX DMIC5"},
1610
+
{"TX DMIC MUX3", "DMIC6", "TX DMIC6"},
1611
+
{"TX DMIC MUX3", "DMIC7", "TX DMIC7"},
1612
+
1613
+
{"TX DEC4 MUX", "MSM_DMIC", "TX DMIC MUX4"},
1614
+
{"TX DMIC MUX4", "DMIC0", "TX DMIC0"},
1615
+
{"TX DMIC MUX4", "DMIC1", "TX DMIC1"},
1616
+
{"TX DMIC MUX4", "DMIC2", "TX DMIC2"},
1617
+
{"TX DMIC MUX4", "DMIC3", "TX DMIC3"},
1618
+
{"TX DMIC MUX4", "DMIC4", "TX DMIC4"},
1619
+
{"TX DMIC MUX4", "DMIC5", "TX DMIC5"},
1620
+
{"TX DMIC MUX4", "DMIC6", "TX DMIC6"},
1621
+
{"TX DMIC MUX4", "DMIC7", "TX DMIC7"},
1622
+
1623
+
{"TX DEC5 MUX", "MSM_DMIC", "TX DMIC MUX5"},
1624
+
{"TX DMIC MUX5", "DMIC0", "TX DMIC0"},
1625
+
{"TX DMIC MUX5", "DMIC1", "TX DMIC1"},
1626
+
{"TX DMIC MUX5", "DMIC2", "TX DMIC2"},
1627
+
{"TX DMIC MUX5", "DMIC3", "TX DMIC3"},
1628
+
{"TX DMIC MUX5", "DMIC4", "TX DMIC4"},
1629
+
{"TX DMIC MUX5", "DMIC5", "TX DMIC5"},
1630
+
{"TX DMIC MUX5", "DMIC6", "TX DMIC6"},
1631
+
{"TX DMIC MUX5", "DMIC7", "TX DMIC7"},
1632
+
1633
+
{"TX DEC6 MUX", "MSM_DMIC", "TX DMIC MUX6"},
1634
+
{"TX DMIC MUX6", "DMIC0", "TX DMIC0"},
1635
+
{"TX DMIC MUX6", "DMIC1", "TX DMIC1"},
1636
+
{"TX DMIC MUX6", "DMIC2", "TX DMIC2"},
1637
+
{"TX DMIC MUX6", "DMIC3", "TX DMIC3"},
1638
+
{"TX DMIC MUX6", "DMIC4", "TX DMIC4"},
1639
+
{"TX DMIC MUX6", "DMIC5", "TX DMIC5"},
1640
+
{"TX DMIC MUX6", "DMIC6", "TX DMIC6"},
1641
+
{"TX DMIC MUX6", "DMIC7", "TX DMIC7"},
1642
+
1643
+
{"TX DEC7 MUX", "MSM_DMIC", "TX DMIC MUX7"},
1644
+
{"TX DMIC MUX7", "DMIC0", "TX DMIC0"},
1645
+
{"TX DMIC MUX7", "DMIC1", "TX DMIC1"},
1646
+
{"TX DMIC MUX7", "DMIC2", "TX DMIC2"},
1647
+
{"TX DMIC MUX7", "DMIC3", "TX DMIC3"},
1648
+
{"TX DMIC MUX7", "DMIC4", "TX DMIC4"},
1649
+
{"TX DMIC MUX7", "DMIC5", "TX DMIC5"},
1650
+
{"TX DMIC MUX7", "DMIC6", "TX DMIC6"},
1651
+
{"TX DMIC MUX7", "DMIC7", "TX DMIC7"},
1652
+
};
1653
+
1654
+
/* Controls and routes specific to LPASS <= v9.0.0 */
1655
+
static const char * const smic_mux_text_v9[] = {
1656
+
"ZERO", "ADC0", "ADC1", "ADC2", "ADC3", "SWR_DMIC0",
1657
+
"SWR_DMIC1", "SWR_DMIC2", "SWR_DMIC3", "SWR_DMIC4",
1658
+
"SWR_DMIC5", "SWR_DMIC6", "SWR_DMIC7"
1659
+
};
1660
+
1661
+
static SOC_ENUM_SINGLE_DECL(tx_smic0_enum_v9, CDC_TX_INP_MUX_ADC_MUX0_CFG0,
1662
+
0, smic_mux_text_v9);
1663
+
1664
+
static SOC_ENUM_SINGLE_DECL(tx_smic1_enum_v9, CDC_TX_INP_MUX_ADC_MUX1_CFG0,
1665
+
0, smic_mux_text_v9);
1666
+
1667
+
static SOC_ENUM_SINGLE_DECL(tx_smic2_enum_v9, CDC_TX_INP_MUX_ADC_MUX2_CFG0,
1668
+
0, smic_mux_text_v9);
1669
+
1670
+
static SOC_ENUM_SINGLE_DECL(tx_smic3_enum_v9, CDC_TX_INP_MUX_ADC_MUX3_CFG0,
1671
+
0, smic_mux_text_v9);
1672
+
1673
+
static SOC_ENUM_SINGLE_DECL(tx_smic4_enum_v9, CDC_TX_INP_MUX_ADC_MUX4_CFG0,
1674
+
0, smic_mux_text_v9);
1675
+
1676
+
static SOC_ENUM_SINGLE_DECL(tx_smic5_enum_v9, CDC_TX_INP_MUX_ADC_MUX5_CFG0,
1677
+
0, smic_mux_text_v9);
1678
+
1679
+
static SOC_ENUM_SINGLE_DECL(tx_smic6_enum_v9, CDC_TX_INP_MUX_ADC_MUX6_CFG0,
1680
+
0, smic_mux_text_v9);
1681
+
1682
+
static SOC_ENUM_SINGLE_DECL(tx_smic7_enum_v9, CDC_TX_INP_MUX_ADC_MUX7_CFG0,
1683
+
0, smic_mux_text_v9);
1684
+
1685
+
static const struct snd_kcontrol_new tx_smic0_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic0", tx_smic0_enum_v9,
1686
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1687
+
static const struct snd_kcontrol_new tx_smic1_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic1", tx_smic1_enum_v9,
1688
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1689
+
static const struct snd_kcontrol_new tx_smic2_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic2", tx_smic2_enum_v9,
1690
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1691
+
static const struct snd_kcontrol_new tx_smic3_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic3", tx_smic3_enum_v9,
1692
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1693
+
static const struct snd_kcontrol_new tx_smic4_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic4", tx_smic4_enum_v9,
1694
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1695
+
static const struct snd_kcontrol_new tx_smic5_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic5", tx_smic5_enum_v9,
1696
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1697
+
static const struct snd_kcontrol_new tx_smic6_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic6", tx_smic6_enum_v9,
1698
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1699
+
static const struct snd_kcontrol_new tx_smic7_mux_v9 = SOC_DAPM_ENUM_EXT("tx_smic7", tx_smic7_enum_v9,
1700
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1701
+
1702
+
static const struct snd_soc_dapm_widget tx_macro_dapm_widgets_v9[] = {
1703
+
SND_SOC_DAPM_MUX("TX SMIC MUX0", SND_SOC_NOPM, 0, 0, &tx_smic0_mux_v9),
1704
+
SND_SOC_DAPM_MUX("TX SMIC MUX1", SND_SOC_NOPM, 0, 0, &tx_smic1_mux_v9),
1705
+
SND_SOC_DAPM_MUX("TX SMIC MUX2", SND_SOC_NOPM, 0, 0, &tx_smic2_mux_v9),
1706
+
SND_SOC_DAPM_MUX("TX SMIC MUX3", SND_SOC_NOPM, 0, 0, &tx_smic3_mux_v9),
1707
+
SND_SOC_DAPM_MUX("TX SMIC MUX4", SND_SOC_NOPM, 0, 0, &tx_smic4_mux_v9),
1708
+
SND_SOC_DAPM_MUX("TX SMIC MUX5", SND_SOC_NOPM, 0, 0, &tx_smic5_mux_v9),
1709
+
SND_SOC_DAPM_MUX("TX SMIC MUX6", SND_SOC_NOPM, 0, 0, &tx_smic6_mux_v9),
1710
+
SND_SOC_DAPM_MUX("TX SMIC MUX7", SND_SOC_NOPM, 0, 0, &tx_smic7_mux_v9),
1711
+
1712
+
SND_SOC_DAPM_INPUT("TX SWR_ADC0"),
1713
+
SND_SOC_DAPM_INPUT("TX SWR_ADC1"),
1714
+
SND_SOC_DAPM_INPUT("TX SWR_ADC2"),
1715
+
SND_SOC_DAPM_INPUT("TX SWR_ADC3"),
1716
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC0"),
1717
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC1"),
1718
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC2"),
1719
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC3"),
1720
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC4"),
1721
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC5"),
1722
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC6"),
1723
+
SND_SOC_DAPM_INPUT("TX SWR_DMIC7"),
1724
+
};
1725
+
1726
+
static const struct snd_soc_dapm_route tx_audio_map_v9[] = {
1525
1727
{"TX DEC0 MUX", "SWR_MIC", "TX SMIC MUX0"},
1526
1728
{"TX SMIC MUX0", NULL, "TX_SWR_CLK"},
1527
1729
{"TX SMIC MUX0", "ADC0", "TX SWR_ADC0"},
···
1680
1594
{"TX SMIC MUX0", "SWR_DMIC5", "TX SWR_DMIC5"},
1681
1595
{"TX SMIC MUX0", "SWR_DMIC6", "TX SWR_DMIC6"},
1682
1596
{"TX SMIC MUX0", "SWR_DMIC7", "TX SWR_DMIC7"},
1683
-
1684
-
{"TX DEC1 MUX", "MSM_DMIC", "TX DMIC MUX1"},
1685
-
{"TX DMIC MUX1", "DMIC0", "TX DMIC0"},
1686
-
{"TX DMIC MUX1", "DMIC1", "TX DMIC1"},
1687
-
{"TX DMIC MUX1", "DMIC2", "TX DMIC2"},
1688
-
{"TX DMIC MUX1", "DMIC3", "TX DMIC3"},
1689
-
{"TX DMIC MUX1", "DMIC4", "TX DMIC4"},
1690
-
{"TX DMIC MUX1", "DMIC5", "TX DMIC5"},
1691
-
{"TX DMIC MUX1", "DMIC6", "TX DMIC6"},
1692
-
{"TX DMIC MUX1", "DMIC7", "TX DMIC7"},
1693
1597
1694
1598
{"TX DEC1 MUX", "SWR_MIC", "TX SMIC MUX1"},
1695
1599
{"TX SMIC MUX1", NULL, "TX_SWR_CLK"},
···
1696
1620
{"TX SMIC MUX1", "SWR_DMIC6", "TX SWR_DMIC6"},
1697
1621
{"TX SMIC MUX1", "SWR_DMIC7", "TX SWR_DMIC7"},
1698
1622
1699
-
{"TX DEC2 MUX", "MSM_DMIC", "TX DMIC MUX2"},
1700
-
{"TX DMIC MUX2", "DMIC0", "TX DMIC0"},
1701
-
{"TX DMIC MUX2", "DMIC1", "TX DMIC1"},
1702
-
{"TX DMIC MUX2", "DMIC2", "TX DMIC2"},
1703
-
{"TX DMIC MUX2", "DMIC3", "TX DMIC3"},
1704
-
{"TX DMIC MUX2", "DMIC4", "TX DMIC4"},
1705
-
{"TX DMIC MUX2", "DMIC5", "TX DMIC5"},
1706
-
{"TX DMIC MUX2", "DMIC6", "TX DMIC6"},
1707
-
{"TX DMIC MUX2", "DMIC7", "TX DMIC7"},
1708
-
1709
1623
{"TX DEC2 MUX", "SWR_MIC", "TX SMIC MUX2"},
1710
1624
{"TX SMIC MUX2", NULL, "TX_SWR_CLK"},
1711
1625
{"TX SMIC MUX2", "ADC0", "TX SWR_ADC0"},
···
1710
1644
{"TX SMIC MUX2", "SWR_DMIC5", "TX SWR_DMIC5"},
1711
1645
{"TX SMIC MUX2", "SWR_DMIC6", "TX SWR_DMIC6"},
1712
1646
{"TX SMIC MUX2", "SWR_DMIC7", "TX SWR_DMIC7"},
1713
-
1714
-
{"TX DEC3 MUX", "MSM_DMIC", "TX DMIC MUX3"},
1715
-
{"TX DMIC MUX3", "DMIC0", "TX DMIC0"},
1716
-
{"TX DMIC MUX3", "DMIC1", "TX DMIC1"},
1717
-
{"TX DMIC MUX3", "DMIC2", "TX DMIC2"},
1718
-
{"TX DMIC MUX3", "DMIC3", "TX DMIC3"},
1719
-
{"TX DMIC MUX3", "DMIC4", "TX DMIC4"},
1720
-
{"TX DMIC MUX3", "DMIC5", "TX DMIC5"},
1721
-
{"TX DMIC MUX3", "DMIC6", "TX DMIC6"},
1722
-
{"TX DMIC MUX3", "DMIC7", "TX DMIC7"},
1723
1647
1724
1648
{"TX DEC3 MUX", "SWR_MIC", "TX SMIC MUX3"},
1725
1649
{"TX SMIC MUX3", NULL, "TX_SWR_CLK"},
···
1726
1670
{"TX SMIC MUX3", "SWR_DMIC6", "TX SWR_DMIC6"},
1727
1671
{"TX SMIC MUX3", "SWR_DMIC7", "TX SWR_DMIC7"},
1728
1672
1729
-
{"TX DEC4 MUX", "MSM_DMIC", "TX DMIC MUX4"},
1730
-
{"TX DMIC MUX4", "DMIC0", "TX DMIC0"},
1731
-
{"TX DMIC MUX4", "DMIC1", "TX DMIC1"},
1732
-
{"TX DMIC MUX4", "DMIC2", "TX DMIC2"},
1733
-
{"TX DMIC MUX4", "DMIC3", "TX DMIC3"},
1734
-
{"TX DMIC MUX4", "DMIC4", "TX DMIC4"},
1735
-
{"TX DMIC MUX4", "DMIC5", "TX DMIC5"},
1736
-
{"TX DMIC MUX4", "DMIC6", "TX DMIC6"},
1737
-
{"TX DMIC MUX4", "DMIC7", "TX DMIC7"},
1738
-
1739
1673
{"TX DEC4 MUX", "SWR_MIC", "TX SMIC MUX4"},
1740
1674
{"TX SMIC MUX4", NULL, "TX_SWR_CLK"},
1741
1675
{"TX SMIC MUX4", "ADC0", "TX SWR_ADC0"},
···
1740
1694
{"TX SMIC MUX4", "SWR_DMIC5", "TX SWR_DMIC5"},
1741
1695
{"TX SMIC MUX4", "SWR_DMIC6", "TX SWR_DMIC6"},
1742
1696
{"TX SMIC MUX4", "SWR_DMIC7", "TX SWR_DMIC7"},
1743
-
1744
-
{"TX DEC5 MUX", "MSM_DMIC", "TX DMIC MUX5"},
1745
-
{"TX DMIC MUX5", "DMIC0", "TX DMIC0"},
1746
-
{"TX DMIC MUX5", "DMIC1", "TX DMIC1"},
1747
-
{"TX DMIC MUX5", "DMIC2", "TX DMIC2"},
1748
-
{"TX DMIC MUX5", "DMIC3", "TX DMIC3"},
1749
-
{"TX DMIC MUX5", "DMIC4", "TX DMIC4"},
1750
-
{"TX DMIC MUX5", "DMIC5", "TX DMIC5"},
1751
-
{"TX DMIC MUX5", "DMIC6", "TX DMIC6"},
1752
-
{"TX DMIC MUX5", "DMIC7", "TX DMIC7"},
1753
1697
1754
1698
{"TX DEC5 MUX", "SWR_MIC", "TX SMIC MUX5"},
1755
1699
{"TX SMIC MUX5", NULL, "TX_SWR_CLK"},
···
1756
1720
{"TX SMIC MUX5", "SWR_DMIC6", "TX SWR_DMIC6"},
1757
1721
{"TX SMIC MUX5", "SWR_DMIC7", "TX SWR_DMIC7"},
1758
1722
1759
-
{"TX DEC6 MUX", "MSM_DMIC", "TX DMIC MUX6"},
1760
-
{"TX DMIC MUX6", "DMIC0", "TX DMIC0"},
1761
-
{"TX DMIC MUX6", "DMIC1", "TX DMIC1"},
1762
-
{"TX DMIC MUX6", "DMIC2", "TX DMIC2"},
1763
-
{"TX DMIC MUX6", "DMIC3", "TX DMIC3"},
1764
-
{"TX DMIC MUX6", "DMIC4", "TX DMIC4"},
1765
-
{"TX DMIC MUX6", "DMIC5", "TX DMIC5"},
1766
-
{"TX DMIC MUX6", "DMIC6", "TX DMIC6"},
1767
-
{"TX DMIC MUX6", "DMIC7", "TX DMIC7"},
1768
-
1769
1723
{"TX DEC6 MUX", "SWR_MIC", "TX SMIC MUX6"},
1770
1724
{"TX SMIC MUX6", NULL, "TX_SWR_CLK"},
1771
1725
{"TX SMIC MUX6", "ADC0", "TX SWR_ADC0"},
···
1770
1744
{"TX SMIC MUX6", "SWR_DMIC5", "TX SWR_DMIC5"},
1771
1745
{"TX SMIC MUX6", "SWR_DMIC6", "TX SWR_DMIC6"},
1772
1746
{"TX SMIC MUX6", "SWR_DMIC7", "TX SWR_DMIC7"},
1773
-
1774
-
{"TX DEC7 MUX", "MSM_DMIC", "TX DMIC MUX7"},
1775
-
{"TX DMIC MUX7", "DMIC0", "TX DMIC0"},
1776
-
{"TX DMIC MUX7", "DMIC1", "TX DMIC1"},
1777
-
{"TX DMIC MUX7", "DMIC2", "TX DMIC2"},
1778
-
{"TX DMIC MUX7", "DMIC3", "TX DMIC3"},
1779
-
{"TX DMIC MUX7", "DMIC4", "TX DMIC4"},
1780
-
{"TX DMIC MUX7", "DMIC5", "TX DMIC5"},
1781
-
{"TX DMIC MUX7", "DMIC6", "TX DMIC6"},
1782
-
{"TX DMIC MUX7", "DMIC7", "TX DMIC7"},
1783
1747
1784
1748
{"TX DEC7 MUX", "SWR_MIC", "TX SMIC MUX7"},
1785
1749
{"TX SMIC MUX7", NULL, "TX_SWR_CLK"},
···
1841
1825
tx_macro_get_bcs, tx_macro_set_bcs),
1842
1826
};
1843
1827
1828
+
static int tx_macro_component_extend(struct snd_soc_component *comp)
1829
+
{
1830
+
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(comp);
1831
+
struct tx_macro *tx = snd_soc_component_get_drvdata(comp);
1832
+
int ret;
1833
+
1834
+
if (tx->data->extra_widgets_num) {
1835
+
ret = snd_soc_dapm_new_controls(dapm, tx->data->extra_widgets,
1836
+
tx->data->extra_widgets_num);
1837
+
if (ret) {
1838
+
dev_err(tx->dev, "failed to add extra widgets: %d\n", ret);
1839
+
return ret;
1840
+
}
1841
+
}
1842
+
1843
+
if (tx->data->extra_routes_num) {
1844
+
ret = snd_soc_dapm_add_routes(dapm, tx->data->extra_routes,
1845
+
tx->data->extra_routes_num);
1846
+
if (ret) {
1847
+
dev_err(tx->dev, "failed to add extra routes: %d\n", ret);
1848
+
return ret;
1849
+
}
1850
+
}
1851
+
1852
+
return 0;
1853
+
}
1854
+
1844
1855
static int tx_macro_component_probe(struct snd_soc_component *comp)
1845
1856
{
1846
1857
struct tx_macro *tx = snd_soc_component_get_drvdata(comp);
1847
-
int i;
1858
+
int i, ret;
1859
+
1860
+
ret = tx_macro_component_extend(comp);
1861
+
if (ret)
1862
+
return ret;
1848
1863
1849
1864
snd_soc_component_init_regmap(comp, tx->regmap);
1850
1865
···
2005
1958
{
2006
1959
struct device *dev = &pdev->dev;
2007
1960
struct device_node *np = dev->of_node;
2008
-
kernel_ulong_t flags;
2009
1961
struct tx_macro *tx;
2010
1962
void __iomem *base;
2011
1963
int ret, reg;
2012
1964
2013
-
flags = (kernel_ulong_t)device_get_match_data(dev);
2014
-
2015
1965
tx = devm_kzalloc(dev, sizeof(*tx), GFP_KERNEL);
2016
1966
if (!tx)
2017
1967
return -ENOMEM;
1968
+
1969
+
tx->data = device_get_match_data(dev);
2018
1970
2019
1971
tx->macro = devm_clk_get_optional(dev, "macro");
2020
1972
if (IS_ERR(tx->macro))
···
2027
1981
if (IS_ERR(tx->mclk))
2028
1982
return dev_err_probe(dev, PTR_ERR(tx->mclk), "unable to get mclk clock\n");
2029
1983
2030
-
if (flags & LPASS_MACRO_FLAG_HAS_NPL_CLOCK) {
1984
+
if (tx->data->flags & LPASS_MACRO_FLAG_HAS_NPL_CLOCK) {
2031
1985
tx->npl = devm_clk_get(dev, "npl");
2032
1986
if (IS_ERR(tx->npl))
2033
1987
return dev_err_probe(dev, PTR_ERR(tx->npl), "unable to get npl clock\n");
···
2102
2056
2103
2057
2104
2058
/* reset soundwire block */
2105
-
if (flags & LPASS_MACRO_FLAG_RESET_SWR)
2059
+
if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR)
2106
2060
regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
2107
2061
CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE);
2108
2062
···
2110
2064
CDC_TX_SWR_CLK_EN_MASK,
2111
2065
CDC_TX_SWR_CLK_ENABLE);
2112
2066
2113
-
if (flags & LPASS_MACRO_FLAG_RESET_SWR)
2067
+
if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR)
2114
2068
regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
2115
2069
CDC_TX_SWR_RESET_MASK, 0x0);
2116
2070
···
2214
2168
SET_RUNTIME_PM_OPS(tx_macro_runtime_suspend, tx_macro_runtime_resume, NULL)
2215
2169
};
2216
2170
2171
+
static const struct tx_macro_data lpass_ver_9 = {
2172
+
.flags = LPASS_MACRO_FLAG_HAS_NPL_CLOCK |
2173
+
LPASS_MACRO_FLAG_RESET_SWR,
2174
+
.ver = LPASS_VER_9_0_0,
2175
+
.extra_widgets = tx_macro_dapm_widgets_v9,
2176
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9),
2177
+
.extra_routes = tx_audio_map_v9,
2178
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2179
+
};
2180
+
2181
+
static const struct tx_macro_data lpass_ver_10_sm6115 = {
2182
+
.flags = LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
2183
+
.ver = LPASS_VER_10_0_0,
2184
+
.extra_widgets = tx_macro_dapm_widgets_v9,
2185
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9),
2186
+
.extra_routes = tx_audio_map_v9,
2187
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2188
+
};
2189
+
2190
+
2191
+
static const struct tx_macro_data lpass_ver_11 = {
2192
+
.flags = LPASS_MACRO_FLAG_RESET_SWR,
2193
+
.ver = LPASS_VER_11_0_0,
2194
+
.extra_widgets = tx_macro_dapm_widgets_v9,
2195
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9),
2196
+
.extra_routes = tx_audio_map_v9,
2197
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2198
+
};
2199
+
2217
2200
static const struct of_device_id tx_macro_dt_match[] = {
2218
2201
{
2219
2202
.compatible = "qcom,sc7280-lpass-tx-macro",
2220
-
.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
2203
+
.data = &lpass_ver_9,
2221
2204
}, {
2222
2205
.compatible = "qcom,sm6115-lpass-tx-macro",
2223
-
.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
2206
+
.data = &lpass_ver_10_sm6115,
2224
2207
}, {
2225
2208
.compatible = "qcom,sm8250-lpass-tx-macro",
2226
-
.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
2209
+
.data = &lpass_ver_9,
2227
2210
}, {
2228
2211
.compatible = "qcom,sm8450-lpass-tx-macro",
2229
-
.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
2212
+
.data = &lpass_ver_9,
2230
2213
}, {
2231
2214
.compatible = "qcom,sm8550-lpass-tx-macro",
2232
-
.data = (void *)LPASS_MACRO_FLAG_RESET_SWR,
2215
+
.data = &lpass_ver_11,
2233
2216
}, {
2234
2217
.compatible = "qcom,sc8280xp-lpass-tx-macro",
2235
-
.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
2218
+
.data = &lpass_ver_9,
2236
2219
},
2237
2220
{ }
2238
2221
};