Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm: Rename msm_file_private -> msm_context
This is a more descriptive name.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Tested-by: Antonino Maniscalco <antomani103@gmail.com>
Reviewed-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/661459/
+49
-51
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
···
111
111
struct msm_ringbuffer *ring, struct msm_gem_submit *submit)
112
112
{
113
113
bool sysprof = refcount_read(&a6xx_gpu->base.base.sysprof_active) > 1;
114
-
struct msm_file_private *ctx = submit->queue->ctx;
114
+
struct msm_context *ctx = submit->queue->ctx;
115
115
struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
116
116
phys_addr_t ttbr;
117
117
u32 asid;
+3
-3
drivers/gpu/drm/msm/adreno/adreno_gpu.c
+3
-3
drivers/gpu/drm/msm/adreno/adreno_gpu.c
···
351
351
return 0;
352
352
}
353
353
354
-
int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
354
+
int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
355
355
uint32_t param, uint64_t *value, uint32_t *len)
356
356
{
357
357
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
···
439
439
}
440
440
}
441
441
442
-
int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
442
+
int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,
443
443
uint32_t param, uint64_t value, uint32_t len)
444
444
{
445
445
struct drm_device *drm = gpu->dev;
···
485
485
case MSM_PARAM_SYSPROF:
486
486
if (!capable(CAP_SYS_ADMIN))
487
487
return UERR(EPERM, drm, "invalid permissions");
488
-
return msm_file_private_set_sysprof(ctx, gpu, value);
488
+
return msm_context_set_sysprof(ctx, gpu, value);
489
489
default:
490
490
return UERR(EINVAL, drm, "%s: invalid param: %u", gpu->name, param);
491
491
}
+2
-2
drivers/gpu/drm/msm/adreno/adreno_gpu.h
+2
-2
drivers/gpu/drm/msm/adreno/adreno_gpu.h
···
581
581
/* Put vm_start above 32b to catch issues with not setting xyz_BASE_HI */
582
582
#define ADRENO_VM_START 0x100000000ULL
583
583
u64 adreno_private_address_space_size(struct msm_gpu *gpu);
584
-
int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
584
+
int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
585
585
uint32_t param, uint64_t *value, uint32_t *len);
586
-
int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
586
+
int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,
587
587
uint32_t param, uint64_t value, uint32_t len);
588
588
const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu,
589
589
const char *fwname);
+7
-7
drivers/gpu/drm/msm/msm_drv.c
+7
-7
drivers/gpu/drm/msm/msm_drv.c
···
337
337
{
338
338
static atomic_t ident = ATOMIC_INIT(0);
339
339
struct msm_drm_private *priv = dev->dev_private;
340
-
struct msm_file_private *ctx;
340
+
struct msm_context *ctx;
341
341
342
342
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
343
343
if (!ctx)
···
367
367
return context_init(dev, file);
368
368
}
369
369
370
-
static void context_close(struct msm_file_private *ctx)
370
+
static void context_close(struct msm_context *ctx)
371
371
{
372
372
msm_submitqueue_close(ctx);
373
-
msm_file_private_put(ctx);
373
+
msm_context_put(ctx);
374
374
}
375
375
376
376
static void msm_postclose(struct drm_device *dev, struct drm_file *file)
377
377
{
378
378
struct msm_drm_private *priv = dev->dev_private;
379
-
struct msm_file_private *ctx = file->driver_priv;
379
+
struct msm_context *ctx = file->driver_priv;
380
380
381
381
/*
382
382
* It is not possible to set sysprof param to non-zero if gpu
383
383
* is not initialized:
384
384
*/
385
385
if (priv->gpu)
386
-
msm_file_private_set_sysprof(ctx, priv->gpu, 0);
386
+
msm_context_set_sysprof(ctx, priv->gpu, 0);
387
387
388
388
context_close(ctx);
389
389
}
···
515
515
uint64_t *iova)
516
516
{
517
517
struct msm_drm_private *priv = dev->dev_private;
518
-
struct msm_file_private *ctx = file->driver_priv;
518
+
struct msm_context *ctx = file->driver_priv;
519
519
520
520
if (!priv->gpu)
521
521
return -EINVAL;
···
535
535
uint64_t iova)
536
536
{
537
537
struct msm_drm_private *priv = dev->dev_private;
538
-
struct msm_file_private *ctx = file->driver_priv;
538
+
struct msm_context *ctx = file->driver_priv;
539
539
540
540
if (!priv->gpu)
541
541
return -EINVAL;
+1
-1
drivers/gpu/drm/msm/msm_gem.c
+1
-1
drivers/gpu/drm/msm/msm_gem.c
···
44
44
45
45
static void update_ctx_mem(struct drm_file *file, ssize_t size)
46
46
{
47
-
struct msm_file_private *ctx = file->driver_priv;
47
+
struct msm_context *ctx = file->driver_priv;
48
48
uint64_t ctx_mem = atomic64_add_return(size, &ctx->ctx_mem);
49
49
50
50
rcu_read_lock(); /* Locks file->pid! */
+1
-1
drivers/gpu/drm/msm/msm_gem_submit.c
+1
-1
drivers/gpu/drm/msm/msm_gem_submit.c
···
652
652
{
653
653
struct msm_drm_private *priv = dev->dev_private;
654
654
struct drm_msm_gem_submit *args = data;
655
-
struct msm_file_private *ctx = file->driver_priv;
655
+
struct msm_context *ctx = file->driver_priv;
656
656
struct msm_gem_submit *submit = NULL;
657
657
struct msm_gpu *gpu = priv->gpu;
658
658
struct msm_gpu_submitqueue *queue;
+2
-2
drivers/gpu/drm/msm/msm_gpu.c
+2
-2
drivers/gpu/drm/msm/msm_gpu.c
···
148
148
return 0;
149
149
}
150
150
151
-
void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx,
151
+
void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx,
152
152
struct drm_printer *p)
153
153
{
154
154
drm_printf(p, "drm-engine-gpu:\t%llu ns\n", ctx->elapsed_ns);
···
342
342
343
343
static void get_comm_cmdline(struct msm_gem_submit *submit, char **comm, char **cmd)
344
344
{
345
-
struct msm_file_private *ctx = submit->queue->ctx;
345
+
struct msm_context *ctx = submit->queue->ctx;
346
346
struct task_struct *task;
347
347
348
348
WARN_ON(!mutex_is_locked(&submit->gpu->lock));
+19
-20
drivers/gpu/drm/msm/msm_gpu.h
+19
-20
drivers/gpu/drm/msm/msm_gpu.h
···
22
22
struct msm_gem_submit;
23
23
struct msm_gpu_perfcntr;
24
24
struct msm_gpu_state;
25
-
struct msm_file_private;
25
+
struct msm_context;
26
26
27
27
struct msm_gpu_config {
28
28
const char *ioname;
···
44
44
* + z180_gpu
45
45
*/
46
46
struct msm_gpu_funcs {
47
-
int (*get_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
47
+
int (*get_param)(struct msm_gpu *gpu, struct msm_context *ctx,
48
48
uint32_t param, uint64_t *value, uint32_t *len);
49
-
int (*set_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
49
+
int (*set_param)(struct msm_gpu *gpu, struct msm_context *ctx,
50
50
uint32_t param, uint64_t value, uint32_t len);
51
51
int (*hw_init)(struct msm_gpu *gpu);
52
52
···
341
341
#define NR_SCHED_PRIORITIES (1 + DRM_SCHED_PRIORITY_LOW - DRM_SCHED_PRIORITY_HIGH)
342
342
343
343
/**
344
-
* struct msm_file_private - per-drm_file context
344
+
* struct msm_context - per-drm_file context
345
345
*
346
346
* @queuelock: synchronizes access to submitqueues list
347
347
* @submitqueues: list of &msm_gpu_submitqueue created by userspace
···
351
351
* @ref: reference count
352
352
* @seqno: unique per process seqno
353
353
*/
354
-
struct msm_file_private {
354
+
struct msm_context {
355
355
rwlock_t queuelock;
356
356
struct list_head submitqueues;
357
357
int queueid;
···
506
506
u32 ring_nr;
507
507
int faults;
508
508
uint32_t last_fence;
509
-
struct msm_file_private *ctx;
509
+
struct msm_context *ctx;
510
510
struct list_head node;
511
511
struct idr fence_idr;
512
512
struct spinlock idr_lock;
···
602
602
int msm_gpu_pm_suspend(struct msm_gpu *gpu);
603
603
int msm_gpu_pm_resume(struct msm_gpu *gpu);
604
604
605
-
void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx,
605
+
void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx,
606
606
struct drm_printer *p);
607
607
608
-
int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
609
-
struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
608
+
int msm_submitqueue_init(struct drm_device *drm, struct msm_context *ctx);
609
+
struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_context *ctx,
610
610
u32 id);
611
611
int msm_submitqueue_create(struct drm_device *drm,
612
-
struct msm_file_private *ctx,
612
+
struct msm_context *ctx,
613
613
u32 prio, u32 flags, u32 *id);
614
-
int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx,
614
+
int msm_submitqueue_query(struct drm_device *drm, struct msm_context *ctx,
615
615
struct drm_msm_submitqueue_query *args);
616
-
int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
617
-
void msm_submitqueue_close(struct msm_file_private *ctx);
616
+
int msm_submitqueue_remove(struct msm_context *ctx, u32 id);
617
+
void msm_submitqueue_close(struct msm_context *ctx);
618
618
619
619
void msm_submitqueue_destroy(struct kref *kref);
620
620
621
-
int msm_file_private_set_sysprof(struct msm_file_private *ctx,
622
-
struct msm_gpu *gpu, int sysprof);
623
-
void __msm_file_private_destroy(struct kref *kref);
621
+
int msm_context_set_sysprof(struct msm_context *ctx, struct msm_gpu *gpu, int sysprof);
622
+
void __msm_context_destroy(struct kref *kref);
624
623
625
-
static inline void msm_file_private_put(struct msm_file_private *ctx)
624
+
static inline void msm_context_put(struct msm_context *ctx)
626
625
{
627
-
kref_put(&ctx->ref, __msm_file_private_destroy);
626
+
kref_put(&ctx->ref, __msm_context_destroy);
628
627
}
629
628
630
-
static inline struct msm_file_private *msm_file_private_get(
631
-
struct msm_file_private *ctx)
629
+
static inline struct msm_context *msm_context_get(
630
+
struct msm_context *ctx)
632
631
{
633
632
kref_get(&ctx->ref);
634
633
return ctx;
+13
-14
drivers/gpu/drm/msm/msm_submitqueue.c
+13
-14
drivers/gpu/drm/msm/msm_submitqueue.c
···
7
7
8
8
#include "msm_gpu.h"
9
9
10
-
int msm_file_private_set_sysprof(struct msm_file_private *ctx,
11
-
struct msm_gpu *gpu, int sysprof)
10
+
int msm_context_set_sysprof(struct msm_context *ctx, struct msm_gpu *gpu, int sysprof)
12
11
{
13
12
/*
14
13
* Since pm_runtime and sysprof_active are both refcounts, we
···
45
46
return 0;
46
47
}
47
48
48
-
void __msm_file_private_destroy(struct kref *kref)
49
+
void __msm_context_destroy(struct kref *kref)
49
50
{
50
-
struct msm_file_private *ctx = container_of(kref,
51
-
struct msm_file_private, ref);
51
+
struct msm_context *ctx = container_of(kref,
52
+
struct msm_context, ref);
52
53
int i;
53
54
54
55
for (i = 0; i < ARRAY_SIZE(ctx->entities); i++) {
···
72
73
73
74
idr_destroy(&queue->fence_idr);
74
75
75
-
msm_file_private_put(queue->ctx);
76
+
msm_context_put(queue->ctx);
76
77
77
78
kfree(queue);
78
79
}
79
80
80
-
struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
81
+
struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_context *ctx,
81
82
u32 id)
82
83
{
83
84
struct msm_gpu_submitqueue *entry;
···
100
101
return NULL;
101
102
}
102
103
103
-
void msm_submitqueue_close(struct msm_file_private *ctx)
104
+
void msm_submitqueue_close(struct msm_context *ctx)
104
105
{
105
106
struct msm_gpu_submitqueue *entry, *tmp;
106
107
···
118
119
}
119
120
120
121
static struct drm_sched_entity *
121
-
get_sched_entity(struct msm_file_private *ctx, struct msm_ringbuffer *ring,
122
+
get_sched_entity(struct msm_context *ctx, struct msm_ringbuffer *ring,
122
123
unsigned ring_nr, enum drm_sched_priority sched_prio)
123
124
{
124
125
static DEFINE_MUTEX(entity_lock);
···
154
155
return ctx->entities[idx];
155
156
}
156
157
157
-
int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
158
+
int msm_submitqueue_create(struct drm_device *drm, struct msm_context *ctx,
158
159
u32 prio, u32 flags, u32 *id)
159
160
{
160
161
struct msm_drm_private *priv = drm->dev_private;
···
199
200
200
201
write_lock(&ctx->queuelock);
201
202
202
-
queue->ctx = msm_file_private_get(ctx);
203
+
queue->ctx = msm_context_get(ctx);
203
204
queue->id = ctx->queueid++;
204
205
205
206
if (id)
···
220
221
* Create the default submit-queue (id==0), used for backwards compatibility
221
222
* for userspace that pre-dates the introduction of submitqueues.
222
223
*/
223
-
int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx)
224
+
int msm_submitqueue_init(struct drm_device *drm, struct msm_context *ctx)
224
225
{
225
226
struct msm_drm_private *priv = drm->dev_private;
226
227
int default_prio, max_priority;
···
260
261
return ret ? -EFAULT : 0;
261
262
}
262
263
263
-
int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx,
264
+
int msm_submitqueue_query(struct drm_device *drm, struct msm_context *ctx,
264
265
struct drm_msm_submitqueue_query *args)
265
266
{
266
267
struct msm_gpu_submitqueue *queue;
···
281
282
return ret;
282
283
}
283
284
284
-
int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id)
285
+
int msm_submitqueue_remove(struct msm_context *ctx, u32 id)
285
286
{
286
287
struct msm_gpu_submitqueue *entry;
287
288