Merge tag 'staging-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

+10

MAINTAINERS

··· 14069 14069 F: drivers/regulator/mpq7920.h 14070 14070 F: include/linux/mfd/mp2629.h 14071 14071 14072 + MOST(R) TECHNOLOGY DRIVER 14073 + M: Parthiban Veerasooran <parthiban.veerasooran@microchip.com> 14074 + M: Christian Gromm <christian.gromm@microchip.com> 14075 + S: Maintained 14076 + F: Documentation/ABI/testing/configfs-most 14077 + F: Documentation/ABI/testing/sysfs-bus-most 14078 + F: drivers/most/ 14079 + F: drivers/staging/most/ 14080 + F: include/linux/most.h 14081 + 14072 14082 MOTION EYE VAIO PICTUREBOOK CAMERA DRIVER 14073 14083 S: Orphan 14074 14084 W: http://popies.net/meye/

+6 -1

drivers/staging/emxx_udc/emxx_udc.c

··· 2587 2587 req->unaligned = false; 2588 2588 2589 2589 if (req->unaligned) { 2590 - if (!ep->virt_buf) 2590 + if (!ep->virt_buf) { 2591 2591 ep->virt_buf = dma_alloc_coherent(udc->dev, PAGE_SIZE, 2592 2592 &ep->phys_buf, 2593 2593 GFP_ATOMIC | GFP_DMA); 2594 + if (!ep->virt_buf) { 2595 + spin_unlock_irqrestore(&udc->lock, flags); 2596 + return -ENOMEM; 2597 + } 2598 + } 2594 2599 if (ep->epnum > 0) { 2595 2600 if (ep->direct == USB_DIR_IN) 2596 2601 memcpy(ep->virt_buf, req->req.buf,

+5 -1

drivers/staging/greybus/gpio.c

··· 43 43 }; 44 44 #define gpio_chip_to_gb_gpio_controller(chip) \ 45 45 container_of(chip, struct gb_gpio_controller, chip) 46 - #define irq_data_to_gpio_chip(d) (d->domain->host_data) 46 + 47 + static struct gpio_chip *irq_data_to_gpio_chip(struct irq_data *d) 48 + { 49 + return d->domain->host_data; 50 + } 47 51 48 52 static int gb_gpio_line_count_operation(struct gb_gpio_controller *ggc) 49 53 {

+1 -1

drivers/staging/greybus/usb.c

··· 27 27 }; 28 28 29 29 struct gb_usb_hub_control_response { 30 - u8 buf[0]; 30 + DECLARE_FLEX_ARRAY(u8, buf); 31 31 }; 32 32 33 33 struct gb_usb_device {

+1 -2

drivers/staging/ks7010/ks_wlan_net.c

··· 382 382 return -EPERM; 383 383 384 384 /* for SLEEP MODE */ 385 - strncpy(extra, priv->nick, 16); 386 - extra[16] = '\0'; 385 + strscpy(extra, priv->nick, 17); 387 386 dwrq->data.length = strlen(extra) + 1; 388 387 389 388 return 0;

+3

drivers/staging/pi433/TODO

··· 3 3 * Some missing data (marked with ###) needs to be added in the documentation 4 4 * Change (struct pi433_tx_cfg)->bit_rate to be a u32 so that we can support 5 5 bit rates up to 300kbps per the spec. 6 + -> This configuration needs to be moved to sysfs instead of being done through 7 + IOCTL. Going forward, we need to port userspace tools to use sysfs instead 8 + of IOCTL and then we would delete IOCTL.

+5 -6

drivers/staging/pi433/pi433_if.c

··· 55 55 static dev_t pi433_dev; 56 56 static DEFINE_IDR(pi433_idr); 57 57 static DEFINE_MUTEX(minor_lock); /* Protect idr accesses */ 58 + static struct dentry *root_dir; /* debugfs root directory for the driver */ 58 59 59 60 static struct class *pi433_class; /* mainly for udev to create /dev/pi433 */ 60 61 ··· 1307 1306 /* spi setup */ 1308 1307 spi_set_drvdata(spi, device); 1309 1308 1310 - entry = debugfs_create_dir(dev_name(device->dev), 1311 - debugfs_lookup(KBUILD_MODNAME, NULL)); 1309 + entry = debugfs_create_dir(dev_name(device->dev), root_dir); 1312 1310 debugfs_create_file("regs", 0400, entry, device, &pi433_debugfs_regs_fops); 1313 1311 1314 1312 return 0; ··· 1333 1333 static void pi433_remove(struct spi_device *spi) 1334 1334 { 1335 1335 struct pi433_device *device = spi_get_drvdata(spi); 1336 - struct dentry *mod_entry = debugfs_lookup(KBUILD_MODNAME, NULL); 1337 1336 1338 - debugfs_remove(debugfs_lookup(dev_name(device->dev), mod_entry)); 1337 + debugfs_lookup_and_remove(dev_name(device->dev), root_dir); 1339 1338 1340 1339 /* free GPIOs */ 1341 1340 free_gpio(device); ··· 1407 1408 return PTR_ERR(pi433_class); 1408 1409 } 1409 1410 1410 - debugfs_create_dir(KBUILD_MODNAME, NULL); 1411 + root_dir = debugfs_create_dir(KBUILD_MODNAME, NULL); 1411 1412 1412 1413 status = spi_register_driver(&pi433_spi_driver); 1413 1414 if (status < 0) { ··· 1426 1427 spi_unregister_driver(&pi433_spi_driver); 1427 1428 class_destroy(pi433_class); 1428 1429 unregister_chrdev(MAJOR(pi433_dev), pi433_spi_driver.driver.name); 1429 - debugfs_remove_recursive(debugfs_lookup(KBUILD_MODNAME, NULL)); 1430 + debugfs_remove(root_dir); 1430 1431 } 1431 1432 module_exit(pi433_exit); 1432 1433

+14 -53

drivers/staging/r8188eu/core/rtw_cmd.c

··· 28 28 } 29 29 } 30 30 31 - /* Calling Context: 32 - * 33 - * rtw_enqueue_cmd can only be called between kernel thread, 34 - * since only spin_lock is used. 35 - * 36 - * ISR/Call-Back functions can't call this sub-function. 37 - */ 38 - 39 - static int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj) 40 - { 41 - unsigned long flags; 42 - 43 - if (!obj) 44 - goto exit; 45 - 46 - spin_lock_irqsave(&queue->lock, flags); 47 - 48 - list_add_tail(&obj->list, &queue->queue); 49 - 50 - spin_unlock_irqrestore(&queue->lock, flags); 51 - 52 - exit: 53 - 54 - return _SUCCESS; 55 - } 56 - 57 31 int rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) 58 32 { 59 33 init_completion(&pcmdpriv->enqueue_cmd); ··· 38 64 rtw_init_queue(&pcmdpriv->cmd_queue); 39 65 40 66 /* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */ 41 - 42 - pcmdpriv->cmd_seq = 1; 43 67 44 68 pcmdpriv->cmd_allocated_buf = kzalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ, 45 69 GFP_KERNEL); ··· 99 127 100 128 u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) 101 129 { 102 - int res = _FAIL; 130 + unsigned long flags; 103 131 struct adapter *padapter = pcmdpriv->padapter; 104 132 105 133 if (!cmd_obj) 106 - goto exit; 134 + return _FAIL; 107 135 108 136 cmd_obj->padapter = padapter; 109 137 110 - res = rtw_cmd_filter(pcmdpriv, cmd_obj); 111 - if (res == _FAIL) { 138 + if (rtw_cmd_filter(pcmdpriv, cmd_obj) == _FAIL) { 112 139 rtw_free_cmd_obj(cmd_obj); 113 - goto exit; 140 + return _FAIL; 114 141 } 115 142 116 - res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); 143 + spin_lock_irqsave(&pcmdpriv->cmd_queue.lock, flags); 144 + list_add_tail(&cmd_obj->list, &pcmdpriv->cmd_queue.queue); 145 + spin_unlock_irqrestore(&pcmdpriv->cmd_queue.lock, flags); 117 146 118 - if (res == _SUCCESS) 119 - complete(&pcmdpriv->enqueue_cmd); 120 - 121 - exit: 122 - 123 - return res; 147 + complete(&pcmdpriv->enqueue_cmd); 148 + return _SUCCESS; 124 149 } 125 150 126 151 struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv) ··· 202 233 ret = cmd_hdl(pcmd->padapter, pcmdbuf); 203 234 pcmd->res = ret; 204 235 } 205 - 206 - pcmdpriv->cmd_seq++; 207 236 } else { 208 237 pcmd->res = H2C_PARAMETERS_ERROR; 209 238 } ··· 1168 1201 } 1169 1202 } 1170 1203 1171 - u8 rtw_chk_hi_queue_cmd(struct adapter *padapter) 1204 + void rtw_chk_hi_queue_cmd(struct adapter *padapter) 1172 1205 { 1173 1206 struct cmd_obj *ph2c; 1174 1207 struct drvextra_cmd_parm *pdrvextra_cmd_parm; 1175 1208 struct cmd_priv *pcmdpriv = &padapter->cmdpriv; 1176 - u8 res = _SUCCESS; 1177 1209 1178 1210 ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); 1179 - if (!ph2c) { 1180 - res = _FAIL; 1181 - goto exit; 1182 - } 1211 + if (!ph2c) 1212 + return; 1183 1213 1184 1214 pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); 1185 1215 if (!pdrvextra_cmd_parm) { 1186 1216 kfree(ph2c); 1187 - res = _FAIL; 1188 - goto exit; 1217 + return; 1189 1218 } 1190 1219 1191 1220 pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID; ··· 1190 1227 1191 1228 init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); 1192 1229 1193 - res = rtw_enqueue_cmd(pcmdpriv, ph2c); 1194 - exit: 1195 - return res; 1230 + rtw_enqueue_cmd(pcmdpriv, ph2c); 1196 1231 } 1197 1232 1198 1233 u8 rtw_c2h_wk_cmd(struct adapter *padapter, u8 *c2h_evt)

+4 -6

drivers/staging/r8188eu/core/rtw_fw.c

··· 89 89 addr = FW_8188E_START_ADDRESS + i * block_size; 90 90 data = buffer + i * block_size; 91 91 92 - ret = rtw_writeN(padapter, addr, block_size, data); 93 - if (ret == _FAIL) 94 - goto exit; 92 + if (rtw_writeN(padapter, addr, block_size, data)) 93 + return _FAIL; 95 94 } 96 95 97 96 if (remain) { ··· 104 105 addr = FW_8188E_START_ADDRESS + offset + i * block_size; 105 106 data = buffer + offset + i * block_size; 106 107 107 - ret = rtw_writeN(padapter, addr, block_size, data); 108 - if (ret == _FAIL) 109 - goto exit; 108 + if (rtw_writeN(padapter, addr, block_size, data)) 109 + return _FAIL; 110 110 } 111 111 } 112 112

-5

drivers/staging/r8188eu/core/rtw_mlme.c

··· 444 444 if (check_fwstate(pmlmepriv, _FW_LINKED) && 445 445 is_same_network(&pmlmepriv->cur_network.network, pnetwork)) { 446 446 update_network(&pmlmepriv->cur_network.network, pnetwork, adapter, true); 447 - rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof(struct ndis_802_11_fixed_ie), 448 - pmlmepriv->cur_network.network.IELength); 449 447 } 450 448 451 449 } ··· 1025 1027 break; 1026 1028 } 1027 1029 1028 - rtw_update_protection(padapter, (cur_network->network.IEs) + 1029 - sizeof(struct ndis_802_11_fixed_ie), 1030 - (cur_network->network.IELength)); 1031 1030 rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength); 1032 1031 } 1033 1032

+7 -24

drivers/staging/r8188eu/core/rtw_mlme_ext.c

··· 3735 3735 return _SUCCESS; 3736 3736 } 3737 3737 3738 - static void on_action_public_vendor(struct recv_frame *precv_frame) 3739 - { 3740 - u8 *pframe = precv_frame->rx_data; 3741 - u8 *frame_body = pframe + sizeof(struct ieee80211_hdr_3addr); 3742 - 3743 - if (!memcmp(frame_body + 2, P2P_OUI, 4)) 3744 - on_action_public_p2p(precv_frame); 3745 - } 3746 - 3747 - static void on_action_public_default(struct recv_frame *precv_frame) 3748 - { 3749 - u8 *pframe = precv_frame->rx_data; 3750 - u8 *frame_body = pframe + sizeof(struct ieee80211_hdr_3addr); 3751 - u8 token; 3752 - 3753 - token = frame_body[2]; 3754 - 3755 - rtw_action_public_decache(precv_frame, token); 3756 - } 3757 - 3758 3738 static void on_action_public(struct adapter *padapter, struct recv_frame *precv_frame) 3759 3739 { 3760 3740 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)precv_frame->rx_data; 3741 + u8 *frame_body = (u8 *)&mgmt->u; 3761 3742 3762 3743 /* All members of the action enum start with action_code. */ 3763 - if (mgmt->u.action.u.s1g.action_code == WLAN_PUB_ACTION_VENDOR_SPECIFIC) 3764 - on_action_public_vendor(precv_frame); 3765 - else 3766 - on_action_public_default(precv_frame); 3744 + if (mgmt->u.action.u.s1g.action_code == WLAN_PUB_ACTION_VENDOR_SPECIFIC) { 3745 + if (!memcmp(frame_body + 2, P2P_OUI, 4)) 3746 + on_action_public_p2p(precv_frame); 3747 + } else { 3748 + rtw_action_public_decache(precv_frame, frame_body[2]); 3749 + } 3767 3750 } 3768 3751 3769 3752 static void OnAction_p2p(struct adapter *padapter, struct recv_frame *precv_frame)

+10 -13

drivers/staging/r8188eu/core/rtw_pwrctrl.c

··· 8 8 #include "../include/osdep_intf.h" 9 9 #include "../include/linux/usb.h" 10 10 11 - void ips_enter(struct adapter *padapter) 11 + static void ips_enter(struct adapter *padapter) 12 12 { 13 13 struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; 14 14 struct xmit_priv *pxmit_priv = &padapter->xmitpriv; ··· 25 25 pwrpriv->ips_mode = pwrpriv->ips_mode_req; 26 26 27 27 pwrpriv->ips_enter_cnts++; 28 - if (rf_off == pwrpriv->change_rfpwrstate) { 29 - pwrpriv->bpower_saving = true; 28 + pwrpriv->bpower_saving = true; 30 29 31 - if (pwrpriv->ips_mode == IPS_LEVEL_2) 32 - pwrpriv->bkeepfwalive = true; 30 + if (pwrpriv->ips_mode == IPS_LEVEL_2) 31 + pwrpriv->bkeepfwalive = true; 33 32 34 - rtw_ips_pwr_down(padapter); 35 - pwrpriv->rf_pwrstate = rf_off; 36 - } 33 + rtw_ips_pwr_down(padapter); 34 + pwrpriv->rf_pwrstate = rf_off; 35 + 37 36 pwrpriv->bips_processing = false; 38 37 39 38 mutex_unlock(&pwrpriv->lock); 40 39 } 41 40 42 - int ips_leave(struct adapter *padapter) 41 + static int ips_leave(struct adapter *padapter) 43 42 { 44 43 struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; 45 44 struct security_priv *psecuritypriv = &padapter->securitypriv; ··· 50 51 51 52 if ((pwrpriv->rf_pwrstate == rf_off) && (!pwrpriv->bips_processing)) { 52 53 pwrpriv->bips_processing = true; 53 - pwrpriv->change_rfpwrstate = rf_on; 54 54 pwrpriv->ips_leave_cnts++; 55 55 56 56 result = rtw_ips_pwr_up(padapter); ··· 131 133 if (!rtw_pwr_unassociated_idle(padapter)) 132 134 goto exit; 133 135 134 - if (pwrpriv->rf_pwrstate == rf_on) { 135 - pwrpriv->change_rfpwrstate = rf_off; 136 + if (pwrpriv->rf_pwrstate == rf_on) 136 137 ips_enter(padapter); 137 - } 138 + 138 139 exit: 139 140 rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); 140 141 pwrpriv->ps_processing = false;

+11 -19

drivers/staging/r8188eu/core/rtw_recv.c

··· 38 38 static int rtl8188eu_init_recv_priv(struct adapter *padapter) 39 39 { 40 40 struct recv_priv *precvpriv = &padapter->recvpriv; 41 - int i, res = _SUCCESS; 41 + int i, err = 0; 42 42 struct recv_buf *precvbuf; 43 43 44 44 tasklet_init(&precvpriv->recv_tasklet, ··· 50 50 51 51 precvpriv->pallocated_recv_buf = kzalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4, 52 52 GFP_KERNEL); 53 - if (!precvpriv->pallocated_recv_buf) { 54 - res = _FAIL; 55 - goto exit; 56 - } 53 + if (!precvpriv->pallocated_recv_buf) 54 + return -ENOMEM; 57 55 58 56 precvpriv->precv_buf = (u8 *)ALIGN((size_t)(precvpriv->pallocated_recv_buf), 4); 59 57 ··· 62 64 precvbuf->reuse = false; 63 65 precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); 64 66 if (!precvbuf->purb) { 65 - res = _FAIL; 67 + err = -ENOMEM; 66 68 break; 67 69 } 68 70 precvbuf->adapter = padapter; ··· 92 94 pskb = NULL; 93 95 } 94 96 } 95 - exit: 96 - return res; 97 + 98 + return err; 97 99 } 98 100 99 101 int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter) 100 102 { 101 103 int i; 102 - 103 104 struct recv_frame *precvframe; 104 - 105 - int res = _SUCCESS; 105 + int err; 106 106 107 107 spin_lock_init(&precvpriv->lock); 108 108 ··· 113 117 precvpriv->free_recvframe_cnt = NR_RECVFRAME; 114 118 115 119 precvpriv->pallocated_frame_buf = vzalloc(NR_RECVFRAME * sizeof(struct recv_frame) + RXFRAME_ALIGN_SZ); 116 - 117 - if (!precvpriv->pallocated_frame_buf) { 118 - res = _FAIL; 119 - goto exit; 120 - } 120 + if (!precvpriv->pallocated_frame_buf) 121 + return -ENOMEM; 121 122 122 123 precvpriv->precv_frame_buf = (u8 *)ALIGN((size_t)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ); 123 124 ··· 134 141 } 135 142 precvpriv->rx_pending_cnt = 1; 136 143 137 - res = rtl8188eu_init_recv_priv(padapter); 144 + err = rtl8188eu_init_recv_priv(padapter); 138 145 139 146 timer_setup(&precvpriv->signal_stat_timer, rtw_signal_stat_timer_hdl, 0); 140 147 precvpriv->signal_stat_sampling_interval = 1000; /* ms */ 141 148 142 149 rtw_set_signal_stat_timer(precvpriv); 143 - exit: 144 150 145 - return res; 151 + return err; 146 152 } 147 153 148 154 static void rtl8188eu_free_recv_priv(struct adapter *padapter)

+9 -17

drivers/staging/r8188eu/core/rtw_sta_mgt.c

··· 260 260 261 261 spin_lock_bh(&pxmitpriv->lock); 262 262 263 - rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); 263 + rtw_free_xmitframe_list(pxmitpriv, get_list_head(&psta->sleep_q)); 264 264 psta->sleepq_len = 0; 265 265 266 - rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); 266 + rtw_free_xmitframe_list(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); 267 267 268 268 list_del_init(&pstaxmitpriv->vo_q.tx_pending); 269 269 270 - rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); 270 + rtw_free_xmitframe_list(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); 271 271 272 272 list_del_init(&pstaxmitpriv->vi_q.tx_pending); 273 273 274 - rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); 274 + rtw_free_xmitframe_list(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); 275 275 276 276 list_del_init(&pstaxmitpriv->bk_q.tx_pending); 277 277 278 - rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending); 278 + rtw_free_xmitframe_list(pxmitpriv, &pstaxmitpriv->be_q.sta_pending); 279 279 280 280 list_del_init(&pstaxmitpriv->be_q.tx_pending); 281 281 ··· 391 391 /* any station allocated can be searched by hash list */ 392 392 struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) 393 393 { 394 - struct list_head *plist, *phead; 395 - struct sta_info *psta = NULL; 394 + struct sta_info *ploop, *psta = NULL; 396 395 u32 index; 397 396 u8 *addr; 398 397 u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ··· 408 409 409 410 spin_lock_bh(&pstapriv->sta_hash_lock); 410 411 411 - phead = &pstapriv->sta_hash[index]; 412 - plist = phead->next; 413 - 414 - while (phead != plist) { 415 - psta = container_of(plist, struct sta_info, hash_list); 416 - 417 - if ((!memcmp(psta->hwaddr, addr, ETH_ALEN))) { 418 - /* if found the matched address */ 412 + list_for_each_entry(ploop, &pstapriv->sta_hash[index], hash_list) { 413 + if (!memcmp(ploop->hwaddr, addr, ETH_ALEN)) { 414 + psta = ploop; 419 415 break; 420 416 } 421 - psta = NULL; 422 - plist = plist->next; 423 417 } 424 418 425 419 spin_unlock_bh(&pstapriv->sta_hash_lock);

+169 -323

drivers/staging/r8188eu/core/rtw_xmit.c

··· 17 17 static void _init_txservq(struct tx_servq *ptxservq) 18 18 { 19 19 INIT_LIST_HEAD(&ptxservq->tx_pending); 20 - rtw_init_queue(&ptxservq->sta_pending); 20 + INIT_LIST_HEAD(&ptxservq->sta_pending); 21 21 ptxservq->qcnt = 0; 22 22 } 23 23 ··· 29 29 _init_txservq(&psta_xmitpriv->bk_q); 30 30 _init_txservq(&psta_xmitpriv->vi_q); 31 31 _init_txservq(&psta_xmitpriv->vo_q); 32 - INIT_LIST_HEAD(&psta_xmitpriv->legacy_dz); 33 - INIT_LIST_HEAD(&psta_xmitpriv->apsd); 34 32 } 35 33 36 34 static int rtw_xmit_resource_alloc(struct adapter *padapter, struct xmit_buf *pxmitbuf, ··· 39 41 return -ENOMEM; 40 42 41 43 pxmitbuf->pbuf = (u8 *)ALIGN((size_t)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); 42 - pxmitbuf->dma_transfer_addr = 0; 43 44 44 45 pxmitbuf->pxmit_urb = usb_alloc_urb(0, GFP_KERNEL); 45 46 if (!pxmitbuf->pxmit_urb) { ··· 67 70 /* We don't need to memset padapter->XXX to zero, because adapter is allocated by vzalloc(). */ 68 71 69 72 spin_lock_init(&pxmitpriv->lock); 70 - sema_init(&pxmitpriv->terminate_xmitthread_sema, 0); 71 73 72 74 /* 73 75 * Please insert all the queue initializaiton using rtw_init_queue below ··· 74 78 75 79 pxmitpriv->adapter = padapter; 76 80 77 - rtw_init_queue(&pxmitpriv->be_pending); 78 - rtw_init_queue(&pxmitpriv->bk_pending); 79 - rtw_init_queue(&pxmitpriv->vi_pending); 80 - rtw_init_queue(&pxmitpriv->vo_pending); 81 - rtw_init_queue(&pxmitpriv->bm_pending); 81 + INIT_LIST_HEAD(&pxmitpriv->be_pending); 82 + INIT_LIST_HEAD(&pxmitpriv->bk_pending); 83 + INIT_LIST_HEAD(&pxmitpriv->vi_pending); 84 + INIT_LIST_HEAD(&pxmitpriv->vo_pending); 82 85 83 86 rtw_init_queue(&pxmitpriv->free_xmit_queue); 84 87 ··· 148 153 goto free_xmitbuf; 149 154 } 150 155 151 - pxmitbuf->flags = XMIT_VO_QUEUE; 156 + pxmitbuf->high_queue = false; 152 157 153 158 list_add_tail(&pxmitbuf->list, &pxmitpriv->free_xmitbuf_queue.queue); 154 159 pxmitbuf++; ··· 187 192 if (rtw_alloc_hwxmits(padapter)) 188 193 goto free_xmit_extbuf; 189 194 190 - rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); 191 - 192 195 for (i = 0; i < 4; i++) 193 196 pxmitpriv->wmm_para_seq[i] = i; 194 - 195 - pxmitpriv->txirp_cnt = 1; 196 - 197 - sema_init(&pxmitpriv->tx_retevt, 0); 198 - 199 - /* per AC pending irp */ 200 - pxmitpriv->beq_cnt = 0; 201 - pxmitpriv->bkq_cnt = 0; 202 - pxmitpriv->viq_cnt = 0; 203 - pxmitpriv->voq_cnt = 0; 204 197 205 198 pxmitpriv->ack_tx = false; 206 199 mutex_init(&pxmitpriv->ack_tx_mutex); 207 200 rtw_sctx_init(&pxmitpriv->ack_tx_ops, 0); 208 201 209 - rtl8188eu_init_xmit_priv(padapter); 202 + tasklet_init(&pxmitpriv->xmit_tasklet, rtl8188eu_xmit_tasklet, (unsigned long)padapter); 210 203 211 204 return 0; 212 205 ··· 279 296 280 297 vfree(pxmitpriv->pallocated_xmit_extbuf); 281 298 282 - rtw_free_hwxmits(padapter); 299 + kfree(pxmitpriv->hwxmits); 283 300 284 301 mutex_destroy(&pxmitpriv->ack_tx_mutex); 285 302 } ··· 744 761 return _SUCCESS; 745 762 } 746 763 747 - static s32 xmitframe_swencrypt(struct adapter *padapter, struct xmit_frame *pxmitframe) 764 + static void xmitframe_swencrypt(struct adapter *padapter, struct xmit_frame *pxmitframe) 748 765 { 749 766 struct pkt_attrib *pattrib = &pxmitframe->attrib; 750 767 751 - if (pattrib->bswenc) { 752 - switch (pattrib->encrypt) { 753 - case _WEP40_: 754 - case _WEP104_: 755 - rtw_wep_encrypt(padapter, pxmitframe); 756 - break; 757 - case _TKIP_: 758 - rtw_tkip_encrypt(padapter, pxmitframe); 759 - break; 760 - case _AES_: 761 - rtw_aes_encrypt(padapter, pxmitframe); 762 - break; 763 - default: 764 - break; 765 - } 766 - } 768 + if (!pattrib->bswenc) 769 + return; 767 770 768 - return _SUCCESS; 771 + switch (pattrib->encrypt) { 772 + case _WEP40_: 773 + case _WEP104_: 774 + rtw_wep_encrypt(padapter, pxmitframe); 775 + break; 776 + case _TKIP_: 777 + rtw_tkip_encrypt(padapter, pxmitframe); 778 + break; 779 + case _AES_: 780 + rtw_aes_encrypt(padapter, pxmitframe); 781 + break; 782 + default: 783 + break; 784 + } 769 785 } 770 786 771 787 s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib) ··· 774 792 struct ieee80211_hdr *pwlanhdr = (struct ieee80211_hdr *)hdr; 775 793 struct mlme_priv *pmlmepriv = &padapter->mlmepriv; 776 794 struct qos_priv *pqospriv = &pmlmepriv->qospriv; 777 - u8 qos_option = false; 778 - 779 - int res = _SUCCESS; 795 + bool qos_option; 780 796 __le16 *fctrl = &pwlanhdr->frame_control; 781 797 782 798 struct sta_info *psta; ··· 790 810 791 811 SetFrameSubType(fctrl, pattrib->subtype); 792 812 793 - if (pattrib->subtype & IEEE80211_FTYPE_DATA) { 794 - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { 795 - /* to_ds = 1, fr_ds = 0; */ 796 - /* Data transfer to AP */ 797 - SetToDs(fctrl); 798 - memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); 799 - memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); 800 - memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); 813 + if (!(pattrib->subtype & IEEE80211_FTYPE_DATA)) 814 + return _SUCCESS; 801 815 802 - if (pqospriv->qos_option) 803 - qos_option = true; 804 - } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { 805 - /* to_ds = 0, fr_ds = 1; */ 806 - SetFrDs(fctrl); 807 - memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); 808 - memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); 809 - memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); 816 + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { 817 + /* to_ds = 1, fr_ds = 0; */ 818 + /* Data transfer to AP */ 819 + SetToDs(fctrl); 820 + memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); 821 + memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); 822 + memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); 823 + qos_option = pqospriv->qos_option; 824 + } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { 825 + /* to_ds = 0, fr_ds = 1; */ 826 + SetFrDs(fctrl); 827 + memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); 828 + memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); 829 + memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); 830 + qos_option = psta->qos_option; 831 + } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || 832 + check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { 833 + memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); 834 + memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); 835 + memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); 836 + qos_option = psta->qos_option; 837 + } else { 838 + return _FAIL; 839 + } 810 840 811 - if (psta->qos_option) 812 - qos_option = true; 813 - } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || 814 - check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { 815 - memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); 816 - memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); 817 - memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); 841 + if (pattrib->mdata) 842 + SetMData(fctrl); 818 843 819 - if (psta->qos_option) 820 - qos_option = true; 821 - } else { 822 - res = _FAIL; 823 - goto exit; 844 + if (pattrib->encrypt) 845 + SetPrivacy(fctrl); 846 + 847 + if (qos_option) { 848 + qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); 849 + 850 + if (pattrib->priority) 851 + SetPriority(qc, pattrib->priority); 852 + 853 + SetEOSP(qc, pattrib->eosp); 854 + 855 + SetAckpolicy(qc, pattrib->ack_policy); 856 + } 857 + 858 + /* TODO: fill HT Control Field */ 859 + 860 + /* Update Seq Num will be handled by f/w */ 861 + if (psta) { 862 + psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; 863 + psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; 864 + 865 + pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; 866 + 867 + SetSeqNum(hdr, pattrib->seqnum); 868 + 869 + /* check if enable ampdu */ 870 + if (pattrib->ht_en && psta->htpriv.ampdu_enable) { 871 + if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) 872 + pattrib->ampdu_en = true; 824 873 } 825 874 826 - if (pattrib->mdata) 827 - SetMData(fctrl); 875 + /* re-check if enable ampdu by BA_starting_seqctrl */ 876 + if (pattrib->ampdu_en) { 877 + u16 tx_seq; 828 878 829 - if (pattrib->encrypt) 830 - SetPrivacy(fctrl); 879 + tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; 831 880 832 - if (qos_option) { 833 - qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); 881 + /* check BA_starting_seqctrl */ 882 + if (SN_LESS(pattrib->seqnum, tx_seq)) { 883 + pattrib->ampdu_en = false;/* AGG BK */ 884 + } else if (SN_EQUAL(pattrib->seqnum, tx_seq)) { 885 + psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq + 1) & 0xfff; 834 886 835 - if (pattrib->priority) 836 - SetPriority(qc, pattrib->priority); 837 - 838 - SetEOSP(qc, pattrib->eosp); 839 - 840 - SetAckpolicy(qc, pattrib->ack_policy); 841 - } 842 - 843 - /* TODO: fill HT Control Field */ 844 - 845 - /* Update Seq Num will be handled by f/w */ 846 - if (psta) { 847 - psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; 848 - psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; 849 - 850 - pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; 851 - 852 - SetSeqNum(hdr, pattrib->seqnum); 853 - 854 - /* check if enable ampdu */ 855 - if (pattrib->ht_en && psta->htpriv.ampdu_enable) { 856 - if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) 857 - pattrib->ampdu_en = true; 858 - } 859 - 860 - /* re-check if enable ampdu by BA_starting_seqctrl */ 861 - if (pattrib->ampdu_en) { 862 - u16 tx_seq; 863 - 864 - tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; 865 - 866 - /* check BA_starting_seqctrl */ 867 - if (SN_LESS(pattrib->seqnum, tx_seq)) { 868 - pattrib->ampdu_en = false;/* AGG BK */ 869 - } else if (SN_EQUAL(pattrib->seqnum, tx_seq)) { 870 - psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq + 1) & 0xfff; 871 - 872 - pattrib->ampdu_en = true;/* AGG EN */ 873 - } else { 874 - psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum + 1) & 0xfff; 875 - pattrib->ampdu_en = true;/* AGG EN */ 876 - } 887 + pattrib->ampdu_en = true;/* AGG EN */ 888 + } else { 889 + psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum + 1) & 0xfff; 890 + pattrib->ampdu_en = true;/* AGG EN */ 877 891 } 878 892 } 879 893 } 880 - exit: 881 894 882 - return res; 895 + return _SUCCESS; 883 896 } 884 897 885 898 s32 rtw_txframes_pending(struct adapter *padapter) 886 899 { 887 900 struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 888 901 889 - return (!list_empty(&pxmitpriv->be_pending.queue) || 890 - !list_empty(&pxmitpriv->bk_pending.queue) || 891 - !list_empty(&pxmitpriv->vi_pending.queue) || 892 - !list_empty(&pxmitpriv->vo_pending.queue)); 902 + return (!list_empty(&pxmitpriv->be_pending) || 903 + !list_empty(&pxmitpriv->bk_pending) || 904 + !list_empty(&pxmitpriv->vi_pending) || 905 + !list_empty(&pxmitpriv->vo_pending)); 893 906 } 894 907 895 908 s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, struct pkt_attrib *pattrib) ··· 983 1010 984 1011 /* adding icv, if necessary... */ 985 1012 if (pattrib->iv_len) { 986 - if (psta) { 987 - switch (pattrib->encrypt) { 988 - case _WEP40_: 989 - case _WEP104_: 990 - WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 991 - break; 992 - case _TKIP_: 993 - if (bmcst) 994 - TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 995 - else 996 - TKIP_IV(pattrib->iv, psta->dot11txpn, 0); 997 - break; 998 - case _AES_: 999 - if (bmcst) 1000 - AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 1001 - else 1002 - AES_IV(pattrib->iv, psta->dot11txpn, 0); 1003 - break; 1004 - } 1013 + switch (pattrib->encrypt) { 1014 + case _WEP40_: 1015 + case _WEP104_: 1016 + WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 1017 + break; 1018 + case _TKIP_: 1019 + if (bmcst) 1020 + TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 1021 + else 1022 + TKIP_IV(pattrib->iv, psta->dot11txpn, 0); 1023 + break; 1024 + case _AES_: 1025 + if (bmcst) 1026 + AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); 1027 + else 1028 + AES_IV(pattrib->iv, psta->dot11txpn, 0); 1029 + break; 1005 1030 } 1006 1031 1007 1032 memcpy(pframe, pattrib->iv, pattrib->iv_len); ··· 1095 1124 *(__be16 *)(data + SNAP_SIZE) = htons(h_proto); 1096 1125 1097 1126 return SNAP_SIZE + sizeof(u16); 1098 - } 1099 - 1100 - void rtw_update_protection(struct adapter *padapter, u8 *ie, uint ie_len) 1101 - { 1102 - uint protection; 1103 - u8 *perp; 1104 - int erp_len; 1105 - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 1106 - struct registry_priv *pregistrypriv = &padapter->registrypriv; 1107 - 1108 - switch (pxmitpriv->vcs_setting) { 1109 - case DISABLE_VCS: 1110 - pxmitpriv->vcs = NONE_VCS; 1111 - break; 1112 - case ENABLE_VCS: 1113 - break; 1114 - case AUTO_VCS: 1115 - default: 1116 - perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); 1117 - if (!perp) { 1118 - pxmitpriv->vcs = NONE_VCS; 1119 - } else { 1120 - protection = (*(perp + 2)) & BIT(1); 1121 - if (protection) { 1122 - if (pregistrypriv->vcs_type == RTS_CTS) 1123 - pxmitpriv->vcs = RTS_CTS; 1124 - else 1125 - pxmitpriv->vcs = CTS_TO_SELF; 1126 - } else { 1127 - pxmitpriv->vcs = NONE_VCS; 1128 - } 1129 - } 1130 - break; 1131 - } 1132 1127 } 1133 1128 1134 1129 void rtw_count_tx_stats(struct adapter *padapter, struct xmit_frame *pxmitframe, int sz) ··· 1256 1319 1257 1320 spin_lock_bh(&pfree_xmit_queue->lock); 1258 1321 1259 - if (list_empty(&pfree_xmit_queue->queue)) { 1260 - pxframe = NULL; 1261 - } else { 1262 - phead = get_list_head(pfree_xmit_queue); 1322 + if (list_empty(&pfree_xmit_queue->queue)) 1323 + goto out; 1263 1324 1264 - plist = phead->next; 1325 + phead = get_list_head(pfree_xmit_queue); 1326 + plist = phead->next; 1327 + pxframe = container_of(plist, struct xmit_frame, list); 1328 + list_del_init(&pxframe->list); 1265 1329 1266 - pxframe = container_of(plist, struct xmit_frame, list); 1330 + pxmitpriv->free_xmitframe_cnt--; 1267 1331 1268 - list_del_init(&pxframe->list); 1269 - } 1332 + pxframe->buf_addr = NULL; 1333 + pxframe->pxmitbuf = NULL; 1270 1334 1271 - if (pxframe) { /* default value setting */ 1272 - pxmitpriv->free_xmitframe_cnt--; 1335 + memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); 1336 + /* pxframe->attrib.psta = NULL; */ 1273 1337 1274 - pxframe->buf_addr = NULL; 1275 - pxframe->pxmitbuf = NULL; 1338 + pxframe->frame_tag = DATA_FRAMETAG; 1276 1339 1277 - memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); 1278 - /* pxframe->attrib.psta = NULL; */ 1340 + pxframe->pkt = NULL; 1341 + pxframe->pkt_offset = 1;/* default use pkt_offset to fill tx desc */ 1279 1342 1280 - pxframe->frame_tag = DATA_FRAMETAG; 1343 + pxframe->agg_num = 1; 1344 + pxframe->ack_report = 0; 1281 1345 1282 - pxframe->pkt = NULL; 1283 - pxframe->pkt_offset = 1;/* default use pkt_offset to fill tx desc */ 1284 - 1285 - pxframe->agg_num = 1; 1286 - pxframe->ack_report = 0; 1287 - } 1288 - 1346 + out: 1289 1347 spin_unlock_bh(&pfree_xmit_queue->lock); 1290 - 1291 1348 return pxframe; 1292 1349 } 1293 1350 ··· 1317 1386 return _SUCCESS; 1318 1387 } 1319 1388 1320 - void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, struct __queue *pframequeue) 1389 + void rtw_free_xmitframe_list(struct xmit_priv *pxmitpriv, struct list_head *xframe_list) 1321 1390 { 1322 - struct list_head *plist, *phead; 1323 - struct xmit_frame *pxmitframe; 1391 + struct xmit_frame *pxmitframe, *tmp_xmitframe; 1324 1392 1325 - spin_lock_bh(&pframequeue->lock); 1326 - 1327 - phead = get_list_head(pframequeue); 1328 - plist = phead->next; 1329 - 1330 - while (phead != plist) { 1331 - pxmitframe = container_of(plist, struct xmit_frame, list); 1332 - 1333 - plist = plist->next; 1334 - 1393 + list_for_each_entry_safe(pxmitframe, tmp_xmitframe, xframe_list, list) 1335 1394 rtw_free_xmitframe(pxmitpriv, pxmitframe); 1336 - } 1337 - spin_unlock_bh(&pframequeue->lock); 1338 1395 } 1339 1396 1340 - s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe) 1397 + struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i) 1341 1398 { 1342 - if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) { 1343 - /* pxmitframe->pkt = NULL; */ 1344 - return _FAIL; 1345 - } 1346 - 1347 - return _SUCCESS; 1348 - } 1349 - 1350 - static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, struct __queue *pframe_queue) 1351 - { 1352 - struct list_head *xmitframe_plist, *xmitframe_phead; 1353 - struct xmit_frame *pxmitframe = NULL; 1354 - 1355 - xmitframe_phead = get_list_head(pframe_queue); 1356 - xmitframe_plist = xmitframe_phead->next; 1357 - 1358 - if (xmitframe_phead != xmitframe_plist) { 1359 - pxmitframe = container_of(xmitframe_plist, struct xmit_frame, list); 1360 - 1361 - xmitframe_plist = xmitframe_plist->next; 1362 - 1363 - list_del_init(&pxmitframe->list); 1364 - 1365 - ptxservq->qcnt--; 1366 - } 1367 - return pxmitframe; 1368 - } 1369 - 1370 - struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, int entry) 1371 - { 1372 - struct list_head *sta_plist, *sta_phead; 1373 1399 struct hw_xmit *phwxmit; 1374 - struct tx_servq *ptxservq = NULL; 1375 - struct __queue *pframe_queue = NULL; 1400 + struct tx_servq *ptxservq, *tmp_txservq; 1401 + struct list_head *xframe_list; 1376 1402 struct xmit_frame *pxmitframe = NULL; 1377 1403 struct adapter *padapter = pxmitpriv->adapter; 1378 1404 struct registry_priv *pregpriv = &padapter->registrypriv; 1379 - int i, inx[4]; 1380 - 1381 - inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; 1405 + int i, inx[] = { 0, 1, 2, 3 }; 1382 1406 1383 1407 if (pregpriv->wifi_spec == 1) { 1384 - int j; 1385 - 1386 - for (j = 0; j < 4; j++) 1387 - inx[j] = pxmitpriv->wmm_para_seq[j]; 1408 + for (i = 0; i < ARRAY_SIZE(inx); i++) 1409 + inx[i] = pxmitpriv->wmm_para_seq[i]; 1388 1410 } 1389 1411 1390 1412 spin_lock_bh(&pxmitpriv->lock); 1391 1413 1392 - for (i = 0; i < entry; i++) { 1414 + for (i = 0; i < HWXMIT_ENTRY; i++) { 1393 1415 phwxmit = phwxmit_i + inx[i]; 1416 + list_for_each_entry_safe(ptxservq, tmp_txservq, phwxmit->sta_list, tx_pending) { 1417 + xframe_list = &ptxservq->sta_pending; 1418 + if (list_empty(xframe_list)) 1419 + continue; 1394 1420 1395 - sta_phead = get_list_head(phwxmit->sta_queue); 1396 - sta_plist = sta_phead->next; 1421 + pxmitframe = container_of(xframe_list->next, struct xmit_frame, list); 1422 + list_del_init(&pxmitframe->list); 1397 1423 1398 - while (sta_phead != sta_plist) { 1399 - ptxservq = container_of(sta_plist, struct tx_servq, tx_pending); 1424 + phwxmit->accnt--; 1425 + ptxservq->qcnt--; 1400 1426 1401 - pframe_queue = &ptxservq->sta_pending; 1427 + /* Remove sta node when there are no pending packets. */ 1428 + if (list_empty(xframe_list)) 1429 + list_del_init(&ptxservq->tx_pending); 1402 1430 1403 - pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); 1404 - 1405 - if (pxmitframe) { 1406 - phwxmit->accnt--; 1407 - 1408 - /* Remove sta node when there are no pending packets. */ 1409 - if (list_empty(&pframe_queue->queue)) /* must be done after get_next and before break */ 1410 - list_del_init(&ptxservq->tx_pending); 1411 - goto exit; 1412 - } 1413 - 1414 - sta_plist = sta_plist->next; 1431 + goto exit; 1415 1432 } 1416 1433 } 1417 1434 exit: ··· 1426 1547 ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); 1427 1548 1428 1549 if (list_empty(&ptxservq->tx_pending)) 1429 - list_add_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue)); 1550 + list_add_tail(&ptxservq->tx_pending, phwxmits[ac_index].sta_list); 1430 1551 1431 - list_add_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); 1552 + list_add_tail(&pxmitframe->list, &ptxservq->sta_pending); 1432 1553 ptxservq->qcnt++; 1433 1554 phwxmits[ac_index].accnt++; 1434 1555 exit: ··· 1441 1562 struct hw_xmit *hwxmits; 1442 1563 struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 1443 1564 1444 - pxmitpriv->hwxmit_entry = HWXMIT_ENTRY; 1445 - 1446 - pxmitpriv->hwxmits = kzalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry, GFP_KERNEL); 1565 + pxmitpriv->hwxmits = kcalloc(HWXMIT_ENTRY, sizeof(struct hw_xmit), GFP_KERNEL); 1447 1566 if (!pxmitpriv->hwxmits) 1448 1567 return -ENOMEM; 1449 1568 1450 1569 hwxmits = pxmitpriv->hwxmits; 1451 1570 1452 - hwxmits[0].sta_queue = &pxmitpriv->vo_pending; 1453 - hwxmits[1].sta_queue = &pxmitpriv->vi_pending; 1454 - hwxmits[2].sta_queue = &pxmitpriv->be_pending; 1455 - hwxmits[3].sta_queue = &pxmitpriv->bk_pending; 1571 + hwxmits[0].sta_list = &pxmitpriv->vo_pending; 1572 + hwxmits[1].sta_list = &pxmitpriv->vi_pending; 1573 + hwxmits[2].sta_list = &pxmitpriv->be_pending; 1574 + hwxmits[3].sta_list = &pxmitpriv->bk_pending; 1456 1575 1457 1576 return 0; 1458 - } 1459 - 1460 - void rtw_free_hwxmits(struct adapter *padapter) 1461 - { 1462 - struct hw_xmit *hwxmits; 1463 - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 1464 - 1465 - hwxmits = pxmitpriv->hwxmits; 1466 - kfree(hwxmits); 1467 - } 1468 - 1469 - void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry) 1470 - { 1471 - int i; 1472 - 1473 - for (i = 0; i < entry; i++, phwxmit++) 1474 - phwxmit->accnt = 0; 1475 1577 } 1476 1578 1477 1579 static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb) ··· 1603 1743 return addr; 1604 1744 } 1605 1745 1606 - static void do_queue_select(struct adapter *padapter, struct pkt_attrib *pattrib) 1607 - { 1608 - u8 qsel; 1609 - 1610 - qsel = pattrib->priority; 1611 - 1612 - pattrib->qsel = qsel; 1613 - } 1614 - 1615 1746 /* 1616 1747 * The main transmit(tx) entry 1617 1748 * ··· 1616 1765 struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 1617 1766 struct xmit_frame *pxmitframe = NULL; 1618 1767 struct mlme_priv *pmlmepriv = &padapter->mlmepriv; 1619 - void *br_port = NULL; 1620 1768 s32 res; 1621 1769 1622 1770 pxmitframe = rtw_alloc_xmitframe(pxmitpriv); 1623 1771 if (!pxmitframe) 1624 1772 return -1; 1625 1773 1626 - rcu_read_lock(); 1627 - br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); 1628 - rcu_read_unlock(); 1629 - 1630 - if (br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE)) { 1774 + if (rcu_access_pointer(padapter->pnetdev->rx_handler_data) && 1775 + check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE)) { 1631 1776 res = rtw_br_client_tx(padapter, ppkt); 1632 1777 if (res == -1) { 1633 1778 rtw_free_xmitframe(pxmitpriv, pxmitframe); ··· 1641 1794 1642 1795 rtw_led_control(padapter, LED_CTL_TX); 1643 1796 1644 - do_queue_select(padapter, &pxmitframe->attrib); 1797 + pxmitframe->attrib.qsel = pxmitframe->attrib.priority; 1645 1798 1646 1799 spin_lock_bh(&pxmitpriv->lock); 1647 1800 if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)) { ··· 1758 1911 return ret; 1759 1912 } 1760 1913 1761 - static void dequeue_xmitframes_to_sleeping_queue(struct adapter *padapter, struct sta_info *psta, struct __queue *pframequeue) 1914 + static void dequeue_xmitframes_to_sleeping_queue(struct adapter *padapter, struct sta_info *psta, struct list_head *phead) 1762 1915 { 1763 - struct list_head *plist, *phead; 1916 + struct list_head *plist; 1764 1917 u8 ac_index; 1765 1918 struct tx_servq *ptxservq; 1766 1919 struct pkt_attrib *pattrib; 1767 1920 struct xmit_frame *pxmitframe; 1768 1921 struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; 1769 1922 1770 - phead = get_list_head(pframequeue); 1771 1923 plist = phead->next; 1772 1924 1773 1925 while (phead != plist) {

+2 -2

drivers/staging/r8188eu/hal/rtl8188e_cmd.c

··· 193 193 194 194 } 195 195 196 - void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt) 196 + void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, u16 mstatus_rpt) 197 197 { 198 - u16 mst_rpt = le16_to_cpu(mstatus_rpt); 198 + __le16 mst_rpt = cpu_to_le16(mstatus_rpt); 199 199 200 200 FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); 201 201 }

+18 -17

drivers/staging/r8188eu/hal/rtl8188e_phycfg.c

··· 315 315 * 08/12/2008 MHC Create Version 0. 316 316 * 317 317 *---------------------------------------------------------------------------*/ 318 - s32 PHY_MACConfig8188E(struct adapter *Adapter) 318 + int PHY_MACConfig8188E(struct adapter *Adapter) 319 319 { 320 320 struct hal_data_8188e *pHalData = &Adapter->haldata; 321 - int rtStatus = _SUCCESS; 321 + int err; 322 322 323 323 /* */ 324 324 /* Config MAC */ 325 325 /* */ 326 - if (ODM_ReadAndConfig_MAC_REG_8188E(&pHalData->odmpriv)) 327 - rtStatus = _FAIL; 326 + err = ODM_ReadAndConfig_MAC_REG_8188E(&pHalData->odmpriv); 328 327 329 328 /* 2010.07.13 AMPDU aggregation number B */ 330 329 rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); 331 330 332 - return rtStatus; 331 + return err; 333 332 } 334 333 335 334 /** ··· 449 450 { 450 451 struct eeprom_priv *pEEPROM = &Adapter->eeprompriv; 451 452 struct hal_data_8188e *pHalData = &Adapter->haldata; 453 + int err; 452 454 453 455 /* */ 454 456 /* 1. Read PHY_REG.TXT BB INIT!! */ 455 457 /* We will separate as 88C / 92C according to chip version */ 456 458 /* */ 457 - if (ODM_ReadAndConfig_PHY_REG_1T_8188E(&pHalData->odmpriv)) 458 - return _FAIL; 459 + err = ODM_ReadAndConfig_PHY_REG_1T_8188E(&pHalData->odmpriv); 460 + if (err) 461 + return err; 459 462 460 463 /* 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */ 461 464 if (!pEEPROM->bautoload_fail_flag) { ··· 466 465 } 467 466 468 467 /* 3. BB AGC table Initialization */ 469 - if (ODM_ReadAndConfig_AGC_TAB_1T_8188E(&pHalData->odmpriv)) 470 - return _FAIL; 468 + err = ODM_ReadAndConfig_AGC_TAB_1T_8188E(&pHalData->odmpriv); 469 + if (err) 470 + return err; 471 471 472 - return _SUCCESS; 472 + return 0; 473 473 } 474 474 475 475 int ··· 478 476 struct adapter *Adapter 479 477 ) 480 478 { 481 - int rtStatus = _SUCCESS; 482 479 struct hal_data_8188e *pHalData = &Adapter->haldata; 483 480 u16 RegVal; 484 481 u8 CrystalCap; 485 - int res; 482 + int err; 486 483 487 484 phy_InitBBRFRegisterDefinition(Adapter); 488 485 489 486 /* Enable BB and RF */ 490 - res = rtw_read16(Adapter, REG_SYS_FUNC_EN, &RegVal); 491 - if (res) 492 - return _FAIL; 487 + err = rtw_read16(Adapter, REG_SYS_FUNC_EN, &RegVal); 488 + if (err) 489 + return err; 493 490 494 491 rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT(13) | BIT(0) | BIT(1))); 495 492 ··· 499 498 rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); 500 499 501 500 /* Config BB and AGC */ 502 - rtStatus = phy_BB8188E_Config_ParaFile(Adapter); 501 + err = phy_BB8188E_Config_ParaFile(Adapter); 503 502 504 503 /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ 505 504 CrystalCap = pHalData->CrystalCap & 0x3F; 506 505 rtl8188e_PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); 507 506 508 - return rtStatus; 507 + return err; 509 508 } 510 509 511 510 static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel,

+3 -4

drivers/staging/r8188eu/hal/rtl8188e_rf6052.c

··· 371 371 struct bb_reg_def *pPhyReg; 372 372 struct hal_data_8188e *pHalData = &Adapter->haldata; 373 373 u32 u4RegValue = 0; 374 - int rtStatus = _SUCCESS; 374 + int err; 375 375 376 376 /* Initialize RF */ 377 377 ··· 396 396 udelay(1);/* PlatformStallExecution(1); */ 397 397 398 398 /*----Initialize RF fom connfiguration file----*/ 399 - if (ODM_ReadAndConfig_RadioA_1T_8188E(&pHalData->odmpriv)) 400 - rtStatus = _FAIL; 399 + err = ODM_ReadAndConfig_RadioA_1T_8188E(&pHalData->odmpriv); 401 400 402 401 /*----Restore RFENV control type----*/; 403 402 rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); 404 403 405 - return rtStatus; 404 + return err; 406 405 }

+14 -28

drivers/staging/r8188eu/hal/rtl8188eu_xmit.c

··· 9 9 #include "../include/usb_ops.h" 10 10 #include "../include/rtl8188e_hal.h" 11 11 12 - s32 rtl8188eu_init_xmit_priv(struct adapter *adapt) 13 - { 14 - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; 15 - 16 - tasklet_init(&pxmitpriv->xmit_tasklet, 17 - rtl8188eu_xmit_tasklet, 18 - (unsigned long)adapt); 19 - return _SUCCESS; 20 - } 21 - 22 12 static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) 23 13 { 24 14 u16 *usptr = (u16 *)ptxdesc; ··· 137 147 } 138 148 } 139 149 140 - static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt) 150 + static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz) 141 151 { 142 152 uint qsel; 143 153 u8 data_rate, pwr_status, offset; ··· 319 329 sz = pattrib->last_txcmdsz; 320 330 } 321 331 322 - pull = update_txdesc(pxmitframe, mem_addr, sz, false); 332 + pull = update_txdesc(pxmitframe, mem_addr, sz); 323 333 324 334 if (pull) { 325 335 mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */ ··· 365 375 return len; 366 376 } 367 377 368 - bool rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) 378 + bool rtl8188eu_xmitframe_complete(struct adapter *adapt) 369 379 { 380 + struct xmit_priv *pxmitpriv = &adapt->xmitpriv; 370 381 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt); 371 382 struct xmit_frame *pxmitframe = NULL; 372 383 struct xmit_frame *pfirstframe = NULL; 384 + struct xmit_buf *pxmitbuf; 373 385 374 386 /* aggregate variable */ 375 387 struct hw_xmit *phwxmit; ··· 395 403 else 396 404 bulksize = USB_FULL_SPEED_BULK_SIZE; 397 405 398 - /* check xmitbuffer is ok */ 399 - if (!pxmitbuf) { 400 - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); 401 - if (!pxmitbuf) 402 - return false; 403 - } 406 + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); 407 + if (!pxmitbuf) 408 + return false; 404 409 405 - /* 3 1. pick up first frame */ 406 - rtw_free_xmitframe(pxmitpriv, pxmitframe); 407 - 408 - pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); 410 + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits); 409 411 if (!pxmitframe) { 410 412 /* no more xmit frame, release xmit buffer */ 411 413 rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ··· 461 475 } 462 476 spin_lock_bh(&pxmitpriv->lock); 463 477 464 - xmitframe_phead = get_list_head(&ptxservq->sta_pending); 478 + xmitframe_phead = &ptxservq->sta_pending; 465 479 xmitframe_plist = xmitframe_phead->next; 466 480 467 481 while (xmitframe_phead != xmitframe_plist) { ··· 489 503 rtw_xmit_complete(adapt, pxmitframe); 490 504 491 505 /* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */ 492 - update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true); 506 + update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz); 493 507 494 508 /* don't need xmitframe any more */ 495 509 rtw_free_xmitframe(pxmitpriv, pxmitframe); ··· 512 526 } 513 527 } /* end while (aggregate same priority and same DA(AP or STA) frames) */ 514 528 515 - if (list_empty(&ptxservq->sta_pending.queue)) 529 + if (list_empty(&ptxservq->sta_pending)) 516 530 list_del_init(&ptxservq->tx_pending); 517 531 518 532 spin_unlock_bh(&pxmitpriv->lock); ··· 529 543 pfirstframe->pkt_offset--; 530 544 } 531 545 532 - update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true); 546 + update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz); 533 547 534 548 /* 3 4. write xmit buffer to USB FIFO */ 535 549 ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); ··· 596 610 return true; 597 611 598 612 enqueue: 599 - res = rtw_xmitframe_enqueue(adapt, pxmitframe); 613 + res = rtw_xmit_classifier(adapt, pxmitframe); 600 614 spin_unlock_bh(&pxmitpriv->lock); 601 615 602 616 if (res != _SUCCESS) {

+12 -19

drivers/staging/r8188eu/hal/usb_halinit.c

··· 600 600 Adapter->pwrctrlpriv.bFwCurrentInPSMode = false; 601 601 haldata->LastHMEBoxNum = 0; 602 602 603 - status = PHY_MACConfig8188E(Adapter); 604 - if (status == _FAIL) 605 - goto exit; 603 + if (PHY_MACConfig8188E(Adapter)) 604 + return _FAIL; 606 605 607 606 /* */ 608 607 /* d. Initialize BB related configurations. */ 609 608 /* */ 610 - status = PHY_BBConfig8188E(Adapter); 611 - if (status == _FAIL) 612 - goto exit; 609 + if (PHY_BBConfig8188E(Adapter)) 610 + return _FAIL; 613 611 614 - status = phy_RF6052_Config_ParaFile(Adapter); 615 - if (status == _FAIL) 616 - goto exit; 612 + if (phy_RF6052_Config_ParaFile(Adapter)) 613 + return _FAIL; 617 614 618 615 status = rtl8188e_iol_efuse_patch(Adapter); 619 616 if (status == _FAIL) ··· 848 851 return _SUCCESS; 849 852 } 850 853 851 - unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) 854 + int rtl8188eu_inirp_init(struct adapter *Adapter) 852 855 { 853 856 u8 i; 854 857 struct recv_buf *precvbuf; 855 - uint status; 856 858 struct recv_priv *precvpriv = &Adapter->recvpriv; 857 - 858 - status = _SUCCESS; 859 + int ret; 859 860 860 861 /* issue Rx irp to receive data */ 861 862 precvbuf = (struct recv_buf *)precvpriv->precv_buf; 862 863 for (i = 0; i < NR_RECVBUFF; i++) { 863 - if (!rtw_read_port(Adapter, (unsigned char *)precvbuf)) { 864 - status = _FAIL; 865 - goto exit; 866 - } 864 + ret = rtw_read_port(Adapter, precvbuf); 865 + if (ret) 866 + return ret; 867 867 868 868 precvbuf++; 869 869 precvpriv->free_recv_buf_queue_cnt--; 870 870 } 871 871 872 - exit: 873 - return status; 872 + return 0; 874 873 } 875 874 876 875 /* */

+27 -53

drivers/staging/r8188eu/hal/usb_ops_linux.c

··· 7 7 #include "../include/usb_ops.h" 8 8 #include "../include/rtl8188e_hal.h" 9 9 10 - static int usb_read(struct intf_hdl *intf, u16 value, void *data, u8 size) 10 + #define VENDOR_CMD_MAX_DATA_LEN 254 11 + 12 + #define RTW_USB_CONTROL_MSG_TIMEOUT 500/* ms */ 13 + 14 + static int usb_read(struct adapter *adapt, u16 value, void *data, u8 size) 11 15 { 12 - struct adapter *adapt = intf->padapter; 13 16 struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); 14 17 struct usb_device *udev = dvobjpriv->pusbdev; 15 18 int status; ··· 53 50 return status; 54 51 } 55 52 56 - static int usb_write(struct intf_hdl *intf, u16 value, void *data, u8 size) 53 + static int usb_write(struct adapter *adapt, u16 value, void *data, u8 size) 57 54 { 58 - struct adapter *adapt = intf->padapter; 59 55 struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); 60 56 struct usb_device *udev = dvobjpriv->pusbdev; 61 57 int status; ··· 97 95 98 96 int __must_check rtw_read8(struct adapter *adapter, u32 addr, u8 *data) 99 97 { 100 - struct io_priv *io_priv = &adapter->iopriv; 101 - struct intf_hdl *intf = &io_priv->intf; 102 98 u16 value = addr & 0xffff; 103 99 104 - return usb_read(intf, value, data, 1); 100 + return usb_read(adapter, value, data, 1); 105 101 } 106 102 107 103 int __must_check rtw_read16(struct adapter *adapter, u32 addr, u16 *data) 108 104 { 109 - struct io_priv *io_priv = &adapter->iopriv; 110 - struct intf_hdl *intf = &io_priv->intf; 111 105 u16 value = addr & 0xffff; 112 106 __le16 le_data; 113 107 int res; 114 108 115 - res = usb_read(intf, value, &le_data, 2); 109 + res = usb_read(adapter, value, &le_data, 2); 116 110 if (res) 117 111 return res; 118 112 ··· 119 121 120 122 int __must_check rtw_read32(struct adapter *adapter, u32 addr, u32 *data) 121 123 { 122 - struct io_priv *io_priv = &adapter->iopriv; 123 - struct intf_hdl *intf = &io_priv->intf; 124 124 u16 value = addr & 0xffff; 125 125 __le32 le_data; 126 126 int res; 127 127 128 - res = usb_read(intf, value, &le_data, 4); 128 + res = usb_read(adapter, value, &le_data, 4); 129 129 if (res) 130 130 return res; 131 131 ··· 134 138 135 139 int rtw_write8(struct adapter *adapter, u32 addr, u8 val) 136 140 { 137 - struct io_priv *io_priv = &adapter->iopriv; 138 - struct intf_hdl *intf = &io_priv->intf; 139 141 u16 value = addr & 0xffff; 140 142 int ret; 141 143 142 - ret = usb_write(intf, value, &val, 1); 144 + ret = usb_write(adapter, value, &val, 1); 143 145 144 146 return RTW_STATUS_CODE(ret); 145 147 } 146 148 147 149 int rtw_write16(struct adapter *adapter, u32 addr, u16 val) 148 150 { 149 - struct io_priv *io_priv = &adapter->iopriv; 150 - struct intf_hdl *intf = &io_priv->intf; 151 151 u16 value = addr & 0xffff; 152 152 __le16 data = cpu_to_le16(val); 153 153 int ret; 154 154 155 - ret = usb_write(intf, value, &data, 2); 155 + ret = usb_write(adapter, value, &data, 2); 156 156 157 157 return RTW_STATUS_CODE(ret); 158 158 } 159 159 160 160 int rtw_write32(struct adapter *adapter, u32 addr, u32 val) 161 161 { 162 - struct io_priv *io_priv = &adapter->iopriv; 163 - struct intf_hdl *intf = &io_priv->intf; 164 162 u16 value = addr & 0xffff; 165 163 __le32 data = cpu_to_le32(val); 166 164 int ret; 167 165 168 - ret = usb_write(intf, value, &data, 4); 166 + ret = usb_write(adapter, value, &data, 4); 169 167 170 168 return RTW_STATUS_CODE(ret); 171 169 } 172 170 173 171 int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *data) 174 172 { 175 - struct io_priv *io_priv = &adapter->iopriv; 176 - struct intf_hdl *intf = &io_priv->intf; 177 173 u16 value = addr & 0xffff; 178 - int ret; 179 174 180 175 if (length > VENDOR_CMD_MAX_DATA_LEN) 181 - return _FAIL; 176 + return -EINVAL; 182 177 183 - ret = usb_write(intf, value, data, length); 184 - 185 - return RTW_STATUS_CODE(ret); 178 + return usb_write(adapter, value, data, length); 186 179 } 187 180 188 181 static void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf) ··· 348 363 } 349 364 } 350 365 351 - static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) 366 + static void usb_read_port_complete(struct urb *purb) 352 367 { 353 368 struct recv_buf *precvbuf = (struct recv_buf *)purb->context; 354 369 struct adapter *adapt = (struct adapter *)precvbuf->adapter; ··· 364 379 if (purb->status == 0) { /* SUCCESS */ 365 380 if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { 366 381 precvbuf->reuse = true; 367 - rtw_read_port(adapt, (unsigned char *)precvbuf); 382 + rtw_read_port(adapt, precvbuf); 368 383 } else { 369 384 rtw_reset_continual_urb_error(adapter_to_dvobj(adapt)); 370 385 ··· 376 391 377 392 precvbuf->pskb = NULL; 378 393 precvbuf->reuse = false; 379 - rtw_read_port(adapt, (unsigned char *)precvbuf); 394 + rtw_read_port(adapt, precvbuf); 380 395 } 381 396 } else { 382 397 skb_put(precvbuf->pskb, purb->actual_length); ··· 396 411 case -EPROTO: 397 412 case -EOVERFLOW: 398 413 precvbuf->reuse = true; 399 - rtw_read_port(adapt, (unsigned char *)precvbuf); 414 + rtw_read_port(adapt, precvbuf); 400 415 break; 401 416 case -EINPROGRESS: 402 417 break; ··· 406 421 } 407 422 } 408 423 409 - u32 rtw_read_port(struct adapter *adapter, u8 *rmem) 424 + int rtw_read_port(struct adapter *adapter, struct recv_buf *precvbuf) 410 425 { 411 426 struct urb *purb = NULL; 412 - struct recv_buf *precvbuf = (struct recv_buf *)rmem; 413 427 struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); 414 428 struct recv_priv *precvpriv = &adapter->recvpriv; 415 429 struct usb_device *pusbd = pdvobj->pusbdev; ··· 416 432 unsigned int pipe; 417 433 size_t tmpaddr = 0; 418 434 size_t alignment = 0; 419 - u32 ret = _SUCCESS; 420 435 421 436 if (adapter->bDriverStopped || adapter->bSurpriseRemoved) 422 - return _FAIL; 437 + return -EPERM; 423 438 424 439 if (!precvbuf) 425 - return _FAIL; 440 + return -ENOMEM; 426 441 427 442 if (!precvbuf->reuse || !precvbuf->pskb) { 428 443 precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue); ··· 433 450 if (!precvbuf->reuse || !precvbuf->pskb) { 434 451 precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); 435 452 if (!precvbuf->pskb) 436 - return _FAIL; 453 + return -ENOMEM; 437 454 438 455 tmpaddr = (size_t)precvbuf->pskb->data; 439 456 alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1); ··· 457 474 458 475 err = usb_submit_urb(purb, GFP_ATOMIC); 459 476 if ((err) && (err != (-EPERM))) 460 - ret = _FAIL; 477 + return err; 461 478 462 - return ret; 479 + return 0; 463 480 } 464 481 465 482 void rtl8188eu_xmit_tasklet(unsigned long priv) 466 483 { 467 - int ret = false; 468 484 struct adapter *adapt = (struct adapter *)priv; 469 - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; 470 485 471 486 if (check_fwstate(&adapt->mlmepriv, _FW_UNDER_SURVEY)) 472 487 return; 473 488 474 - while (1) { 475 - if ((adapt->bDriverStopped) || 476 - (adapt->bSurpriseRemoved) || 477 - (adapt->bWritePortCancel)) 489 + do { 490 + if (adapt->bDriverStopped || adapt->bSurpriseRemoved || adapt->bWritePortCancel) 478 491 break; 479 - 480 - ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv, NULL); 481 - 482 - if (!ret) 483 - break; 484 - } 492 + } while (rtl8188eu_xmitframe_complete(adapt)); 485 493 }

-4

drivers/staging/r8188eu/include/drv_types.h

··· 152 152 struct mlme_ext_priv mlmeextpriv; 153 153 struct cmd_priv cmdpriv; 154 154 struct evt_priv evtpriv; 155 - struct io_priv iopriv; 156 155 struct xmit_priv xmitpriv; 157 156 struct recv_priv recvpriv; 158 157 struct sta_priv stapriv; ··· 171 172 s8 signal_strength; 172 173 173 174 void *cmdThread; 174 - void (*intf_start)(struct adapter *adapter); 175 - void (*intf_stop)(struct adapter *adapter); 176 175 struct net_device *pnetdev; 177 176 178 177 /* used by rtw_rereg_nd_name related function */ ··· 184 187 int bup; 185 188 struct net_device_stats stats; 186 189 struct iw_statistics iwstats; 187 - struct proc_dir_entry *dir_dev;/* for proc directory */ 188 190 189 191 int net_closed; 190 192 u8 bFWReady;

+1 -1

drivers/staging/r8188eu/include/hal_intf.h

··· 26 26 int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, 27 27 struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); 28 28 29 - unsigned int rtl8188eu_inirp_init(struct adapter *Adapter); 29 + int rtl8188eu_inirp_init(struct adapter *Adapter); 30 30 31 31 uint rtw_hal_init(struct adapter *padapter); 32 32 uint rtw_hal_deinit(struct adapter *padapter);

-32

drivers/staging/r8188eu/include/osdep_intf.h

··· 7 7 #include "osdep_service.h" 8 8 #include "drv_types.h" 9 9 10 - struct intf_priv { 11 - u8 *intf_dev; 12 - u32 max_iosz; /* USB2.0: 128, USB1.1: 64, SDIO:64 */ 13 - u32 max_xmitsz; /* USB2.0: unlimited, SDIO:512 */ 14 - u32 max_recvsz; /* USB2.0: unlimited, SDIO:512 */ 15 - 16 - u8 *io_rwmem; 17 - u8 *allocated_io_rwmem; 18 - u32 io_wsz; /* unit: 4bytes */ 19 - u32 io_rsz;/* unit: 4bytes */ 20 - u8 intf_status; 21 - 22 - void (*_bus_io)(u8 *priv); 23 - 24 - /* 25 - Under Sync. IRP (SDIO/USB) 26 - A protection mechanism is necessary for the io_rwmem(read/write protocol) 27 - 28 - Under Async. IRP (SDIO/USB) 29 - The protection mechanism is through the pending queue. 30 - */ 31 - struct mutex ioctl_mutex; 32 - /* when in USB, IO is through interrupt in/out endpoints */ 33 - struct usb_device *udev; 34 - struct urb *piorw_urb; 35 - u8 io_irp_cnt; 36 - u8 bio_irp_pending; 37 - struct timer_list io_timer; 38 - u8 bio_irp_timeout; 39 - u8 bio_timer_cancel; 40 - }; 41 - 42 10 int netdev_open(struct net_device *pnetdev); 43 11 int netdev_close(struct net_device *pnetdev); 44 12

+1 -1

drivers/staging/r8188eu/include/rtl8188e_cmd.h

··· 85 85 void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state); 86 86 87 87 void CheckFwRsvdPageContent(struct adapter *adapt); 88 - void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt); 88 + void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, u16 mstatus_rpt); 89 89 90 90 #endif/* __RTL8188E_CMD_H__ */

-21

drivers/staging/r8188eu/include/rtl8188e_spec.h

··· 510 510 /* 8192C BW_OPMODE bits (Offset 0x203, 8bit) */ 511 511 #define BW_OPMODE_20MHZ BIT(2) 512 512 513 - /* 8192C CAM Config Setting (offset 0x250, 1 byte) */ 514 - #define CAM_VALID BIT(15) 515 - #define CAM_NOTVALID 0x0000 516 - #define CAM_USEDK BIT(5) 517 - 518 - #define CAM_CONTENT_COUNT 8 519 - 520 - #define CAM_NONE 0x0 521 - #define CAM_WEP40 0x01 522 - #define CAM_TKIP 0x02 523 - #define CAM_AES 0x04 524 - #define CAM_WEP104 0x05 525 - #define CAM_SMS4 0x6 526 - 527 - #define TOTAL_CAM_ENTRY 32 528 - #define HALF_CAM_ENTRY 16 529 - 530 - #define CAM_CONFIG_USEDK true 531 - #define CAM_CONFIG_NO_USEDK false 532 - 533 513 #define CAM_WRITE BIT(16) 534 - #define CAM_READ 0x00000000 535 514 #define CAM_POLLINIG BIT(31) 536 515 537 516 #define SCR_UseDK 0x01

+1 -15

drivers/staging/r8188eu/include/rtl8188e_xmit.h

··· 5 5 #define __RTL8188E_XMIT_H__ 6 6 7 7 #define MAX_TX_AGG_PACKET_NUMBER 0xFF 8 - /* */ 9 - /* Queue Select Value in TxDesc */ 10 - /* */ 11 - #define QSLT_BK 0x2/* 0x01 */ 12 - #define QSLT_BE 0x0 13 - #define QSLT_VI 0x5/* 0x4 */ 14 - #define QSLT_VO 0x7/* 0x6 */ 15 - #define QSLT_BEACON 0x10 16 - #define QSLT_HIGH 0x11 17 8 #define QSLT_MGNT 0x12 18 - #define QSLT_CMD 0x13 19 9 20 10 /* For 88e early mode */ 21 11 #define SET_EARLYMODE_PKTNUM(__paddr, __value) \ ··· 121 131 122 132 void rtl8188e_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc, 123 133 u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull); 124 - s32 rtl8188eu_init_xmit_priv(struct adapter *padapter); 125 134 s32 rtl8188eu_hal_xmit(struct adapter *padapter, struct xmit_frame *frame); 126 135 s32 rtl8188eu_mgnt_xmit(struct adapter *padapter, struct xmit_frame *frame); 127 136 s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter); 128 - #define hal_xmit_handler rtl8188eu_xmit_buf_handler 129 137 void rtl8188eu_xmit_tasklet(unsigned long priv); 130 - bool rtl8188eu_xmitframe_complete(struct adapter *padapter, 131 - struct xmit_priv *pxmitpriv, 132 - struct xmit_buf *pxmitbuf); 138 + bool rtl8188eu_xmitframe_complete(struct adapter *padapter); 133 139 134 140 #endif /* __RTL8188E_XMIT_H__ */

+1 -2

drivers/staging/r8188eu/include/rtw_cmd.h

··· 32 32 struct completion start_cmd_thread; 33 33 struct completion stop_cmd_thread; 34 34 struct __queue cmd_queue; 35 - u8 cmd_seq; 36 35 u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */ 37 36 u8 *cmd_allocated_buf; 38 37 u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */ ··· 743 744 u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue); 744 745 u8 rtw_ps_cmd(struct adapter *padapter); 745 746 746 - u8 rtw_chk_hi_queue_cmd(struct adapter *padapter); 747 + void rtw_chk_hi_queue_cmd(struct adapter *padapter); 747 748 748 749 u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan); 749 750

+1 -256

drivers/staging/r8188eu/include/rtw_io.h

··· 16 16 #include <linux/usb.h> 17 17 #include <linux/usb/ch9.h> 18 18 19 - #define rtw_usb_buffer_alloc(dev, size, dma) \ 20 - usb_alloc_coherent((dev), (size), (in_interrupt() ? \ 21 - GFP_ATOMIC : GFP_KERNEL), (dma)) 22 - #define rtw_usb_buffer_free(dev, size, addr, dma) \ 23 - usb_free_coherent((dev), (size), (addr), (dma)) 24 - 25 - #define NUM_IOREQ 8 26 - 27 - #define MAX_PROT_SZ (64-16) 28 - 29 - #define _IOREADY 0 30 - #define _IO_WAIT_COMPLETE 1 31 - #define _IO_WAIT_RSP 2 32 - 33 - /* IO COMMAND TYPE */ 34 - #define _IOSZ_MASK_ (0x7F) 35 - #define _IO_WRITE_ BIT(7) 36 - #define _IO_FIXED_ BIT(8) 37 - #define _IO_BURST_ BIT(9) 38 - #define _IO_BYTE_ BIT(10) 39 - #define _IO_HW_ BIT(11) 40 - #define _IO_WORD_ BIT(12) 41 - #define _IO_SYNC_ BIT(13) 42 - #define _IO_CMDMASK_ (0x1F80) 43 - 44 - /* 45 - For prompt mode accessing, caller shall free io_req 46 - Otherwise, io_handler will free io_req 47 - */ 48 - 49 - /* IO STATUS TYPE */ 50 - #define _IO_ERR_ BIT(2) 51 - #define _IO_SUCCESS_ BIT(1) 52 - #define _IO_DONE_ BIT(0) 53 - 54 - #define IO_RD32 (_IO_SYNC_ | _IO_WORD_) 55 - #define IO_RD16 (_IO_SYNC_ | _IO_HW_) 56 - #define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) 57 - 58 - #define IO_RD32_ASYNC (_IO_WORD_) 59 - #define IO_RD16_ASYNC (_IO_HW_) 60 - #define IO_RD8_ASYNC (_IO_BYTE_) 61 - 62 - #define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) 63 - #define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) 64 - #define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) 65 - 66 - #define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) 67 - #define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) 68 - #define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) 69 - 70 - /* 71 - Only Sync. burst accessing is provided. 72 - */ 73 - 74 - #define IO_WR_BURST(x) \ 75 - (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) 76 - #define IO_RD_BURST(x) \ 77 - (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) 78 - 79 - /* below is for the intf_option bit defition... */ 80 - 81 - #define _INTF_ASYNC_ BIT(0) /* support async io */ 82 - 83 - struct intf_priv; 84 - struct intf_hdl; 85 - struct io_queue; 86 - 87 - struct io_req { 88 - struct list_head list; 89 - u32 addr; 90 - u32 val; 91 - u32 command; 92 - u32 status; 93 - u8 *pbuf; 94 - struct semaphore sema; 95 - 96 - void (*_async_io_callback)(struct adapter *padater, 97 - struct io_req *pio_req, u8 *cnxt); 98 - u8 *cnxt; 99 - }; 100 - 101 - struct intf_hdl { 102 - struct adapter *padapter; 103 - struct dvobj_priv *pintf_dev; 104 - }; 105 - 106 - struct reg_protocol_rd { 107 - #ifdef __LITTLE_ENDIAN 108 - /* DW1 */ 109 - u32 NumOfTrans:4; 110 - u32 Reserved1:4; 111 - u32 Reserved2:24; 112 - /* DW2 */ 113 - u32 ByteCount:7; 114 - u32 WriteEnable:1; /* 0:read, 1:write */ 115 - u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ 116 - u32 BurstMode:1; 117 - u32 Byte1Access:1; 118 - u32 Byte2Access:1; 119 - u32 Byte4Access:1; 120 - u32 Reserved3:3; 121 - u32 Reserved4:16; 122 - /* DW3 */ 123 - u32 BusAddress; 124 - /* DW4 */ 125 - /* u32 Value; */ 126 - #else 127 - /* DW1 */ 128 - u32 Reserved1:4; 129 - u32 NumOfTrans:4; 130 - u32 Reserved2:24; 131 - /* DW2 */ 132 - u32 WriteEnable:1; 133 - u32 ByteCount:7; 134 - u32 Reserved3:3; 135 - u32 Byte4Access:1; 136 - 137 - u32 Byte2Access:1; 138 - u32 Byte1Access:1; 139 - u32 BurstMode:1; 140 - u32 FixOrContinuous:1; 141 - u32 Reserved4:16; 142 - /* DW3 */ 143 - u32 BusAddress; 144 - 145 - /* DW4 */ 146 - #endif 147 - }; 148 - 149 - struct reg_protocol_wt { 150 - #ifdef __LITTLE_ENDIAN 151 - /* DW1 */ 152 - u32 NumOfTrans:4; 153 - u32 Reserved1:4; 154 - u32 Reserved2:24; 155 - /* DW2 */ 156 - u32 ByteCount:7; 157 - u32 WriteEnable:1; /* 0:read, 1:write */ 158 - u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ 159 - u32 BurstMode:1; 160 - u32 Byte1Access:1; 161 - u32 Byte2Access:1; 162 - u32 Byte4Access:1; 163 - u32 Reserved3:3; 164 - u32 Reserved4:16; 165 - /* DW3 */ 166 - u32 BusAddress; 167 - /* DW4 */ 168 - u32 Value; 169 - #else 170 - /* DW1 */ 171 - u32 Reserved1 :4; 172 - u32 NumOfTrans:4; 173 - u32 Reserved2:24; 174 - /* DW2 */ 175 - u32 WriteEnable:1; 176 - u32 ByteCount:7; 177 - u32 Reserved3:3; 178 - u32 Byte4Access:1; 179 - u32 Byte2Access:1; 180 - u32 Byte1Access:1; 181 - u32 BurstMode:1; 182 - u32 FixOrContinuous:1; 183 - u32 Reserved4:16; 184 - /* DW3 */ 185 - u32 BusAddress; 186 - /* DW4 */ 187 - u32 Value; 188 - #endif 189 - }; 190 - 191 - /* 192 - Below is the data structure used by _io_handler 193 - */ 194 - 195 - struct io_queue { 196 - spinlock_t lock; 197 - struct list_head free_ioreqs; 198 - struct list_head pending; /* The io_req list that will be served 199 - * in the single protocol read/write.*/ 200 - struct list_head processing; 201 - u8 *free_ioreqs_buf; /* 4-byte aligned */ 202 - u8 *pallocated_free_ioreqs_buf; 203 - struct intf_hdl intf; 204 - }; 205 - 206 - struct io_priv { 207 - struct adapter *padapter; 208 - struct intf_hdl intf; 209 - }; 210 - 211 - uint ioreq_flush(struct adapter *adapter, struct io_queue *ioqueue); 212 - void sync_ioreq_enqueue(struct io_req *preq, struct io_queue *ioqueue); 213 - uint sync_ioreq_flush(struct adapter *adapter, struct io_queue *ioqueue); 214 - uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); 215 - struct io_req *alloc_ioreq(struct io_queue *pio_q); 216 - 217 - uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); 218 - void unregister_intf_hdl(struct intf_hdl *pintfhdl); 219 - 220 - void _rtw_attrib_read(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 221 - void _rtw_attrib_write(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 222 - 223 19 int __must_check rtw_read8(struct adapter *adapter, u32 addr, u8 *data); 224 20 int __must_check rtw_read16(struct adapter *adapter, u32 addr, u16 *data); 225 21 int __must_check rtw_read32(struct adapter *adapter, u32 addr, u32 *data); 226 - void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 227 - u32 rtw_read_port(struct adapter *adapter, u8 *pmem); 22 + int rtw_read_port(struct adapter *adapter, struct recv_buf *precvbuf); 228 23 void rtw_read_port_cancel(struct adapter *adapter); 229 24 230 25 int rtw_write8(struct adapter *adapter, u32 addr, u8 val); ··· 27 232 int rtw_write32(struct adapter *adapter, u32 addr, u32 val); 28 233 int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata); 29 234 30 - void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 31 235 u32 rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 32 236 void rtw_write_port_cancel(struct adapter *adapter); 33 - 34 - void rtw_write_scsi(struct adapter *adapter, u32 cnt, u8 *pmem); 35 - 36 - /* ioreq */ 37 - void ioreq_read8(struct adapter *adapter, u32 addr, u8 *pval); 38 - void ioreq_read16(struct adapter *adapter, u32 addr, u16 *pval); 39 - void ioreq_read32(struct adapter *adapter, u32 addr, u32 *pval); 40 - void ioreq_write8(struct adapter *adapter, u32 addr, u8 val); 41 - void ioreq_write16(struct adapter *adapter, u32 addr, u16 val); 42 - void ioreq_write32(struct adapter *adapter, u32 addr, u32 val); 43 - 44 - uint async_read8(struct adapter *adapter, u32 addr, u8 *pbuff, 45 - void (*_async_io_callback)(struct adapter *padater, 46 - struct io_req *pio_req, 47 - u8 *cnxt), u8 *cnxt); 48 - uint async_read16(struct adapter *adapter, u32 addr, u8 *pbuff, 49 - void (*_async_io_callback)(struct adapter *padater, 50 - struct io_req *pio_req, 51 - u8 *cnxt), u8 *cnxt); 52 - uint async_read32(struct adapter *adapter, u32 addr, u8 *pbuff, 53 - void (*_async_io_callback)(struct adapter *padater, 54 - struct io_req *pio_req, 55 - u8 *cnxt), u8 *cnxt); 56 - 57 - void async_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 58 - void async_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 59 - 60 - void async_write8(struct adapter *adapter, u32 addr, u8 val, 61 - void (*_async_io_callback)(struct adapter *padater, 62 - struct io_req *pio_req, 63 - u8 *cnxt), u8 *cnxt); 64 - void async_write16(struct adapter *adapter, u32 addr, u16 val, 65 - void (*_async_io_callback)(struct adapter *padater, 66 - struct io_req *pio_req, 67 - u8 *cnxt), u8 *cnxt); 68 - void async_write32(struct adapter *adapter, u32 addr, u32 val, 69 - void (*_async_io_callback)(struct adapter *padater, 70 - struct io_req *pio_req, 71 - u8 *cnxt), u8 *cnxt); 72 - 73 - void async_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 74 - void async_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 75 - 76 - uint alloc_io_queue(struct adapter *adapter); 77 - void free_io_queue(struct adapter *adapter); 78 - void async_bus_io(struct io_queue *pio_q); 79 - void bus_sync_io(struct io_queue *pio_q); 80 - u32 _ioreq2rwmem(struct io_queue *pio_q); 81 - void dev_power_down(struct adapter *Adapter, u8 bpwrup); 82 237 83 238 #endif /* _RTL8711_IO_H_ */

-3

drivers/staging/r8188eu/include/rtw_pwrctrl.h

··· 71 71 int pwr_state_check_interval; 72 72 73 73 enum rt_rf_power_state rf_pwrstate;/* cur power state */ 74 - enum rt_rf_power_state change_rfpwrstate; 75 74 76 75 u8 bkeepfwalive; 77 76 }; ··· 98 99 void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps, 99 100 u8 bcn_ant_mode); 100 101 void LeaveAllPowerSaveMode(struct adapter *adapter); 101 - void ips_enter(struct adapter *padapter); 102 - int ips_leave(struct adapter *padapter); 103 102 104 103 void rtw_ps_processor(struct adapter *padapter); 105 104

+9 -48

drivers/staging/r8188eu/include/rtw_xmit.h

··· 97 97 }; 98 98 99 99 struct hw_xmit { 100 - struct __queue *sta_queue; 100 + struct list_head *sta_list; 101 101 int accnt; 102 102 }; 103 103 ··· 152 152 153 153 #define NULL_FRAMETAG (0x0) 154 154 #define DATA_FRAMETAG 0x01 155 - #define L2_FRAMETAG 0x02 156 155 #define MGNT_FRAMETAG 0x03 157 - #define AMSDU_FRAMETAG 0x04 158 - 159 - #define EII_FRAMETAG 0x05 160 - #define IEEE8023_FRAMETAG 0x06 161 - 162 - #define MP_FRAMETAG 0x07 163 156 164 157 #define TXAGG_FRAMETAG 0x08 165 158 ··· 189 196 u8 *pbuf; 190 197 void *priv_data; 191 198 u16 ext_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf. */ 192 - u16 flags; 199 + bool high_queue; 193 200 u32 alloc_sz; 194 201 u32 len; 195 202 struct submit_ctx *sctx; 196 - u32 ff_hwaddr; 197 203 struct urb *pxmit_urb; 198 - dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ 199 - u8 bpending[8]; 200 204 int last[8]; 201 205 }; 202 206 ··· 213 223 214 224 struct tx_servq { 215 225 struct list_head tx_pending; 216 - struct __queue sta_pending; 226 + struct list_head sta_pending; 217 227 int qcnt; 218 228 }; 219 229 220 230 struct sta_xmit_priv { 221 231 spinlock_t lock; 222 - int option; 223 - int apsd_setting; /* When bit mask is on, the associated edca 224 - * queue supports APSD. */ 225 232 struct tx_servq be_q; /* priority == 0,3 */ 226 233 struct tx_servq bk_q; /* priority == 1,2 */ 227 234 struct tx_servq vi_q; /* priority == 4,5 */ 228 235 struct tx_servq vo_q; /* priority == 6,7 */ 229 - struct list_head legacy_dz; 230 - struct list_head apsd; 231 236 u16 txseq_tid[16]; 232 237 }; 233 238 ··· 237 252 int ac_tag; 238 253 }; 239 254 240 - struct agg_pkt_info { 241 - u16 offset; 242 - u16 pkt_len; 243 - }; 244 - 245 255 struct xmit_priv { 246 256 spinlock_t lock; 247 - struct semaphore terminate_xmitthread_sema; 248 - struct __queue be_pending; 249 - struct __queue bk_pending; 250 - struct __queue vi_pending; 251 - struct __queue vo_pending; 252 - struct __queue bm_pending; 257 + struct list_head be_pending; 258 + struct list_head bk_pending; 259 + struct list_head vi_pending; 260 + struct list_head vo_pending; 253 261 u8 *pallocated_frame_buf; 254 262 u8 *pxmit_frame_buf; 255 263 uint free_xmitframe_cnt; 256 264 struct __queue free_xmit_queue; 257 265 uint frag_len; 258 266 struct adapter *adapter; 259 - u8 vcs_setting; 260 - u8 vcs; 261 - u8 vcs_type; 262 267 u64 tx_bytes; 263 268 u64 tx_pkts; 264 269 u64 tx_drop; 265 270 u64 last_tx_bytes; 266 271 u64 last_tx_pkts; 267 272 struct hw_xmit *hwxmits; 268 - u8 hwxmit_entry; 269 273 u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength 270 274 * from large to small. it's value is 0->vo, 271 275 * 1->vi, 2->be, 3->bk. */ 272 - struct semaphore tx_retevt;/* all tx return event; */ 273 - u8 txirp_cnt;/* */ 274 276 struct tasklet_struct xmit_tasklet; 275 - /* per AC pending irp */ 276 - int beq_cnt; 277 - int bkq_cnt; 278 - int viq_cnt; 279 - int voq_cnt; 280 277 struct __queue free_xmitbuf_queue; 281 278 struct __queue pending_xmitbuf_queue; 282 279 u8 *pallocated_xmitbuf; ··· 291 324 struct xmit_buf *pxmitbuf); 292 325 void rtw_count_tx_stats(struct adapter *padapter, 293 326 struct xmit_frame *pxmitframe, int sz); 294 - void rtw_update_protection(struct adapter *padapter, u8 *ie, uint ie_len); 295 327 s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, 296 328 struct pkt_attrib *pattrib); 297 329 s32 rtw_put_snap(u8 *data, u16 h_proto); ··· 298 332 struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv); 299 333 s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, 300 334 struct xmit_frame *pxmitframe); 301 - void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, 302 - struct __queue *pframequeue); 335 + void rtw_free_xmitframe_list(struct xmit_priv *pxmitpriv, struct list_head *xframe_list); 303 336 struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, 304 337 struct sta_info *psta, int up, u8 *ac); 305 - s32 rtw_xmitframe_enqueue(struct adapter *padapter, 306 - struct xmit_frame *pxmitframe); 307 338 struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, 308 - struct hw_xmit *phwxmit_i, int entry); 339 + struct hw_xmit *phwxmit_i); 309 340 310 341 s32 rtw_xmit_classifier(struct adapter *padapter, 311 342 struct xmit_frame *pxmitframe); ··· 313 350 s32 rtw_txframes_pending(struct adapter *padapter); 314 351 s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, 315 352 struct pkt_attrib *pattrib); 316 - void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry); 317 353 int _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); 318 354 void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); 319 355 int rtw_alloc_hwxmits(struct adapter *padapter); 320 - void rtw_free_hwxmits(struct adapter *padapter); 321 356 s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt); 322 357 323 358 int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_frame *pxmitframe);

-2

drivers/staging/r8188eu/include/usb_ops.h

··· 17 17 #define MAX_VENDOR_REQ_CMD_SIZE 254 /* 8188cu SIE Support */ 18 18 #define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE + ALIGNMENT_UNIT) 19 19 20 - #include "usb_ops_linux.h" 21 - 22 20 /* 23 21 * Increase and check if the continual_urb_error of this @param dvobjprivei 24 22 * is larger than MAX_CONTINUAL_URB_ERR

-29

drivers/staging/r8188eu/include/usb_ops_linux.h

··· 1 - /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 - /* Copyright(c) 2007 - 2011 Realtek Corporation. */ 3 - 4 - #ifndef __USB_OPS_LINUX_H__ 5 - #define __USB_OPS_LINUX_H__ 6 - 7 - #define VENDOR_CMD_MAX_DATA_LEN 254 8 - 9 - #define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10/* ms */ 10 - #define RTW_USB_CONTROL_MSG_TIMEOUT 500/* ms */ 11 - 12 - #define MAX_USBCTRL_VENDORREQ_TIMES 10 13 - 14 - #define RTW_USB_BULKOUT_TIME 5000/* ms */ 15 - 16 - #define _usbctrl_vendorreq_async_callback(urb, regs) \ 17 - _usbctrl_vendorreq_async_callback(urb) 18 - #define usb_bulkout_zero_complete(purb, regs) \ 19 - usb_bulkout_zero_complete(purb) 20 - #define usb_write_mem_complete(purb, regs) \ 21 - usb_write_mem_complete(purb) 22 - #define usb_write_port_complete(purb, regs) \ 23 - usb_write_port_complete(purb) 24 - #define usb_read_port_complete(purb, regs) \ 25 - usb_read_port_complete(purb) 26 - #define usb_read_interrupt_complete(purb, regs) \ 27 - usb_read_interrupt_complete(purb) 28 - 29 - #endif

+2 -4

drivers/staging/r8188eu/os_dep/ioctl_linux.c

··· 3061 3061 char *reg_ifname; 3062 3062 reg_ifname = padapter->registrypriv.if2name; 3063 3063 3064 - strncpy(rereg_priv->old_ifname, reg_ifname, IFNAMSIZ); 3065 - rereg_priv->old_ifname[IFNAMSIZ - 1] = 0; 3064 + strscpy(rereg_priv->old_ifname, reg_ifname, IFNAMSIZ); 3066 3065 } 3067 3066 3068 3067 if (wrqu->data.length > IFNAMSIZ) ··· 3083 3084 rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode); 3084 3085 } 3085 3086 3086 - strncpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ); 3087 - rereg_priv->old_ifname[IFNAMSIZ - 1] = 0; 3087 + strscpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ); 3088 3088 3089 3089 if (!memcmp(new_ifname, "disable%d", 9)) { 3090 3090 /* free network queue for Android's timming issue */

+7 -10

drivers/staging/r8188eu/os_dep/os_intfs.c

··· 392 392 struct security_priv *psecuritypriv = &padapter->securitypriv; 393 393 394 394 /* xmit_priv */ 395 - pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; 396 - pxmitpriv->vcs = pregistrypriv->vcs_type; 397 - pxmitpriv->vcs_type = pregistrypriv->vcs_type; 398 395 pxmitpriv->frag_len = pregistrypriv->frag_thresh; 399 396 400 397 /* mlme_priv */ ··· 482 485 goto free_mlme_ext; 483 486 } 484 487 485 - if (_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) { 488 + if (_rtw_init_recv_priv(&padapter->recvpriv, padapter)) { 486 489 dev_err(dvobj_to_dev(padapter->dvobj), "_rtw_init_recv_priv failed\n"); 487 490 goto free_xmit_priv; 488 491 } ··· 631 634 pr_info("can't init mlme_ext_priv\n"); 632 635 goto netdev_open_error; 633 636 } 634 - if (padapter->intf_start) 635 - padapter->intf_start(padapter); 637 + if (rtl8188eu_inirp_init(padapter)) 638 + goto netdev_open_error; 636 639 637 640 rtw_led_control(padapter, LED_CTL_NO_LINK); 638 641 ··· 684 687 if (status == _FAIL) 685 688 goto netdev_open_error; 686 689 687 - if (padapter->intf_start) 688 - padapter->intf_start(padapter); 690 + if (rtl8188eu_inirp_init(padapter)) 691 + goto netdev_open_error; 689 692 690 693 rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); 691 694 _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 5000); ··· 761 764 { 762 765 rtw_fifo_cleanup(padapter); 763 766 764 - if (padapter->intf_stop) 765 - padapter->intf_stop(padapter); 767 + rtw_read_port_cancel(padapter); 768 + rtw_write_port_cancel(padapter); 766 769 767 770 /* s5. */ 768 771 if (!padapter->bSurpriseRemoved)

+3 -30

drivers/staging/r8188eu/os_dep/usb_intf.c

··· 152 152 153 153 } 154 154 155 - static void usb_intf_start(struct adapter *padapter) 156 - { 157 - rtl8188eu_inirp_init(padapter); 158 - } 159 - 160 - static void usb_intf_stop(struct adapter *padapter) 161 - { 162 - /* cancel in irp */ 163 - rtw_read_port_cancel(padapter); 164 - 165 - /* cancel out irp */ 166 - rtw_write_port_cancel(padapter); 167 - 168 - /* todo:cancel other irps */ 169 - } 170 - 171 155 static void rtw_dev_unload(struct adapter *padapter) 172 156 { 173 157 if (padapter->bup) { ··· 159 175 if (padapter->xmitpriv.ack_tx) 160 176 rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); 161 177 /* s3. */ 162 - if (padapter->intf_stop) 163 - padapter->intf_stop(padapter); 178 + rtw_read_port_cancel(padapter); 179 + rtw_write_port_cancel(padapter); 180 + 164 181 /* s4. */ 165 182 rtw_stop_drv_threads(padapter); 166 183 ··· 275 290 { 276 291 struct adapter *padapter = NULL; 277 292 struct net_device *pnetdev = NULL; 278 - struct io_priv *piopriv; 279 - struct intf_hdl *pintf; 280 293 int ret; 281 294 282 295 padapter = vzalloc(sizeof(*padapter)); ··· 297 314 } 298 315 SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); 299 316 padapter = rtw_netdev_priv(pnetdev); 300 - 301 - padapter->intf_start = &usb_intf_start; 302 - padapter->intf_stop = &usb_intf_stop; 303 - 304 - /* step init_io_priv */ 305 - piopriv = &padapter->iopriv; 306 - pintf = &piopriv->intf; 307 - piopriv->padapter = padapter; 308 - pintf->padapter = padapter; 309 - pintf->pintf_dev = adapter_to_dvobj(padapter); 310 317 311 318 /* step read_chip_version */ 312 319 rtl8188e_read_chip_version(padapter);

+22 -84

drivers/staging/r8188eu/os_dep/usb_ops_linux.c

··· 4 4 #define _USB_OPS_LINUX_C_ 5 5 6 6 #include "../include/drv_types.h" 7 - #include "../include/usb_ops_linux.h" 8 7 #include "../include/rtl8188e_recv.h" 9 8 10 9 static unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) ··· 28 29 29 30 for (i = 0; i < NR_RECVBUFF; i++) { 30 31 precvbuf->reuse = true; 31 - if (precvbuf->purb) 32 - usb_kill_urb(precvbuf->purb); 32 + usb_kill_urb(precvbuf->purb); 33 33 precvbuf++; 34 34 } 35 35 } 36 36 37 - static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) 37 + static void usb_write_port_complete(struct urb *purb) 38 38 { 39 39 struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; 40 - struct adapter *padapter = pxmitbuf->padapter; 41 - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 40 + struct adapter *padapter = pxmitbuf->padapter; 41 + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; 42 42 43 - switch (pxmitbuf->flags) { 44 - case VO_QUEUE_INX: 45 - pxmitpriv->voq_cnt--; 46 - break; 47 - case VI_QUEUE_INX: 48 - pxmitpriv->viq_cnt--; 49 - break; 50 - case BE_QUEUE_INX: 51 - pxmitpriv->beq_cnt--; 52 - break; 53 - case BK_QUEUE_INX: 54 - pxmitpriv->bkq_cnt--; 55 - break; 56 - case HIGH_QUEUE_INX: 43 + if (pxmitbuf->high_queue) 57 44 rtw_chk_hi_queue_cmd(padapter); 45 + 46 + switch (purb->status) { 47 + case 0: 48 + case -EINPROGRESS: 49 + case -ENOENT: 50 + case -ECONNRESET: 51 + case -EPIPE: 52 + case -EPROTO: 53 + break; 54 + case -ESHUTDOWN: 55 + padapter->bDriverStopped = true; 58 56 break; 59 57 default: 58 + padapter->bSurpriseRemoved = true; 60 59 break; 61 60 } 62 61 63 - if (padapter->bSurpriseRemoved || padapter->bDriverStopped || 64 - padapter->bWritePortCancel) 65 - goto check_completion; 66 - 67 - if (purb->status) { 68 - if (purb->status == -EINPROGRESS) { 69 - goto check_completion; 70 - } else if (purb->status == -ENOENT) { 71 - goto check_completion; 72 - } else if (purb->status == -ECONNRESET) { 73 - goto check_completion; 74 - } else if (purb->status == -ESHUTDOWN) { 75 - padapter->bDriverStopped = true; 76 - goto check_completion; 77 - } else if ((purb->status != -EPIPE) && (purb->status != -EPROTO)) { 78 - padapter->bSurpriseRemoved = true; 79 - 80 - goto check_completion; 81 - } 82 - } 83 - 84 - check_completion: 85 62 rtw_sctx_done_err(&pxmitbuf->sctx, 86 - purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : 87 - RTW_SCTX_DONE_SUCCESS); 88 - 63 + purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); 89 64 rtw_free_xmitbuf(pxmitpriv, pxmitbuf); 90 - 91 65 tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); 92 - 93 66 } 94 67 95 68 u32 rtw_write_port(struct adapter *padapter, u32 addr, u32 cnt, u8 *wmem) ··· 83 112 } 84 113 85 114 spin_lock_irqsave(&pxmitpriv->lock, irqL); 86 - 87 - switch (addr) { 88 - case VO_QUEUE_INX: 89 - pxmitpriv->voq_cnt++; 90 - pxmitbuf->flags = VO_QUEUE_INX; 91 - break; 92 - case VI_QUEUE_INX: 93 - pxmitpriv->viq_cnt++; 94 - pxmitbuf->flags = VI_QUEUE_INX; 95 - break; 96 - case BE_QUEUE_INX: 97 - pxmitpriv->beq_cnt++; 98 - pxmitbuf->flags = BE_QUEUE_INX; 99 - break; 100 - case BK_QUEUE_INX: 101 - pxmitpriv->bkq_cnt++; 102 - pxmitbuf->flags = BK_QUEUE_INX; 103 - break; 104 - case HIGH_QUEUE_INX: 105 - pxmitbuf->flags = HIGH_QUEUE_INX; 106 - break; 107 - default: 108 - pxmitbuf->flags = MGT_QUEUE_INX; 109 - break; 110 - } 111 - 115 + pxmitbuf->high_queue = (addr == HIGH_QUEUE_INX); 112 116 spin_unlock_irqrestore(&pxmitpriv->lock, irqL); 113 117 114 118 purb = pxmitbuf->pxmit_urb; ··· 100 154 status = usb_submit_urb(purb, GFP_ATOMIC); 101 155 if (status) { 102 156 rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); 103 - 104 - switch (status) { 105 - case -ENODEV: 157 + if (status == -ENODEV) 106 158 padapter->bDriverStopped = true; 107 - break; 108 - default: 109 - break; 110 - } 111 159 goto exit; 112 160 } 113 161 ··· 124 184 padapter->bWritePortCancel = true; 125 185 126 186 for (i = 0; i < NR_XMITBUFF; i++) { 127 - if (pxmitbuf->pxmit_urb) 128 - usb_kill_urb(pxmitbuf->pxmit_urb); 187 + usb_kill_urb(pxmitbuf->pxmit_urb); 129 188 pxmitbuf++; 130 189 } 131 190 132 191 pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmit_extbuf; 133 192 for (i = 0; i < NR_XMIT_EXTBUFF; i++) { 134 - if (pxmitbuf->pxmit_urb) 135 - usb_kill_urb(pxmitbuf->pxmit_urb); 193 + usb_kill_urb(pxmitbuf->pxmit_urb); 136 194 pxmitbuf++; 137 195 } 138 196 }

+11 -11

drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c

··· 21 21 return; 22 22 } 23 23 24 - for (eRFPath = 0; eRFPath < priv->NumTotalRFPath; eRFPath++) { 24 + for (eRFPath = 0; eRFPath < priv->num_total_rf_path; eRFPath++) { 25 25 if (!rtl92e_is_legal_rf_path(dev, eRFPath)) 26 26 continue; 27 27 ··· 63 63 u8 ConstRetryTimes = 5, RetryTimes = 5; 64 64 u8 ret = 0; 65 65 66 - priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH; 66 + priv->num_total_rf_path = RTL819X_TOTAL_RF_PATH; 67 67 68 68 for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; 69 - eRFPath < priv->NumTotalRFPath; eRFPath++) { 69 + eRFPath < priv->num_total_rf_path; eRFPath++) { 70 70 if (!rtl92e_is_legal_rf_path(dev, eRFPath)) 71 71 continue; 72 72 73 - pPhyReg = &priv->PHYRegDef[eRFPath]; 73 + pPhyReg = &priv->phy_reg_def[eRFPath]; 74 74 75 75 switch (eRFPath) { 76 76 case RF90_PATH_A: ··· 150 150 struct r8192_priv *priv = rtllib_priv(dev); 151 151 152 152 TxAGC = powerlevel; 153 - if (priv->bDynamicTxLowPower) { 154 - if (priv->CustomerID == RT_CID_819x_Netcore) 153 + if (priv->dynamic_tx_low_pwr) { 154 + if (priv->customer_id == RT_CID_819X_NETCORE) 155 155 TxAGC = 0x22; 156 156 else 157 - TxAGC += priv->CckPwEnl; 157 + TxAGC += priv->cck_pwr_enl; 158 158 } 159 159 if (TxAGC > 0x24) 160 160 TxAGC = 0x24; ··· 169 169 u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; 170 170 u8 byte0, byte1, byte2, byte3; 171 171 172 - powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff; 172 + powerBase0 = powerlevel + priv->legacy_ht_tx_pwr_diff; 173 173 powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) | 174 174 (powerBase0 << 8) | powerBase0; 175 175 powerBase1 = powerlevel; ··· 177 177 (powerBase1 << 8) | powerBase1; 178 178 179 179 for (index = 0; index < 6; index++) { 180 - writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + 180 + writeVal = (u32)(priv->mcs_tx_pwr_level_org_offset[index] + 181 181 ((index < 2) ? powerBase0 : powerBase1)); 182 182 byte0 = writeVal & 0x7f; 183 183 byte1 = (writeVal & 0x7f00) >> 8; ··· 195 195 if (index == 3) { 196 196 writeVal_tmp = (byte3 << 24) | (byte2 << 16) | 197 197 (byte1 << 8) | byte0; 198 - priv->Pwr_Track = writeVal_tmp; 198 + priv->pwr_track = writeVal_tmp; 199 199 } 200 200 201 - if (priv->bDynamicTxHighPower) 201 + if (priv->dynamic_tx_high_pwr) 202 202 writeVal = 0x03030303; 203 203 else 204 204 writeVal = (byte3 << 24) | (byte2 << 16) |

+1 -1

drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c

··· 76 76 77 77 } while (frag_offset < len); 78 78 79 - rtl92e_writeb(dev, TPPoll, TPPoll_CQ); 79 + rtl92e_writeb(dev, TP_POLL, TP_POLL_CQ); 80 80 Failed: 81 81 return rt_status; 82 82 }

+137 -218

drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c

··· 54 54 switch (priv->rtllib->iw_mode) { 55 55 case IW_MODE_INFRA: 56 56 if (priv->rtllib->state == RTLLIB_LINKED) 57 - msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT); 58 - else 59 - msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); 57 + msr |= MSR_LINK_MANAGED; 60 58 LedAction = LED_CTL_LINK; 61 59 break; 62 60 case IW_MODE_ADHOC: 63 61 if (priv->rtllib->state == RTLLIB_LINKED) 64 - msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT); 65 - else 66 - msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); 62 + msr |= MSR_LINK_ADHOC; 67 63 break; 68 64 case IW_MODE_MASTER: 69 65 if (priv->rtllib->state == RTLLIB_LINKED) 70 - msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT); 71 - else 72 - msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); 66 + msr |= MSR_LINK_MASTER; 73 67 break; 74 68 default: 75 69 break; ··· 121 127 122 128 Type = val[0]; 123 129 RegRCR = rtl92e_readl(dev, RCR); 124 - priv->ReceiveConfig = RegRCR; 130 + priv->receive_config = RegRCR; 125 131 126 132 if (Type) 127 133 RegRCR |= (RCR_CBSSID); ··· 129 135 RegRCR &= (~RCR_CBSSID); 130 136 131 137 rtl92e_writel(dev, RCR, RegRCR); 132 - priv->ReceiveConfig = RegRCR; 138 + priv->receive_config = RegRCR; 133 139 134 140 } 135 141 break; ··· 216 222 union aci_aifsn *pAciAifsn = (union aci_aifsn *)& 217 223 (qos_parameters->aifs[0]); 218 224 u8 acm = pAciAifsn->f.acm; 219 - u8 AcmCtrl = rtl92e_readb(dev, AcmHwCtrl); 225 + u8 AcmCtrl = rtl92e_readb(dev, ACM_HW_CTRL); 220 226 221 227 if (acm) { 222 228 switch (eACI) { 223 229 case AC0_BE: 224 - AcmCtrl |= AcmHw_BeqEn; 230 + AcmCtrl |= ACM_HW_BEQ_EN; 225 231 break; 226 232 227 233 case AC2_VI: 228 - AcmCtrl |= AcmHw_ViqEn; 234 + AcmCtrl |= ACM_HW_VIQ_EN; 229 235 break; 230 236 231 237 case AC3_VO: 232 - AcmCtrl |= AcmHw_VoqEn; 238 + AcmCtrl |= ACM_HW_VOQ_EN; 233 239 break; 234 240 } 235 241 } else { 236 242 switch (eACI) { 237 243 case AC0_BE: 238 - AcmCtrl &= (~AcmHw_BeqEn); 244 + AcmCtrl &= (~ACM_HW_BEQ_EN); 239 245 break; 240 246 241 247 case AC2_VI: 242 - AcmCtrl &= (~AcmHw_ViqEn); 248 + AcmCtrl &= (~ACM_HW_VIQ_EN); 243 249 break; 244 250 245 251 case AC3_VO: 246 - AcmCtrl &= (~AcmHw_BeqEn); 252 + AcmCtrl &= (~ACM_HW_BEQ_EN); 247 253 break; 248 254 249 255 default: 250 256 break; 251 257 } 252 258 } 253 - rtl92e_writeb(dev, AcmHwCtrl, AcmCtrl); 259 + rtl92e_writeb(dev, ACM_HW_CTRL, AcmCtrl); 254 260 break; 255 261 } 256 262 ··· 286 292 if (EEPROMId != RTL8190_EEPROM_ID) { 287 293 netdev_err(dev, "%s(): Invalid EEPROM ID: %x\n", __func__, 288 294 EEPROMId); 289 - priv->AutoloadFailFlag = true; 295 + priv->autoload_fail_flag = true; 290 296 } else { 291 - priv->AutoloadFailFlag = false; 297 + priv->autoload_fail_flag = false; 292 298 } 293 299 294 - if (!priv->AutoloadFailFlag) { 300 + if (!priv->autoload_fail_flag) { 295 301 priv->eeprom_vid = rtl92e_eeprom_read(dev, EEPROM_VID >> 1); 296 302 priv->eeprom_did = rtl92e_eeprom_read(dev, EEPROM_DID >> 1); 297 303 298 304 usValue = rtl92e_eeprom_read(dev, 299 305 (EEPROM_Customer_ID >> 1)) >> 8; 300 - priv->eeprom_CustomerID = usValue & 0xff; 306 + priv->eeprom_customer_id = usValue & 0xff; 301 307 usValue = rtl92e_eeprom_read(dev, 302 308 EEPROM_ICVersion_ChannelPlan>>1); 303 - priv->eeprom_ChannelPlan = usValue&0xff; 309 + priv->eeprom_chnl_plan = usValue&0xff; 304 310 IC_Version = (usValue & 0xff00)>>8; 305 311 306 312 ICVer8192 = IC_Version & 0xf; ··· 321 327 priv->card_8192_version = VERSION_8190_BD; 322 328 priv->eeprom_vid = 0; 323 329 priv->eeprom_did = 0; 324 - priv->eeprom_CustomerID = 0; 325 - priv->eeprom_ChannelPlan = 0; 330 + priv->eeprom_customer_id = 0; 331 + priv->eeprom_chnl_plan = 0; 326 332 } 327 333 328 - if (!priv->AutoloadFailFlag) { 334 + if (!priv->autoload_fail_flag) { 329 335 u8 addr[ETH_ALEN]; 330 336 331 337 for (i = 0; i < 6; i += 2) { ··· 339 345 } 340 346 341 347 if (priv->card_8192_version > VERSION_8190_BD) 342 - priv->bTXPowerDataReadFromEEPORM = true; 348 + priv->tx_pwr_data_read_from_eeprom = true; 343 349 else 344 - priv->bTXPowerDataReadFromEEPORM = false; 350 + priv->tx_pwr_data_read_from_eeprom = false; 345 351 346 352 priv->rf_type = RTL819X_DEFAULT_RF_TYPE; 347 353 348 354 if (priv->card_8192_version > VERSION_8190_BD) { 349 - if (!priv->AutoloadFailFlag) { 355 + if (!priv->autoload_fail_flag) { 350 356 tempval = (rtl92e_eeprom_read(dev, 351 357 (EEPROM_RFInd_PowerDiff >> 1))) & 0xff; 352 - priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; 358 + priv->eeprom_legacy_ht_tx_pwr_diff = tempval & 0xf; 353 359 354 360 if (tempval&0x80) 355 361 priv->rf_type = RF_1T2R; 356 362 else 357 363 priv->rf_type = RF_2T4R; 358 364 } else { 359 - priv->EEPROMLegacyHTTxPowerDiff = 0x04; 365 + priv->eeprom_legacy_ht_tx_pwr_diff = 0x04; 360 366 } 361 367 362 - if (!priv->AutoloadFailFlag) 363 - priv->EEPROMThermalMeter = ((rtl92e_eeprom_read(dev, 368 + if (!priv->autoload_fail_flag) 369 + priv->eeprom_thermal_meter = ((rtl92e_eeprom_read(dev, 364 370 (EEPROM_ThermalMeter>>1))) & 365 371 0xff00) >> 8; 366 372 else 367 - priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; 368 - priv->TSSI_13dBm = priv->EEPROMThermalMeter * 100; 373 + priv->eeprom_thermal_meter = EEPROM_Default_ThermalMeter; 374 + priv->tssi_13dBm = priv->eeprom_thermal_meter * 100; 369 375 370 376 if (priv->epromtype == EEPROM_93C46) { 371 - if (!priv->AutoloadFailFlag) { 377 + if (!priv->autoload_fail_flag) { 372 378 usValue = rtl92e_eeprom_read(dev, 373 379 EEPROM_TxPwDiff_CrystalCap >> 1); 374 - priv->EEPROMAntPwDiff = usValue & 0x0fff; 375 - priv->EEPROMCrystalCap = (usValue & 0xf000) 380 + priv->eeprom_ant_pwr_diff = usValue & 0x0fff; 381 + priv->eeprom_crystal_cap = (usValue & 0xf000) 376 382 >> 12; 377 383 } else { 378 - priv->EEPROMAntPwDiff = 384 + priv->eeprom_ant_pwr_diff = 379 385 EEPROM_Default_AntTxPowerDiff; 380 - priv->EEPROMCrystalCap = 386 + priv->eeprom_crystal_cap = 381 387 EEPROM_Default_TxPwDiff_CrystalCap; 382 388 } 383 389 384 390 for (i = 0; i < 14; i += 2) { 385 - if (!priv->AutoloadFailFlag) 391 + if (!priv->autoload_fail_flag) 386 392 usValue = rtl92e_eeprom_read(dev, 387 393 (EEPROM_TxPwIndex_CCK + i) >> 1); 388 394 else 389 395 usValue = EEPROM_Default_TxPower; 390 - *((u16 *)(&priv->EEPROMTxPowerLevelCCK[i])) = 396 + *((u16 *)(&priv->eeprom_tx_pwr_level_cck[i])) = 391 397 usValue; 392 398 } 393 399 for (i = 0; i < 14; i += 2) { 394 - if (!priv->AutoloadFailFlag) 400 + if (!priv->autoload_fail_flag) 395 401 usValue = rtl92e_eeprom_read(dev, 396 402 (EEPROM_TxPwIndex_OFDM_24G + i) >> 1); 397 403 else 398 404 usValue = EEPROM_Default_TxPower; 399 - *((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[i])) 405 + *((u16 *)(&priv->eeprom_tx_pwr_level_ofdm24g[i])) 400 406 = usValue; 401 407 } 402 408 } 403 409 if (priv->epromtype == EEPROM_93C46) { 404 410 for (i = 0; i < 14; i++) { 405 - priv->TxPowerLevelCCK[i] = 406 - priv->EEPROMTxPowerLevelCCK[i]; 407 - priv->TxPowerLevelOFDM24G[i] = 408 - priv->EEPROMTxPowerLevelOFDM24G[i]; 411 + priv->tx_pwr_level_cck[i] = 412 + priv->eeprom_tx_pwr_level_cck[i]; 413 + priv->tx_pwr_level_ofdm_24g[i] = 414 + priv->eeprom_tx_pwr_level_ofdm24g[i]; 409 415 } 410 - priv->LegacyHTTxPowerDiff = 411 - priv->EEPROMLegacyHTTxPowerDiff; 412 - priv->AntennaTxPwDiff[0] = priv->EEPROMAntPwDiff & 0xf; 413 - priv->AntennaTxPwDiff[1] = (priv->EEPROMAntPwDiff & 416 + priv->legacy_ht_tx_pwr_diff = 417 + priv->eeprom_legacy_ht_tx_pwr_diff; 418 + priv->antenna_tx_pwr_diff[0] = priv->eeprom_ant_pwr_diff & 0xf; 419 + priv->antenna_tx_pwr_diff[1] = (priv->eeprom_ant_pwr_diff & 414 420 0xf0) >> 4; 415 - priv->AntennaTxPwDiff[2] = (priv->EEPROMAntPwDiff & 421 + priv->antenna_tx_pwr_diff[2] = (priv->eeprom_ant_pwr_diff & 416 422 0xf00) >> 8; 417 - priv->CrystalCap = priv->EEPROMCrystalCap; 418 - priv->ThermalMeter[0] = priv->EEPROMThermalMeter & 0xf; 419 - priv->ThermalMeter[1] = (priv->EEPROMThermalMeter & 423 + priv->crystal_cap = priv->eeprom_crystal_cap; 424 + priv->thermal_meter[0] = priv->eeprom_thermal_meter & 0xf; 425 + priv->thermal_meter[1] = (priv->eeprom_thermal_meter & 420 426 0xf0) >> 4; 421 427 } else if (priv->epromtype == EEPROM_93C56) { 422 - 423 - for (i = 0; i < 3; i++) { 424 - priv->TxPowerLevelCCK_A[i] = 425 - priv->EEPROMRfACCKChnl1TxPwLevel[0]; 426 - priv->TxPowerLevelOFDM24G_A[i] = 427 - priv->EEPROMRfAOfdmChnlTxPwLevel[0]; 428 - priv->TxPowerLevelCCK_C[i] = 429 - priv->EEPROMRfCCCKChnl1TxPwLevel[0]; 430 - priv->TxPowerLevelOFDM24G_C[i] = 431 - priv->EEPROMRfCOfdmChnlTxPwLevel[0]; 432 - } 433 - for (i = 3; i < 9; i++) { 434 - priv->TxPowerLevelCCK_A[i] = 435 - priv->EEPROMRfACCKChnl1TxPwLevel[1]; 436 - priv->TxPowerLevelOFDM24G_A[i] = 437 - priv->EEPROMRfAOfdmChnlTxPwLevel[1]; 438 - priv->TxPowerLevelCCK_C[i] = 439 - priv->EEPROMRfCCCKChnl1TxPwLevel[1]; 440 - priv->TxPowerLevelOFDM24G_C[i] = 441 - priv->EEPROMRfCOfdmChnlTxPwLevel[1]; 442 - } 443 - for (i = 9; i < 14; i++) { 444 - priv->TxPowerLevelCCK_A[i] = 445 - priv->EEPROMRfACCKChnl1TxPwLevel[2]; 446 - priv->TxPowerLevelOFDM24G_A[i] = 447 - priv->EEPROMRfAOfdmChnlTxPwLevel[2]; 448 - priv->TxPowerLevelCCK_C[i] = 449 - priv->EEPROMRfCCCKChnl1TxPwLevel[2]; 450 - priv->TxPowerLevelOFDM24G_C[i] = 451 - priv->EEPROMRfCOfdmChnlTxPwLevel[2]; 452 - } 453 - priv->LegacyHTTxPowerDiff = 454 - priv->EEPROMLegacyHTTxPowerDiff; 455 - priv->AntennaTxPwDiff[0] = 0; 456 - priv->AntennaTxPwDiff[1] = 0; 457 - priv->AntennaTxPwDiff[2] = 0; 458 - priv->CrystalCap = priv->EEPROMCrystalCap; 459 - priv->ThermalMeter[0] = priv->EEPROMThermalMeter & 0xf; 460 - priv->ThermalMeter[1] = (priv->EEPROMThermalMeter & 428 + priv->legacy_ht_tx_pwr_diff = 429 + priv->eeprom_legacy_ht_tx_pwr_diff; 430 + priv->antenna_tx_pwr_diff[0] = 0; 431 + priv->antenna_tx_pwr_diff[1] = 0; 432 + priv->antenna_tx_pwr_diff[2] = 0; 433 + priv->crystal_cap = priv->eeprom_crystal_cap; 434 + priv->thermal_meter[0] = priv->eeprom_thermal_meter & 0xf; 435 + priv->thermal_meter[1] = (priv->eeprom_thermal_meter & 461 436 0xf0) >> 4; 462 437 } 463 438 } ··· 436 473 priv->rf_chip = RF_8256; 437 474 438 475 if (priv->reg_chnl_plan == 0xf) 439 - priv->ChannelPlan = priv->eeprom_ChannelPlan; 476 + priv->chnl_plan = priv->eeprom_chnl_plan; 440 477 else 441 - priv->ChannelPlan = priv->reg_chnl_plan; 478 + priv->chnl_plan = priv->reg_chnl_plan; 442 479 443 480 if (priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304) 444 - priv->CustomerID = RT_CID_DLINK; 481 + priv->customer_id = RT_CID_DLINK; 445 482 446 - switch (priv->eeprom_CustomerID) { 483 + switch (priv->eeprom_customer_id) { 447 484 case EEPROM_CID_DEFAULT: 448 - priv->CustomerID = RT_CID_DEFAULT; 485 + priv->customer_id = RT_CID_DEFAULT; 449 486 break; 450 487 case EEPROM_CID_CAMEO: 451 - priv->CustomerID = RT_CID_819x_CAMEO; 488 + priv->customer_id = RT_CID_819x_CAMEO; 452 489 break; 453 490 case EEPROM_CID_RUNTOP: 454 - priv->CustomerID = RT_CID_819x_RUNTOP; 491 + priv->customer_id = RT_CID_819x_RUNTOP; 455 492 break; 456 493 case EEPROM_CID_NetCore: 457 - priv->CustomerID = RT_CID_819x_Netcore; 494 + priv->customer_id = RT_CID_819X_NETCORE; 458 495 break; 459 496 case EEPROM_CID_TOSHIBA: 460 - priv->CustomerID = RT_CID_TOSHIBA; 461 - if (priv->eeprom_ChannelPlan&0x80) 462 - priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f; 497 + priv->customer_id = RT_CID_TOSHIBA; 498 + if (priv->eeprom_chnl_plan & 0x80) 499 + priv->chnl_plan = priv->eeprom_chnl_plan & 0x7f; 463 500 else 464 - priv->ChannelPlan = 0x0; 501 + priv->chnl_plan = 0x0; 465 502 break; 466 503 case EEPROM_CID_Nettronix: 467 - priv->CustomerID = RT_CID_Nettronix; 504 + priv->customer_id = RT_CID_Nettronix; 468 505 break; 469 506 case EEPROM_CID_Pronet: 470 - priv->CustomerID = RT_CID_PRONET; 507 + priv->customer_id = RT_CID_PRONET; 471 508 break; 472 509 case EEPROM_CID_DLINK: 473 - priv->CustomerID = RT_CID_DLINK; 510 + priv->customer_id = RT_CID_DLINK; 474 511 break; 475 512 476 513 case EEPROM_CID_WHQL: ··· 479 516 break; 480 517 } 481 518 482 - if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1) 483 - priv->ChannelPlan = 0; 484 - priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13; 519 + if (priv->chnl_plan > CHANNEL_PLAN_LEN - 1) 520 + priv->chnl_plan = 0; 521 + priv->chnl_plan = COUNTRY_CODE_WORLD_WIDE_13; 485 522 486 523 if (priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304) 487 524 priv->rtllib->bSupportRemoteWakeUp = true; ··· 557 594 rtl92e_writel(dev, RRSR, regRRSR); 558 595 559 596 rtl92e_writew(dev, RETRY_LIMIT, 560 - priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | 561 - priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT); 597 + priv->short_retry_limit << RETRY_LIMIT_SHORT_SHIFT | 598 + priv->long_retry_limit << RETRY_LIMIT_LONG_SHIFT); 562 599 } 563 600 564 601 bool rtl92e_start_adapter(struct net_device *dev) ··· 577 614 578 615 start: 579 616 rtl92e_reset_desc_ring(dev); 580 - priv->Rf_Mode = RF_OP_By_SW_3wire; 617 + priv->rf_mode = RF_OP_By_SW_3wire; 581 618 if (priv->rst_progress == RESET_TYPE_NORESET) { 582 619 rtl92e_writeb(dev, ANAPAR, 0x37); 583 620 mdelay(500); 584 621 } 585 - priv->pFirmware->status = FW_STATUS_0_INIT; 622 + priv->fw_info->status = FW_STATUS_0_INIT; 586 623 587 624 ulRegRead = rtl92e_readl(dev, CPU_GEN); 588 - if (priv->pFirmware->status == FW_STATUS_0_INIT) 625 + if (priv->fw_info->status == FW_STATUS_0_INIT) 589 626 ulRegRead |= CPU_GEN_SYSTEM_RESET; 590 - else if (priv->pFirmware->status == FW_STATUS_5_READY) 627 + else if (priv->fw_info->status == FW_STATUS_5_READY) 591 628 ulRegRead |= CPU_GEN_FIRMWARE_RESET; 592 629 else 593 630 netdev_err(dev, "%s(): undefined firmware state: %d.\n", 594 - __func__, priv->pFirmware->status); 631 + __func__, priv->fw_info->status); 595 632 596 633 rtl92e_writel(dev, CPU_GEN, ulRegRead); 597 634 ··· 610 647 return rtStatus; 611 648 } 612 649 613 - priv->LoopbackMode = RTL819X_NO_LOOPBACK; 650 + priv->loopback_mode = RTL819X_NO_LOOPBACK; 614 651 if (priv->rst_progress == RESET_TYPE_NORESET) { 615 652 ulRegRead = rtl92e_readl(dev, CPU_GEN); 616 - if (priv->LoopbackMode == RTL819X_NO_LOOPBACK) 653 + if (priv->loopback_mode == RTL819X_NO_LOOPBACK) 617 654 ulRegRead = (ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | 618 655 CPU_GEN_NO_LOOPBACK_SET; 619 - else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK) 656 + else if (priv->loopback_mode == RTL819X_MAC_LOOPBACK) 620 657 ulRegRead |= CPU_CCK_LOOPBACK; 621 658 else 622 659 netdev_err(dev, "%s: Invalid loopback mode setting.\n", ··· 629 666 _rtl92e_hwconfig(dev); 630 667 rtl92e_writeb(dev, CMDR, CR_RE | CR_TE); 631 668 632 - rtl92e_writeb(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | 633 - (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT))); 669 + rtl92e_writeb(dev, PCIF, ((MXDMA2_NO_LIMIT << MXDMA2_RX_SHIFT) | 670 + (MXDMA2_NO_LIMIT << MXDMA2_TX_SHIFT))); 634 671 rtl92e_writel(dev, MAC0, ((u32 *)dev->dev_addr)[0]); 635 672 rtl92e_writew(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]); 636 - rtl92e_writel(dev, RCR, priv->ReceiveConfig); 673 + rtl92e_writel(dev, RCR, priv->receive_config); 637 674 638 675 rtl92e_writel(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << 639 676 RSVD_FW_QUEUE_PAGE_BK_SHIFT | ··· 687 724 } 688 725 689 726 tmpvalue = rtl92e_readb(dev, IC_VERRSION); 690 - priv->IC_Cut = tmpvalue; 727 + priv->ic_cut = tmpvalue; 691 728 692 729 bfirmwareok = rtl92e_init_fw(dev); 693 730 if (!bfirmwareok) { ··· 723 760 } 724 761 725 762 if (priv->rtllib->FwRWRF) 726 - priv->Rf_Mode = RF_OP_By_FW; 763 + priv->rf_mode = RF_OP_By_FW; 727 764 else 728 - priv->Rf_Mode = RF_OP_By_SW_3wire; 765 + priv->rf_mode = RF_OP_By_SW_3wire; 729 766 730 767 if (priv->rst_progress == RESET_TYPE_NORESET) { 731 768 rtl92e_dm_init_txpower_tracking(dev); 732 769 733 - if (priv->IC_Cut >= IC_VersionCut_D) { 770 + if (priv->ic_cut >= IC_VersionCut_D) { 734 771 tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance, 735 772 bMaskDWord); 736 773 rtl92e_get_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord); 737 774 738 - for (i = 0; i < TxBBGainTableLength; i++) { 775 + for (i = 0; i < TX_BB_GAIN_TABLE_LEN; i++) { 739 776 if (tmpRegA == dm_tx_bb_gain[i]) { 740 777 priv->rfa_txpowertrackingindex = i; 741 778 priv->rfa_txpowertrackingindex_real = i; ··· 748 785 TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, 749 786 bMaskByte2); 750 787 751 - for (i = 0; i < CCKTxBBGainTableLength; i++) { 788 + for (i = 0; i < CCK_TX_BB_GAIN_TABLE_LEN; i++) { 752 789 if (TempCCk == dm_cck_tx_bb_gain[i][0]) { 753 - priv->CCKPresentAttentuation_20Mdefault = i; 790 + priv->cck_present_attn_20m_def = i; 754 791 break; 755 792 } 756 793 } 757 - priv->CCKPresentAttentuation_40Mdefault = 0; 758 - priv->CCKPresentAttentuation_difference = 0; 794 + priv->cck_present_attn_40m_def = 0; 795 + priv->cck_present_attn_diff = 0; 759 796 priv->cck_present_attn = 760 - priv->CCKPresentAttentuation_20Mdefault; 797 + priv->cck_present_attn_20m_def; 761 798 priv->btxpower_tracking = false; 762 799 } 763 800 } ··· 823 860 if (ieee->intel_promiscuous_md_info.promiscuous_on) 824 861 ; 825 862 else 826 - priv->ReceiveConfig = reg |= RCR_CBSSID; 863 + priv->receive_config = reg |= RCR_CBSSID; 827 864 } else 828 - priv->ReceiveConfig = reg &= ~RCR_CBSSID; 865 + priv->receive_config = reg &= ~RCR_CBSSID; 829 866 830 867 rtl92e_writel(dev, RCR, reg); 831 868 } ··· 837 874 struct r8192_priv *priv = rtllib_priv(dev); 838 875 839 876 if (bAllowAllDA) 840 - priv->ReceiveConfig |= RCR_AAP; 877 + priv->receive_config |= RCR_AAP; 841 878 else 842 - priv->ReceiveConfig &= ~RCR_AAP; 879 + priv->receive_config &= ~RCR_AAP; 843 880 844 881 if (WriteIntoReg) 845 - rtl92e_writel(dev, RCR, priv->ReceiveConfig); 882 + rtl92e_writel(dev, RCR, priv->receive_config); 846 883 } 847 884 848 885 static u8 _rtl92e_rate_mgn_to_hw(u8 rate) ··· 1031 1068 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? 1032 1069 (cb_desc->bRTSUseShortPreamble ? 1 : 0) : 1033 1070 (cb_desc->bRTSUseShortGI ? 1 : 0); 1034 - if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) { 1071 + if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20_40) { 1035 1072 if (cb_desc->bPacketBW) { 1036 1073 pTxFwInfo->TxBandwidth = 1; 1037 1074 pTxFwInfo->TxSubCarrier = 0; 1038 1075 } else { 1039 1076 pTxFwInfo->TxBandwidth = 0; 1040 - pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC; 1077 + pTxFwInfo->TxSubCarrier = priv->n_cur_40mhz_prime_sc; 1041 1078 } 1042 1079 } else { 1043 1080 pTxFwInfo->TxBandwidth = 0; ··· 1290 1327 { 1291 1328 struct phy_sts_ofdm_819xpci *pofdm_buf; 1292 1329 struct phy_sts_cck_819xpci *pcck_buf; 1293 - struct phy_ofdm_rx_status_rxsc_sgien_exintfflag *prxsc; 1294 1330 u8 *prxpkt; 1295 - u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg; 1331 + u8 i, max_spatial_stream, tmp_rxevm; 1296 1332 s8 rx_pwr[4], rx_pwr_all = 0; 1297 - s8 rx_snrX, rx_evmX; 1333 + s8 rx_evmX; 1298 1334 u8 evm, pwdb_all; 1299 1335 u32 RSSI, total_rssi = 0; 1300 1336 u8 is_cck_rate = 0; 1301 1337 u8 rf_rx_num = 0; 1302 1338 static u8 check_reg824; 1303 1339 static u32 reg824_bit9; 1304 - 1305 - priv->stats.numqry_phystatus++; 1306 1340 1307 1341 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo); 1308 1342 memset(precord_stats, 0, sizeof(struct rtllib_rx_stats)); ··· 1332 1372 if (is_cck_rate) { 1333 1373 u8 report; 1334 1374 1335 - priv->stats.numqry_phystatusCCK++; 1336 1375 if (!reg824_bit9) { 1337 1376 report = pcck_buf->cck_agc_rpt & 0xc0; 1338 1377 report >>= 6; ··· 1406 1447 precord_stats->RxMIMOSignalQuality[1] = -1; 1407 1448 } 1408 1449 } else { 1409 - priv->stats.numqry_phystatusHT++; 1410 1450 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) { 1411 1451 if (priv->brfpath_rxenable[i]) 1412 1452 rf_rx_num++; 1413 1453 1414 1454 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i] & 0x3F) * 1415 1455 2) - 110; 1416 - 1417 - tmp_rxsnr = pofdm_buf->rxsnr_X[i]; 1418 - rx_snrX = (s8)(tmp_rxsnr); 1419 - rx_snrX /= 2; 1420 - priv->stats.rxSNRdB[i] = (long)rx_snrX; 1421 1456 1422 1457 RSSI = rtl92e_rx_db_to_percent(rx_pwr[i]); 1423 1458 if (priv->brfpath_rxenable[i]) ··· 1452 1499 precord_stats->RxMIMOSignalQuality[i] = evm & 0xff; 1453 1500 } 1454 1501 } 1455 - 1456 - 1457 - rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg; 1458 - prxsc = (struct phy_ofdm_rx_status_rxsc_sgien_exintfflag *) 1459 - &rxsc_sgien_exflg; 1460 - if (pdrvinfo->BW) 1461 - priv->stats.received_bwtype[1+prxsc->rxsc]++; 1462 - else 1463 - priv->stats.received_bwtype[0]++; 1464 1502 } 1465 1503 1466 1504 if (is_cck_rate) { ··· 1514 1570 if (!bcheck) 1515 1571 return; 1516 1572 1517 - priv->stats.num_process_phyinfo++; 1518 1573 if (!prev_st->bIsCCK && prev_st->bPacketToSelf) { 1519 1574 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++) { 1520 1575 if (!rtl92e_is_legal_rf_path(priv->rtllib->dev, rfpath)) ··· 1548 1605 PHY_Beacon_RSSI_SLID_WIN_MAX) { 1549 1606 slide_beacon_adc_pwdb_statistics = 1550 1607 PHY_Beacon_RSSI_SLID_WIN_MAX; 1551 - last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb 1608 + last_beacon_adc_pwdb = priv->stats.slide_beacon_pwdb 1552 1609 [slide_beacon_adc_pwdb_index]; 1553 - priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb; 1610 + priv->stats.slide_beacon_total -= last_beacon_adc_pwdb; 1554 1611 } 1555 - priv->stats.Slide_Beacon_Total += prev_st->RxPWDBAll; 1556 - priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = 1612 + priv->stats.slide_beacon_total += prev_st->RxPWDBAll; 1613 + priv->stats.slide_beacon_pwdb[slide_beacon_adc_pwdb_index] = 1557 1614 prev_st->RxPWDBAll; 1558 1615 slide_beacon_adc_pwdb_index++; 1559 1616 if (slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX) 1560 1617 slide_beacon_adc_pwdb_index = 0; 1561 - prev_st->RxPWDBAll = priv->stats.Slide_Beacon_Total / 1618 + prev_st->RxPWDBAll = priv->stats.slide_beacon_total / 1562 1619 slide_beacon_adc_pwdb_statistics; 1563 1620 if (prev_st->RxPWDBAll >= 3) 1564 1621 prev_st->RxPWDBAll -= 3; ··· 1602 1659 1603 1660 tmp_val = priv->stats.slide_evm_total / 1604 1661 slide_evm_statistics; 1605 - priv->stats.signal_quality = tmp_val; 1606 1662 priv->stats.last_signal_strength_inpercent = tmp_val; 1607 1663 } 1608 1664 ··· 1658 1716 ether_addr_equal(praddr, priv->rtllib->dev->dev_addr); 1659 1717 if (WLAN_FC_GET_FRAMETYPE(fc) == RTLLIB_STYPE_BEACON) 1660 1718 bPacketBeacon = true; 1661 - if (bpacket_match_bssid) 1662 - priv->stats.numpacket_matchbssid++; 1663 - if (bpacket_toself) 1664 - priv->stats.numpacket_toself++; 1665 1719 _rtl92e_process_phyinfo(priv, tmp_buf, &previous_stats, pstats); 1666 1720 _rtl92e_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, 1667 1721 &previous_stats, bpacket_match_bssid, ··· 1672 1734 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); 1673 1735 u32 rcvType = 1; 1674 1736 u32 rateIndex; 1675 - u32 preamble_guardinterval; 1676 1737 1677 1738 if (pstats->bCRC) 1678 1739 rcvType = 2; 1679 1740 else if (pstats->bICV) 1680 1741 rcvType = 3; 1681 - 1682 - if (pstats->bShortPreamble) 1683 - preamble_guardinterval = 1; 1684 - else 1685 - preamble_guardinterval = 0; 1686 1742 1687 1743 switch (pstats->rate) { 1688 1744 case MGN_1M: ··· 1767 1835 rateIndex = 28; 1768 1836 break; 1769 1837 } 1770 - priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++; 1771 1838 priv->stats.received_rate_histogram[0][rateIndex]++; 1772 1839 priv->stats.received_rate_histogram[rcvType][rateIndex]++; 1773 1840 } ··· 1774 1843 bool rtl92e_get_rx_stats(struct net_device *dev, struct rtllib_rx_stats *stats, 1775 1844 struct rx_desc *pdesc, struct sk_buff *skb) 1776 1845 { 1777 - struct r8192_priv *priv = rtllib_priv(dev); 1778 1846 struct rx_fwinfo *pDrvInfo = NULL; 1779 1847 1780 1848 stats->bICV = pdesc->ICV; ··· 1786 1856 1787 1857 if (stats->bHwError) { 1788 1858 stats->bShift = false; 1789 - 1790 - if (pdesc->CRC32) { 1791 - if (pdesc->Length < 500) 1792 - priv->stats.rxcrcerrmin++; 1793 - else if (pdesc->Length > 1000) 1794 - priv->stats.rxcrcerrmax++; 1795 - else 1796 - priv->stats.rxcrcerrmid++; 1797 - } 1798 1859 return false; 1799 1860 } 1800 1861 ··· 1816 1895 stats->RxIs40MHzPacket = pDrvInfo->BW; 1817 1896 1818 1897 _rtl92e_translate_rx_signal_stats(dev, skb, stats, pdesc, pDrvInfo); 1819 - skb_trim(skb, skb->len - 4/*sCrcLng*/); 1898 + skb_trim(skb, skb->len - S_CRC_LEN); 1820 1899 1821 1900 1822 1901 stats->packetlength = stats->Length-4; ··· 1861 1940 1862 1941 1863 1942 rtl92e_writeb(dev, PMR, 0x5); 1864 - rtl92e_writeb(dev, MacBlkCtrl, 0xa); 1943 + rtl92e_writeb(dev, MAC_BLK_CTRL, 0xa); 1865 1944 } 1866 1945 } 1867 1946 ··· 1931 2010 1932 2011 priv->rtllib->tx_headroom = sizeof(struct tx_fwinfo_8190pci); 1933 2012 1934 - priv->ShortRetryLimit = 0x30; 1935 - priv->LongRetryLimit = 0x30; 2013 + priv->short_retry_limit = 0x30; 2014 + priv->long_retry_limit = 0x30; 1936 2015 1937 - priv->ReceiveConfig = RCR_ADD3 | 2016 + priv->receive_config = RCR_ADD3 | 1938 2017 RCR_AMF | RCR_ADF | 1939 2018 RCR_AICV | 1940 2019 RCR_AB | RCR_AM | RCR_APM | ··· 1947 2026 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | 1948 2027 IMR_RDU | IMR_RXFOVW | IMR_TXFOVW | 1949 2028 IMR_BcnInt | IMR_TBDOK | IMR_TBDER); 1950 - 1951 - priv->PwrDomainProtect = false; 1952 2029 1953 2030 priv->bfirst_after_down = false; 1954 2031 } ··· 2017 2098 u8 SilentResetRxSoltNum = 4; 2018 2099 2019 2100 rx_chk_cnt++; 2020 - if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5)) { 2101 + if (priv->undecorated_smoothed_pwdb >= (RATE_ADAPTIVE_TH_HIGH + 5)) { 2021 2102 rx_chk_cnt = 0; 2022 - } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High + 5)) 2023 - && (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) && 2024 - (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M)) 2025 - || ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) && 2026 - (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_20M)))) { 2103 + } else if ((priv->undecorated_smoothed_pwdb < (RATE_ADAPTIVE_TH_HIGH + 5)) 2104 + && (((priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) && 2105 + (priv->undecorated_smoothed_pwdb >= RATE_ADAPTIVE_TH_LOW_40M)) 2106 + || ((priv->current_chnl_bw == HT_CHANNEL_WIDTH_20) && 2107 + (priv->undecorated_smoothed_pwdb >= RATE_ADAPTIVE_TH_LOW_20M)))) { 2027 2108 if (rx_chk_cnt < 2) 2028 2109 return bStuck; 2029 2110 rx_chk_cnt = 0; 2030 - } else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) && 2031 - (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) || 2032 - ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) && 2033 - (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M))) && 2034 - priv->undecorated_smoothed_pwdb >= VeryLowRSSI) { 2111 + } else if ((((priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) && 2112 + (priv->undecorated_smoothed_pwdb < RATE_ADAPTIVE_TH_LOW_40M)) || 2113 + ((priv->current_chnl_bw == HT_CHANNEL_WIDTH_20) && 2114 + (priv->undecorated_smoothed_pwdb < RATE_ADAPTIVE_TH_LOW_20M))) && 2115 + priv->undecorated_smoothed_pwdb >= VERY_LOW_RSSI) { 2035 2116 if (rx_chk_cnt < 4) 2036 2117 return bStuck; 2037 2118 rx_chk_cnt = 0; ··· 2042 2123 } 2043 2124 2044 2125 2045 - SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum; 2126 + SlotIndex = (priv->silent_reset_rx_slot_index++)%SilentResetRxSoltNum; 2046 2127 2047 2128 if (priv->rx_ctr == RegRxCounter) { 2048 - priv->SilentResetRxStuckEvent[SlotIndex] = 1; 2129 + priv->silent_reset_rx_stuck_event[SlotIndex] = 1; 2049 2130 2050 2131 for (i = 0; i < SilentResetRxSoltNum; i++) 2051 - TotalRxStuckCount += priv->SilentResetRxStuckEvent[i]; 2132 + TotalRxStuckCount += priv->silent_reset_rx_stuck_event[i]; 2052 2133 2053 2134 if (TotalRxStuckCount == SilentResetRxSoltNum) { 2054 2135 bStuck = true; 2055 2136 for (i = 0; i < SilentResetRxSoltNum; i++) 2056 2137 TotalRxStuckCount += 2057 - priv->SilentResetRxStuckEvent[i]; 2138 + priv->silent_reset_rx_stuck_event[i]; 2058 2139 } 2059 2140 2060 2141 2061 2142 } else { 2062 - priv->SilentResetRxStuckEvent[SlotIndex] = 0; 2143 + priv->silent_reset_rx_stuck_event[SlotIndex] = 0; 2063 2144 } 2064 2145 2065 2146 priv->rx_ctr = RegRxCounter; ··· 2073 2154 bool bStuck = false; 2074 2155 u16 RegTxCounter = rtl92e_readw(dev, 0x128); 2075 2156 2076 - if (priv->TxCounter == RegTxCounter) 2157 + if (priv->tx_counter == RegTxCounter) 2077 2158 bStuck = true; 2078 2159 2079 - priv->TxCounter = RegTxCounter; 2160 + priv->tx_counter = RegTxCounter; 2080 2161 2081 2162 return bStuck; 2082 2163 }

+2 -2

drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c

··· 51 51 u8 load_fw_status) 52 52 { 53 53 struct r8192_priv *priv = rtllib_priv(dev); 54 - struct rt_firmware *pfirmware = priv->pFirmware; 54 + struct rt_firmware *pfirmware = priv->fw_info; 55 55 bool rt_status = true; 56 56 57 57 switch (load_fw_status) { ··· 134 134 enum opt_rst_type rst_opt = OPT_SYSTEM_RESET; 135 135 enum firmware_init_step starting_state = FW_INIT_STEP0_BOOT; 136 136 137 - struct rt_firmware *pfirmware = priv->pFirmware; 137 + struct rt_firmware *pfirmware = priv->fw_info; 138 138 139 139 netdev_dbg(dev, " PlatformInitFirmware()==>\n"); 140 140

+16 -203

drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h

··· 8 8 #define R8180_HW 9 9 10 10 enum baseband_config { 11 - BaseBand_Config_PHY_REG = 0, 12 - BaseBand_Config_AGC_TAB = 1, 11 + BB_CONFIG_PHY_REG = 0, 12 + BB_CONFIG_AGC_TAB = 1, 13 13 }; 14 - 15 - #define RTL8187_REQT_READ 0xc0 16 - #define RTL8187_REQT_WRITE 0x40 17 - #define RTL8187_REQ_GET_REGS 0x05 18 - #define RTL8187_REQ_SET_REGS 0x05 19 - 20 - #define MAX_TX_URB 5 21 - #define MAX_RX_URB 16 22 - #define RX_URB_SIZE 9100 23 - 24 - #define BB_ANTATTEN_CHAN14 0x0c 25 - #define BB_ANTENNA_B 0x40 26 - 27 - #define BB_HOST_BANG (1<<30) 28 - #define BB_HOST_BANG_EN (1<<2) 29 - #define BB_HOST_BANG_CLK (1<<1) 30 - #define BB_HOST_BANG_RW (1<<3) 31 - #define BB_HOST_BANG_DATA 1 32 14 33 15 #define RTL8190_EEPROM_ID 0x8129 34 16 #define EEPROM_VID 0x02 35 17 #define EEPROM_DID 0x04 36 18 #define EEPROM_NODE_ADDRESS_BYTE_0 0x0C 37 19 38 - #define EEPROM_TxPowerDiff 0x1F 39 - 40 - 41 - #define EEPROM_PwDiff 0x21 42 - #define EEPROM_CrystalCap 0x22 43 - 44 - 45 - 46 - #define EEPROM_TxPwIndex_CCK_V1 0x29 47 - #define EEPROM_TxPwIndex_OFDM_24G_V1 0x2C 48 - #define EEPROM_TxPwIndex_Ver 0x27 49 - 50 - #define EEPROM_Default_TxPowerDiff 0x0 51 20 #define EEPROM_Default_ThermalMeter 0x77 52 21 #define EEPROM_Default_AntTxPowerDiff 0x0 53 22 #define EEPROM_Default_TxPwDiff_CrystalCap 0x5 54 - #define EEPROM_Default_PwDiff 0x4 55 - #define EEPROM_Default_CrystalCap 0x5 56 23 #define EEPROM_Default_TxPower 0x1010 57 24 #define EEPROM_ICVersion_ChannelPlan 0x7C 58 25 #define EEPROM_Customer_ID 0x7B 59 26 #define EEPROM_RFInd_PowerDiff 0x28 27 + 60 28 #define EEPROM_ThermalMeter 0x29 61 29 #define EEPROM_TxPwDiff_CrystalCap 0x2A 62 30 #define EEPROM_TxPwIndex_CCK 0x2C 63 31 #define EEPROM_TxPwIndex_OFDM_24G 0x3A 64 - #define EEPROM_Default_TxPowerLevel 0x10 65 - #define EEPROM_IC_VER 0x7d 66 - #define EEPROM_CRC 0x7e 67 32 68 33 #define EEPROM_CID_DEFAULT 0x0 69 34 #define EEPROM_CID_CAMEO 0x1 70 35 #define EEPROM_CID_RUNTOP 0x2 71 - #define EEPROM_CID_Senao 0x3 72 36 #define EEPROM_CID_TOSHIBA 0x4 73 37 #define EEPROM_CID_NetCore 0x5 74 38 #define EEPROM_CID_Nettronix 0x6 75 39 #define EEPROM_CID_Pronet 0x7 76 40 #define EEPROM_CID_DLINK 0x8 77 41 #define EEPROM_CID_WHQL 0xFE 78 - enum _RTL8192Pci_HW { 42 + enum _RTL8192PCI_HW { 79 43 MAC0 = 0x000, 80 - MAC1 = 0x001, 81 - MAC2 = 0x002, 82 - MAC3 = 0x003, 83 44 MAC4 = 0x004, 84 - MAC5 = 0x005, 85 45 PCIF = 0x009, 86 - #define MXDMA2_16bytes 0x000 87 - #define MXDMA2_32bytes 0x001 88 - #define MXDMA2_64bytes 0x010 89 - #define MXDMA2_128bytes 0x011 90 - #define MXDMA2_256bytes 0x100 91 - #define MXDMA2_512bytes 0x101 92 - #define MXDMA2_1024bytes 0x110 93 - #define MXDMA2_NoLimit 0x7 46 + #define MXDMA2_NO_LIMIT 0x7 94 47 95 - #define MULRW_SHIFT 3 96 48 #define MXDMA2_RX_SHIFT 4 97 49 #define MXDMA2_TX_SHIFT 0 98 50 PMR = 0x00c, 99 51 EPROM_CMD = 0x00e, 100 - #define EPROM_CMD_RESERVED_MASK BIT5 52 + 101 53 #define EPROM_CMD_9356SEL BIT4 102 54 #define EPROM_CMD_OPERATING_MODE_SHIFT 6 103 - #define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6)) 104 - #define EPROM_CMD_CONFIG 0x3 105 55 #define EPROM_CMD_NORMAL 0 106 - #define EPROM_CMD_LOAD 1 107 56 #define EPROM_CMD_PROGRAM 2 108 57 #define EPROM_CS_BIT 3 109 58 #define EPROM_CK_BIT 2 110 59 #define EPROM_W_BIT 1 111 60 #define EPROM_R_BIT 0 112 61 113 - AFR = 0x010, 114 - #define AFR_CardBEn (1<<0) 115 - #define AFR_CLKRUN_SEL (1<<1) 116 - #define AFR_FuncRegEn (1<<2) 117 - 118 62 ANAPAR = 0x17, 119 63 #define BB_GLOBAL_RESET_BIT 0x1 120 64 BB_GLOBAL_RESET = 0x020, 121 65 BSSIDR = 0x02E, 122 66 CMDR = 0x037, 123 - #define CR_RST 0x10 124 67 #define CR_RE 0x08 125 68 #define CR_TE 0x04 126 - #define CR_MulRW 0x01 127 69 SIFS = 0x03E, 128 - TCR = 0x040, 129 70 RCR = 0x044, 130 - #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \ 131 - BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23) 132 71 #define RCR_ONLYERLPKT BIT31 133 - #define RCR_ENCS2 BIT30 134 - #define RCR_ENCS1 BIT29 135 - #define RCR_ENMBID BIT27 136 - #define RCR_ACKTXBW (BIT24|BIT25) 137 72 #define RCR_CBSSID BIT23 138 - #define RCR_APWRMGT BIT22 139 73 #define RCR_ADD3 BIT21 140 74 #define RCR_AMF BIT20 141 - #define RCR_ACF BIT19 142 75 #define RCR_ADF BIT18 143 - #define RCR_RXFTH BIT13 144 76 #define RCR_AICV BIT12 145 - #define RCR_ACRC32 BIT5 146 77 #define RCR_AB BIT3 147 78 #define RCR_AM BIT2 148 79 #define RCR_APM BIT1 ··· 82 151 #define RCR_FIFO_OFFSET 13 83 152 SLOT_TIME = 0x049, 84 153 ACK_TIMEOUT = 0x04c, 85 - PIFS_TIME = 0x04d, 86 - USTIME = 0x04e, 87 154 EDCAPARA_BE = 0x050, 88 155 EDCAPARA_BK = 0x054, 89 156 EDCAPARA_VO = 0x058, ··· 90 161 #define AC_PARAM_ECW_MAX_OFFSET 12 91 162 #define AC_PARAM_ECW_MIN_OFFSET 8 92 163 #define AC_PARAM_AIFS_OFFSET 0 93 - RFPC = 0x05F, 94 - CWRR = 0x060, 95 164 BCN_TCFG = 0x062, 96 165 #define BCN_TCFG_CW_SHIFT 8 97 166 #define BCN_TCFG_IFS 0 98 167 BCN_INTERVAL = 0x070, 99 168 ATIMWND = 0x072, 100 169 BCN_DRV_EARLY_INT = 0x074, 101 - #define BCN_DRV_EARLY_INT_SWBCN_SHIFT 8 102 - #define BCN_DRV_EARLY_INT_TIME_SHIFT 0 103 170 BCN_DMATIME = 0x076, 104 171 BCN_ERR_THRESH = 0x078, 105 172 RWCAM = 0x0A0, 106 - #define CAM_CM_SecCAMPolling BIT31 107 - #define CAM_CM_SecCAMClr BIT30 108 - #define CAM_CM_SecCAMWE BIT16 109 - #define CAM_VALID BIT15 110 - #define CAM_NOTVALID 0x0000 111 - #define CAM_USEDK BIT5 112 - 113 - #define CAM_NONE 0x0 114 - #define CAM_WEP40 0x01 115 - #define CAM_TKIP 0x02 116 - #define CAM_AES 0x04 117 - #define CAM_WEP104 0x05 118 - 119 173 #define TOTAL_CAM_ENTRY 32 120 - 121 - #define CAM_CONFIG_USEDK true 122 - #define CAM_CONFIG_NO_USEDK false 123 - #define CAM_WRITE BIT16 124 - #define CAM_READ 0x00000000 125 - #define CAM_POLLINIG BIT31 126 - #define SCR_UseDK 0x01 127 174 WCAMI = 0x0A4, 128 - RCAMO = 0x0A8, 129 175 SECR = 0x0B0, 130 176 #define SCR_TxUseDK BIT0 131 177 #define SCR_RxUseDK BIT1 132 178 #define SCR_TxEncEnable BIT2 133 179 #define SCR_RxDecEnable BIT3 134 - #define SCR_SKByA2 BIT4 135 180 #define SCR_NoSKMC BIT5 136 181 SWREGULATOR = 0x0BD, 137 182 INTA_MASK = 0x0f4, 138 - #define IMR8190_DISABLED 0x0 139 - #define IMR_ATIMEND BIT28 140 183 #define IMR_TBDOK BIT27 141 184 #define IMR_TBDER BIT26 142 185 #define IMR_TXFOVW BIT15 ··· 128 227 #define IMR_VODOK BIT1 129 228 #define IMR_ROK BIT0 130 229 ISR = 0x0f8, 131 - TPPoll = 0x0fd, 132 - #define TPPoll_BKQ BIT0 133 - #define TPPoll_BEQ BIT1 134 - #define TPPoll_VIQ BIT2 135 - #define TPPoll_VOQ BIT3 136 - #define TPPoll_BQ BIT4 137 - #define TPPoll_CQ BIT5 138 - #define TPPoll_MQ BIT6 139 - #define TPPoll_HQ BIT7 140 - #define TPPoll_HCCAQ BIT8 141 - #define TPPoll_StopBK BIT9 142 - #define TPPoll_StopBE BIT10 143 - #define TPPoll_StopVI BIT11 144 - #define TPPoll_StopVO BIT12 145 - #define TPPoll_StopMgt BIT13 146 - #define TPPoll_StopHigh BIT14 147 - #define TPPoll_StopHCCA BIT15 148 - #define TPPoll_SHIFT 8 149 - 230 + TP_POLL = 0x0fd, 231 + #define TP_POLL_CQ BIT5 150 232 PSR = 0x0ff, 151 - #define PSR_GEN 0x0 152 - #define PSR_CPU 0x1 153 233 CPU_GEN = 0x100, 154 - BB_RESET = 0x101, 155 234 #define CPU_CCK_LOOPBACK 0x00030000 156 235 #define CPU_GEN_SYSTEM_RESET 0x00000001 157 236 #define CPU_GEN_FIRMWARE_RESET 0x00000008 ··· 142 261 #define CPU_GEN_PWR_STB_CPU 0x00000004 143 262 #define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF 144 263 #define CPU_GEN_NO_LOOPBACK_SET 0x00080000 145 - #define CPU_GEN_GPIO_UART 0x00007000 146 - 147 - LED1Cfg = 0x154, 148 - LED0Cfg = 0x155, 149 - 150 - AcmAvg = 0x170, 151 - AcmHwCtrl = 0x171, 152 - #define AcmHw_HwEn BIT0 153 - #define AcmHw_BeqEn BIT1 154 - #define AcmHw_ViqEn BIT2 155 - #define AcmHw_VoqEn BIT3 156 - #define AcmHw_BeqStatus BIT4 157 - #define AcmHw_ViqStatus BIT5 158 - #define AcmHw_VoqStatus BIT6 159 - AcmFwCtrl = 0x172, 160 - #define AcmFw_BeqStatus BIT0 161 - #define AcmFw_ViqStatus BIT1 162 - #define AcmFw_VoqStatus BIT2 163 - VOAdmTime = 0x174, 164 - VIAdmTime = 0x178, 165 - BEAdmTime = 0x17C, 264 + ACM_HW_CTRL = 0x171, 265 + #define ACM_HW_BEQ_EN BIT1 266 + #define ACM_HW_VIQ_EN BIT2 267 + #define ACM_HW_VOQ_EN BIT3 166 268 RQPN1 = 0x180, 167 269 RQPN2 = 0x184, 168 270 RQPN3 = 0x188, 169 - QPRR = 0x1E0, 170 271 QPNR = 0x1F0, 171 272 BQDA = 0x200, 172 273 HQDA = 0x204, ··· 159 296 VIQDA = 0x218, 160 297 BEQDA = 0x21C, 161 298 BKQDA = 0x220, 162 - RCQDA = 0x224, 163 299 RDQDA = 0x228, 164 300 165 - MAR0 = 0x240, 166 - MAR4 = 0x244, 167 - 168 - CCX_PERIOD = 0x250, 169 - CLM_RESULT = 0x251, 170 - NHM_PERIOD = 0x252, 171 - 172 - NHM_THRESHOLD0 = 0x253, 173 - NHM_THRESHOLD1 = 0x254, 174 - NHM_THRESHOLD2 = 0x255, 175 - NHM_THRESHOLD3 = 0x256, 176 - NHM_THRESHOLD4 = 0x257, 177 - NHM_THRESHOLD5 = 0x258, 178 - NHM_THRESHOLD6 = 0x259, 179 - 180 - MCTRL = 0x25A, 181 - 182 - NHM_RPI_COUNTER0 = 0x264, 183 - NHM_RPI_COUNTER1 = 0x265, 184 - NHM_RPI_COUNTER2 = 0x266, 185 - NHM_RPI_COUNTER3 = 0x267, 186 - NHM_RPI_COUNTER4 = 0x268, 187 - NHM_RPI_COUNTER5 = 0x269, 188 - NHM_RPI_COUNTER6 = 0x26A, 189 - NHM_RPI_COUNTER7 = 0x26B, 190 301 WFCRC0 = 0x2f0, 191 302 WFCRC1 = 0x2f4, 192 303 WFCRC2 = 0x2f8, 193 304 194 305 BW_OPMODE = 0x300, 195 - #define BW_OPMODE_11J BIT0 196 306 #define BW_OPMODE_5G BIT1 197 307 #define BW_OPMODE_20MHZ BIT2 198 308 IC_VERRSION = 0x301, 199 309 MSR = 0x303, 200 - #define MSR_LINK_MASK ((1<<0)|(1<<1)) 310 + #define MSR_LINK_MASK (BIT(1) | BIT(0)) 201 311 #define MSR_LINK_MANAGED 2 202 - #define MSR_LINK_NONE 0 203 - #define MSR_LINK_SHIFT 0 204 312 #define MSR_LINK_ADHOC 1 205 313 #define MSR_LINK_MASTER 3 206 - #define MSR_LINK_ENEDCA (1<<4) 207 314 208 315 #define MSR_NOLINK 0x00 209 316 #define MSR_ADHOC 0x01 ··· 185 352 #define RETRY_LIMIT_LONG_SHIFT 0 186 353 TSFR = 0x308, 187 354 RRSR = 0x310, 188 - #define RRSR_RSC_OFFSET 21 189 355 #define RRSR_SHORT_OFFSET 23 190 - #define RRSR_RSC_DUPLICATE 0x600000 191 - #define RRSR_RSC_UPSUBCHNL 0x400000 192 - #define RRSR_RSC_LOWSUBCHNL 0x200000 193 - #define RRSR_SHORT 0x800000 194 356 #define RRSR_1M BIT0 195 357 #define RRSR_2M BIT1 196 358 #define RRSR_5_5M BIT2 ··· 198 370 #define RRSR_36M BIT9 199 371 #define RRSR_48M BIT10 200 372 #define RRSR_54M BIT11 201 - #define RRSR_MCS0 BIT12 202 - #define RRSR_MCS1 BIT13 203 - #define RRSR_MCS2 BIT14 204 - #define RRSR_MCS3 BIT15 205 - #define RRSR_MCS4 BIT16 206 - #define RRSR_MCS5 BIT17 207 - #define RRSR_MCS6 BIT18 208 - #define RRSR_MCS7 BIT19 209 373 #define BRSR_AckShortPmb BIT23 210 374 UFWP = 0x318, 211 375 RATR0 = 0x320, ··· 239 419 RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \ 240 420 RATR_MCS14|RATR_MCS15) 241 421 242 - 243 422 DRIVER_RSSI = 0x32c, 244 423 MCS_TXAGC = 0x340, 245 424 CCK_TXAGC = 0x348, 246 - MacBlkCtrl = 0x403, 247 - 248 - } 249 - ; 425 + MAC_BLK_CTRL = 0x403, 426 + }; 250 427 251 428 #define GPI 0x108 252 - #define GPO 0x109 253 - #define GPE 0x10a 254 429 255 - #define HWSET_MAX_SIZE_92S 128 256 - 257 - #define ANAPAR_FOR_8192PciE 0x17 430 + #define ANAPAR_FOR_8192PCIE 0x17 258 431 259 432 #endif

+160 -182

drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c

··· 94 94 struct r8192_priv *priv = rtllib_priv(dev); 95 95 u32 ret = 0; 96 96 u32 NewOffset = 0; 97 - struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; 97 + struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; 98 98 99 99 Offset &= 0x3f; 100 100 101 101 if (priv->rf_chip == RF_8256) { 102 102 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0); 103 103 if (Offset >= 31) { 104 - priv->RfReg0Value[eRFPath] |= 0x140; 104 + priv->rf_reg_0value[eRFPath] |= 0x140; 105 105 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, 106 106 bMaskDWord, 107 - (priv->RfReg0Value[eRFPath]<<16)); 107 + (priv->rf_reg_0value[eRFPath] << 16)); 108 108 NewOffset = Offset - 30; 109 109 } else if (Offset >= 16) { 110 - priv->RfReg0Value[eRFPath] |= 0x100; 111 - priv->RfReg0Value[eRFPath] &= (~0x40); 110 + priv->rf_reg_0value[eRFPath] |= 0x100; 111 + priv->rf_reg_0value[eRFPath] &= (~0x40); 112 112 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, 113 113 bMaskDWord, 114 - (priv->RfReg0Value[eRFPath]<<16)); 114 + (priv->rf_reg_0value[eRFPath] << 16)); 115 115 116 116 NewOffset = Offset - 15; 117 117 } else ··· 130 130 bLSSIReadBackData); 131 131 132 132 if (priv->rf_chip == RF_8256) { 133 - priv->RfReg0Value[eRFPath] &= 0xebf; 133 + priv->rf_reg_0value[eRFPath] &= 0xebf; 134 134 135 135 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, 136 - (priv->RfReg0Value[eRFPath] << 16)); 136 + (priv->rf_reg_0value[eRFPath] << 16)); 137 137 138 138 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3); 139 139 } ··· 149 149 { 150 150 struct r8192_priv *priv = rtllib_priv(dev); 151 151 u32 DataAndAddr = 0, NewOffset = 0; 152 - struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; 152 + struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; 153 153 154 154 Offset &= 0x3f; 155 155 if (priv->rf_chip == RF_8256) { 156 156 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0); 157 157 158 158 if (Offset >= 31) { 159 - priv->RfReg0Value[eRFPath] |= 0x140; 159 + priv->rf_reg_0value[eRFPath] |= 0x140; 160 160 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, 161 161 bMaskDWord, 162 - (priv->RfReg0Value[eRFPath] << 16)); 162 + (priv->rf_reg_0value[eRFPath] << 16)); 163 163 NewOffset = Offset - 30; 164 164 } else if (Offset >= 16) { 165 - priv->RfReg0Value[eRFPath] |= 0x100; 166 - priv->RfReg0Value[eRFPath] &= (~0x40); 165 + priv->rf_reg_0value[eRFPath] |= 0x100; 166 + priv->rf_reg_0value[eRFPath] &= (~0x40); 167 167 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, 168 168 bMaskDWord, 169 - (priv->RfReg0Value[eRFPath] << 16)); 169 + (priv->rf_reg_0value[eRFPath] << 16)); 170 170 NewOffset = Offset - 15; 171 171 } else 172 172 NewOffset = Offset; ··· 179 179 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); 180 180 181 181 if (Offset == 0x0) 182 - priv->RfReg0Value[eRFPath] = Data; 182 + priv->rf_reg_0value[eRFPath] = Data; 183 183 184 184 if (priv->rf_chip == RF_8256) { 185 185 if (Offset != 0) { 186 - priv->RfReg0Value[eRFPath] &= 0xebf; 186 + priv->rf_reg_0value[eRFPath] &= 0xebf; 187 187 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, 188 188 bMaskDWord, 189 - (priv->RfReg0Value[eRFPath] << 16)); 189 + (priv->rf_reg_0value[eRFPath] << 16)); 190 190 } 191 191 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3); 192 192 } ··· 203 203 if (priv->rtllib->rf_power_state != rf_on && !priv->being_init_adapter) 204 204 return; 205 205 206 - if (priv->Rf_Mode == RF_OP_By_FW) { 206 + if (priv->rf_mode == RF_OP_By_FW) { 207 207 if (BitMask != bMask12Bits) { 208 208 Original_Value = _rtl92e_phy_rf_fw_read(dev, eRFPath, 209 209 RegAddr); ··· 240 240 if (priv->rtllib->rf_power_state != rf_on && !priv->being_init_adapter) 241 241 return 0; 242 242 mutex_lock(&priv->rf_mutex); 243 - if (priv->Rf_Mode == RF_OP_By_FW) { 243 + if (priv->rf_mode == RF_OP_By_FW) { 244 244 Original_Value = _rtl92e_phy_rf_fw_read(dev, eRFPath, RegAddr); 245 245 udelay(200); 246 246 } else { ··· 306 306 u32 *pdwArray = NULL; 307 307 struct r8192_priv *priv = rtllib_priv(dev); 308 308 309 - if (priv->bTXPowerDataReadFromEEPORM) { 309 + if (priv->tx_pwr_data_read_from_eeprom) { 310 310 dwArrayLen = MACPHY_Array_PGLength; 311 311 pdwArray = Rtl819XMACPHY_Array_PG; 312 312 ··· 342 342 Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray; 343 343 } 344 344 345 - if (ConfigType == BaseBand_Config_PHY_REG) { 345 + if (ConfigType == BB_CONFIG_PHY_REG) { 346 346 for (i = 0; i < PHY_REGArrayLen; i += 2) { 347 347 rtl92e_set_bb_reg(dev, Rtl819XPHY_REGArray_Table[i], 348 348 bMaskDWord, 349 349 Rtl819XPHY_REGArray_Table[i+1]); 350 350 } 351 - } else if (ConfigType == BaseBand_Config_AGC_TAB) { 351 + } else if (ConfigType == BB_CONFIG_AGC_TAB) { 352 352 for (i = 0; i < AGCTAB_ArrayLen; i += 2) { 353 353 rtl92e_set_bb_reg(dev, Rtl819XAGCTAB_Array_Table[i], 354 354 bMaskDWord, ··· 361 361 { 362 362 struct r8192_priv *priv = rtllib_priv(dev); 363 363 364 - priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; 365 - priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; 366 - priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; 367 - priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; 364 + priv->phy_reg_def[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; 365 + priv->phy_reg_def[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; 366 + priv->phy_reg_def[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; 367 + priv->phy_reg_def[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; 368 368 369 - priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; 370 - priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB; 371 - priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB; 372 - priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB; 369 + priv->phy_reg_def[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; 370 + priv->phy_reg_def[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB; 371 + priv->phy_reg_def[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB; 372 + priv->phy_reg_def[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB; 373 373 374 - priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; 375 - priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; 376 - priv->PHYRegDef[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE; 377 - priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE; 374 + priv->phy_reg_def[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; 375 + priv->phy_reg_def[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; 376 + priv->phy_reg_def[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE; 377 + priv->phy_reg_def[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE; 378 378 379 - priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; 380 - priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; 381 - priv->PHYRegDef[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE; 382 - priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE; 379 + priv->phy_reg_def[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; 380 + priv->phy_reg_def[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; 381 + priv->phy_reg_def[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE; 382 + priv->phy_reg_def[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE; 383 383 384 - priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; 385 - priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; 386 - priv->PHYRegDef[RF90_PATH_C].rf3wireOffset = rFPGA0_XC_LSSIParameter; 387 - priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter; 384 + priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; 385 + priv->phy_reg_def[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; 386 + priv->phy_reg_def[RF90_PATH_C].rf3wireOffset = rFPGA0_XC_LSSIParameter; 387 + priv->phy_reg_def[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter; 388 388 389 - priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; 390 - priv->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; 391 - priv->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; 392 - priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; 389 + priv->phy_reg_def[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; 390 + priv->phy_reg_def[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; 391 + priv->phy_reg_def[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; 392 + priv->phy_reg_def[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; 393 393 394 - priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; 395 - priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; 396 - priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; 397 - priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; 394 + priv->phy_reg_def[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; 395 + priv->phy_reg_def[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; 396 + priv->phy_reg_def[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; 397 + priv->phy_reg_def[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; 398 398 399 - priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; 400 - priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; 401 - priv->PHYRegDef[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1; 402 - priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; 399 + priv->phy_reg_def[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; 400 + priv->phy_reg_def[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; 401 + priv->phy_reg_def[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1; 402 + priv->phy_reg_def[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; 403 403 404 - priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; 405 - priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; 406 - priv->PHYRegDef[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2; 407 - priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; 404 + priv->phy_reg_def[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; 405 + priv->phy_reg_def[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; 406 + priv->phy_reg_def[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2; 407 + priv->phy_reg_def[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; 408 408 409 - priv->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; 410 - priv->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; 411 - priv->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; 412 - priv->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; 409 + priv->phy_reg_def[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; 410 + priv->phy_reg_def[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; 411 + priv->phy_reg_def[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; 412 + priv->phy_reg_def[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; 413 413 414 - priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; 415 - priv->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; 416 - priv->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; 417 - priv->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; 414 + priv->phy_reg_def[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; 415 + priv->phy_reg_def[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; 416 + priv->phy_reg_def[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; 417 + priv->phy_reg_def[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; 418 418 419 - priv->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; 420 - priv->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; 421 - priv->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; 422 - priv->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; 419 + priv->phy_reg_def[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; 420 + priv->phy_reg_def[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; 421 + priv->phy_reg_def[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; 422 + priv->phy_reg_def[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; 423 423 424 - priv->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; 425 - priv->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; 426 - priv->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; 427 - priv->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; 424 + priv->phy_reg_def[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; 425 + priv->phy_reg_def[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; 426 + priv->phy_reg_def[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; 427 + priv->phy_reg_def[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; 428 428 429 - priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; 430 - priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; 431 - priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; 432 - priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; 429 + priv->phy_reg_def[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; 430 + priv->phy_reg_def[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; 431 + priv->phy_reg_def[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; 432 + priv->phy_reg_def[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; 433 433 434 - priv->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; 435 - priv->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; 436 - priv->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; 437 - priv->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; 434 + priv->phy_reg_def[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; 435 + priv->phy_reg_def[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; 436 + priv->phy_reg_def[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; 437 + priv->phy_reg_def[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; 438 438 439 - priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; 440 - priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; 441 - priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; 442 - priv->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; 439 + priv->phy_reg_def[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; 440 + priv->phy_reg_def[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; 441 + priv->phy_reg_def[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; 442 + priv->phy_reg_def[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; 443 443 444 - priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; 445 - priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; 446 - priv->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; 447 - priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; 444 + priv->phy_reg_def[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; 445 + priv->phy_reg_def[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; 446 + priv->phy_reg_def[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; 447 + priv->phy_reg_def[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; 448 448 449 449 } 450 450 ··· 526 526 return rtStatus; 527 527 } 528 528 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); 529 - _rtl92e_phy_config_bb(dev, BaseBand_Config_PHY_REG); 529 + _rtl92e_phy_config_bb(dev, BB_CONFIG_PHY_REG); 530 530 531 531 dwRegValue = rtl92e_readl(dev, CPU_GEN); 532 532 rtl92e_writel(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST)); 533 533 534 - _rtl92e_phy_config_bb(dev, BaseBand_Config_AGC_TAB); 534 + _rtl92e_phy_config_bb(dev, BB_CONFIG_AGC_TAB); 535 535 536 - if (priv->IC_Cut > VERSION_8190_BD) { 536 + if (priv->ic_cut > VERSION_8190_BD) { 537 537 if (priv->rf_type == RF_2T4R) 538 - dwRegValue = priv->AntennaTxPwDiff[2]<<8 | 539 - priv->AntennaTxPwDiff[1]<<4 | 540 - priv->AntennaTxPwDiff[0]; 538 + dwRegValue = priv->antenna_tx_pwr_diff[2] << 8 | 539 + priv->antenna_tx_pwr_diff[1] << 4 | 540 + priv->antenna_tx_pwr_diff[0]; 541 541 else 542 542 dwRegValue = 0x0; 543 543 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, 544 544 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); 545 545 546 546 547 - dwRegValue = priv->CrystalCap; 547 + dwRegValue = priv->crystal_cap; 548 548 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, 549 549 dwRegValue); 550 550 } ··· 561 561 { 562 562 struct r8192_priv *priv = rtllib_priv(dev); 563 563 564 - priv->MCSTxPowerLevelOriginalOffset[0] = 564 + priv->mcs_tx_pwr_level_org_offset[0] = 565 565 rtl92e_readl(dev, rTxAGC_Rate18_06); 566 - priv->MCSTxPowerLevelOriginalOffset[1] = 566 + priv->mcs_tx_pwr_level_org_offset[1] = 567 567 rtl92e_readl(dev, rTxAGC_Rate54_24); 568 - priv->MCSTxPowerLevelOriginalOffset[2] = 568 + priv->mcs_tx_pwr_level_org_offset[2] = 569 569 rtl92e_readl(dev, rTxAGC_Mcs03_Mcs00); 570 - priv->MCSTxPowerLevelOriginalOffset[3] = 570 + priv->mcs_tx_pwr_level_org_offset[3] = 571 571 rtl92e_readl(dev, rTxAGC_Mcs07_Mcs04); 572 - priv->MCSTxPowerLevelOriginalOffset[4] = 572 + priv->mcs_tx_pwr_level_org_offset[4] = 573 573 rtl92e_readl(dev, rTxAGC_Mcs11_Mcs08); 574 - priv->MCSTxPowerLevelOriginalOffset[5] = 574 + priv->mcs_tx_pwr_level_org_offset[5] = 575 575 rtl92e_readl(dev, rTxAGC_Mcs15_Mcs12); 576 576 577 - priv->DefaultInitialGain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1); 578 - priv->DefaultInitialGain[1] = rtl92e_readb(dev, rOFDM0_XBAGCCore1); 579 - priv->DefaultInitialGain[2] = rtl92e_readb(dev, rOFDM0_XCAGCCore1); 580 - priv->DefaultInitialGain[3] = rtl92e_readb(dev, rOFDM0_XDAGCCore1); 577 + priv->def_initial_gain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1); 578 + priv->def_initial_gain[1] = rtl92e_readb(dev, rOFDM0_XBAGCCore1); 579 + priv->def_initial_gain[2] = rtl92e_readb(dev, rOFDM0_XCAGCCore1); 580 + priv->def_initial_gain[3] = rtl92e_readb(dev, rOFDM0_XDAGCCore1); 581 581 582 582 priv->framesync = rtl92e_readb(dev, rOFDM0_RxDetector3); 583 - priv->framesyncC34 = rtl92e_readl(dev, rOFDM0_RxDetector2); 584 - priv->SifsTime = rtl92e_readw(dev, SIFS); 585 583 } 586 584 587 585 void rtl92e_set_tx_power(struct net_device *dev, u8 channel) 588 586 { 589 587 struct r8192_priv *priv = rtllib_priv(dev); 590 588 u8 powerlevel = 0, powerlevelOFDM24G = 0; 591 - s8 ant_pwr_diff; 592 - u32 u4RegValue; 593 589 594 590 if (priv->epromtype == EEPROM_93C46) { 595 - powerlevel = priv->TxPowerLevelCCK[channel-1]; 596 - powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1]; 591 + powerlevel = priv->tx_pwr_level_cck[channel - 1]; 592 + powerlevelOFDM24G = priv->tx_pwr_level_ofdm_24g[channel - 1]; 597 593 } else if (priv->epromtype == EEPROM_93C56) { 598 - if (priv->rf_type == RF_1T2R) { 599 - powerlevel = priv->TxPowerLevelCCK_C[channel-1]; 600 - powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_C[channel-1]; 601 - } else if (priv->rf_type == RF_2T4R) { 602 - powerlevel = priv->TxPowerLevelCCK_A[channel-1]; 603 - powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_A[channel-1]; 604 - 605 - ant_pwr_diff = priv->TxPowerLevelOFDM24G_C[channel-1] 606 - - priv->TxPowerLevelOFDM24G_A[channel-1]; 607 - 608 - priv->RF_C_TxPwDiff = ant_pwr_diff; 609 - 610 - ant_pwr_diff &= 0xf; 611 - 612 - priv->AntennaTxPwDiff[2] = 0; 613 - priv->AntennaTxPwDiff[1] = (u8)(ant_pwr_diff); 614 - priv->AntennaTxPwDiff[0] = 0; 615 - 616 - u4RegValue = priv->AntennaTxPwDiff[2]<<8 | 617 - priv->AntennaTxPwDiff[1]<<4 | 618 - priv->AntennaTxPwDiff[0]; 594 + if (priv->rf_type == RF_2T4R) { 595 + priv->antenna_tx_pwr_diff[2] = 0; 596 + priv->antenna_tx_pwr_diff[1] = 0; 597 + priv->antenna_tx_pwr_diff[0] = 0; 619 598 620 599 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, 621 - (bXBTxAGC|bXCTxAGC|bXDTxAGC), 622 - u4RegValue); 600 + (bXBTxAGC | bXCTxAGC | bXDTxAGC), 0); 623 601 } 624 602 } 625 603 switch (priv->rf_chip) { ··· 704 726 static void _rtl92e_set_tx_power_level(struct net_device *dev, u8 channel) 705 727 { 706 728 struct r8192_priv *priv = rtllib_priv(dev); 707 - u8 powerlevel = priv->TxPowerLevelCCK[channel-1]; 708 - u8 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1]; 729 + u8 powerlevel = priv->tx_pwr_level_cck[channel - 1]; 730 + u8 powerlevelOFDM24G = priv->tx_pwr_level_ofdm_24g[channel - 1]; 709 731 710 732 switch (priv->rf_chip) { 711 733 case RF_8225: ··· 864 886 continue; 865 887 switch (CurrentCmd->CmdID) { 866 888 case CmdID_SetTxPowerLevel: 867 - if (priv->IC_Cut > VERSION_8190_BD) 889 + if (priv->ic_cut > VERSION_8190_BD) 868 890 _rtl92e_set_tx_power_level(dev, 869 891 channel); 870 892 break; ··· 882 904 break; 883 905 case CmdID_RF_WriteReg: 884 906 for (eRFPath = 0; eRFPath < 885 - priv->NumTotalRFPath; eRFPath++) 907 + priv->num_total_rf_path; eRFPath++) 886 908 rtl92e_set_rf_reg(dev, 887 909 (enum rf90_radio_path)eRFPath, 888 910 CurrentCmd->Para1, bMask12Bits, ··· 907 929 u32 delay = 0; 908 930 909 931 while (!_rtl92e_phy_switch_channel_step(dev, channel, 910 - &priv->SwChnlStage, 911 - &priv->SwChnlStep, &delay)) { 932 + &priv->sw_chnl_stage, 933 + &priv->sw_chnl_step, &delay)) { 912 934 if (delay > 0) 913 935 msleep(delay); 914 936 if (!priv->up) ··· 932 954 netdev_err(dev, "%s(): Driver is not initialized\n", __func__); 933 955 return false; 934 956 } 935 - if (priv->SwChnlInProgress) 957 + if (priv->sw_chnl_in_progress) 936 958 return false; 937 959 938 960 ··· 965 987 break; 966 988 } 967 989 968 - priv->SwChnlInProgress = true; 990 + priv->sw_chnl_in_progress = true; 969 991 if (channel == 0) 970 992 channel = 1; 971 993 972 994 priv->chan = channel; 973 995 974 - priv->SwChnlStage = 0; 975 - priv->SwChnlStep = 0; 996 + priv->sw_chnl_stage = 0; 997 + priv->sw_chnl_step = 0; 976 998 977 999 if (priv->up) 978 1000 _rtl92e_phy_switch_channel_work_item(dev); 979 - priv->SwChnlInProgress = false; 1001 + priv->sw_chnl_in_progress = false; 980 1002 return true; 981 1003 } 982 1004 ··· 984 1006 { 985 1007 struct r8192_priv *priv = rtllib_priv(dev); 986 1008 987 - switch (priv->CurrentChannelBW) { 1009 + switch (priv->current_chnl_bw) { 988 1010 case HT_CHANNEL_WIDTH_20: 989 1011 priv->cck_present_attn = 990 - priv->CCKPresentAttentuation_20Mdefault + 991 - priv->CCKPresentAttentuation_difference; 1012 + priv->cck_present_attn_20m_def + 1013 + priv->cck_present_attn_diff; 992 1014 993 1015 if (priv->cck_present_attn > 994 - (CCKTxBBGainTableLength-1)) 1016 + (CCK_TX_BB_GAIN_TABLE_LEN - 1)) 995 1017 priv->cck_present_attn = 996 - CCKTxBBGainTableLength-1; 1018 + CCK_TX_BB_GAIN_TABLE_LEN - 1; 997 1019 if (priv->cck_present_attn < 0) 998 1020 priv->cck_present_attn = 0; 999 1021 ··· 1012 1034 1013 1035 case HT_CHANNEL_WIDTH_20_40: 1014 1036 priv->cck_present_attn = 1015 - priv->CCKPresentAttentuation_40Mdefault + 1016 - priv->CCKPresentAttentuation_difference; 1037 + priv->cck_present_attn_40m_def + 1038 + priv->cck_present_attn_diff; 1017 1039 1018 1040 if (priv->cck_present_attn > 1019 - (CCKTxBBGainTableLength - 1)) 1041 + (CCK_TX_BB_GAIN_TABLE_LEN - 1)) 1020 1042 priv->cck_present_attn = 1021 - CCKTxBBGainTableLength-1; 1043 + CCK_TX_BB_GAIN_TABLE_LEN - 1; 1022 1044 if (priv->cck_present_attn < 0) 1023 1045 priv->cck_present_attn = 0; 1024 1046 ··· 1048 1070 priv->bcck_in_ch14) 1049 1071 priv->bcck_in_ch14 = false; 1050 1072 1051 - switch (priv->CurrentChannelBW) { 1073 + switch (priv->current_chnl_bw) { 1052 1074 case HT_CHANNEL_WIDTH_20: 1053 - if (priv->Record_CCK_20Mindex == 0) 1054 - priv->Record_CCK_20Mindex = 6; 1055 - priv->CCK_index = priv->Record_CCK_20Mindex; 1075 + if (priv->rec_cck_20m_idx == 0) 1076 + priv->rec_cck_20m_idx = 6; 1077 + priv->cck_index = priv->rec_cck_20m_idx; 1056 1078 break; 1057 1079 1058 1080 case HT_CHANNEL_WIDTH_20_40: 1059 - priv->CCK_index = priv->Record_CCK_40Mindex; 1081 + priv->cck_index = priv->rec_cck_40m_idx; 1060 1082 break; 1061 1083 } 1062 1084 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); ··· 1066 1088 { 1067 1089 struct r8192_priv *priv = rtllib_priv(dev); 1068 1090 1069 - if (priv->IC_Cut >= IC_VersionCut_D) 1091 + if (priv->ic_cut >= IC_VersionCut_D) 1070 1092 _rtl92e_cck_tx_power_track_bw_switch_tssi(dev); 1071 1093 else 1072 1094 _rtl92e_cck_tx_power_track_bw_switch_thermal(dev); ··· 1079 1101 u8 regBwOpMode; 1080 1102 1081 1103 if (priv->rf_chip == RF_PSEUDO_11N) { 1082 - priv->SetBWModeInProgress = false; 1104 + priv->set_bw_mode_in_progress = false; 1083 1105 return; 1084 1106 } 1085 1107 if (!priv->up) { ··· 1088 1110 } 1089 1111 regBwOpMode = rtl92e_readb(dev, BW_OPMODE); 1090 1112 1091 - switch (priv->CurrentChannelBW) { 1113 + switch (priv->current_chnl_bw) { 1092 1114 case HT_CHANNEL_WIDTH_20: 1093 1115 regBwOpMode |= BW_OPMODE_20MHZ; 1094 1116 rtl92e_writeb(dev, BW_OPMODE, regBwOpMode); ··· 1101 1123 1102 1124 default: 1103 1125 netdev_err(dev, "%s(): unknown Bandwidth: %#X\n", __func__, 1104 - priv->CurrentChannelBW); 1126 + priv->current_chnl_bw); 1105 1127 break; 1106 1128 } 1107 1129 1108 - switch (priv->CurrentChannelBW) { 1130 + switch (priv->current_chnl_bw) { 1109 1131 case HT_CHANNEL_WIDTH_20: 1110 1132 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bRFMOD, 0x0); 1111 1133 rtl92e_set_bb_reg(dev, rFPGA1_RFMOD, bRFMOD, 0x0); ··· 1134 1156 } 1135 1157 1136 1158 rtl92e_set_bb_reg(dev, rCCK0_System, bCCKSideBand, 1137 - (priv->nCur40MhzPrimeSC>>1)); 1159 + (priv->n_cur_40mhz_prime_sc>>1)); 1138 1160 rtl92e_set_bb_reg(dev, rOFDM1_LSTF, 0xC00, 1139 - priv->nCur40MhzPrimeSC); 1161 + priv->n_cur_40mhz_prime_sc); 1140 1162 1141 1163 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); 1142 1164 break; 1143 1165 default: 1144 1166 netdev_err(dev, "%s(): unknown Bandwidth: %#X\n", __func__, 1145 - priv->CurrentChannelBW); 1167 + priv->current_chnl_bw); 1146 1168 break; 1147 1169 1148 1170 } ··· 1152 1174 break; 1153 1175 1154 1176 case RF_8256: 1155 - rtl92e_set_bandwidth(dev, priv->CurrentChannelBW); 1177 + rtl92e_set_bandwidth(dev, priv->current_chnl_bw); 1156 1178 break; 1157 1179 1158 1180 case RF_8258: ··· 1168 1190 } 1169 1191 1170 1192 atomic_dec(&(priv->rtllib->atm_swbw)); 1171 - priv->SetBWModeInProgress = false; 1193 + priv->set_bw_mode_in_progress = false; 1172 1194 } 1173 1195 1174 1196 void rtl92e_set_bw_mode(struct net_device *dev, enum ht_channel_width bandwidth, ··· 1177 1199 struct r8192_priv *priv = rtllib_priv(dev); 1178 1200 1179 1201 1180 - if (priv->SetBWModeInProgress) 1202 + if (priv->set_bw_mode_in_progress) 1181 1203 return; 1182 1204 1183 1205 atomic_inc(&(priv->rtllib->atm_swbw)); 1184 - priv->SetBWModeInProgress = true; 1206 + priv->set_bw_mode_in_progress = true; 1185 1207 1186 - priv->CurrentChannelBW = bandwidth; 1208 + priv->current_chnl_bw = bandwidth; 1187 1209 1188 1210 if (Offset == HT_EXTCHNL_OFFSET_LOWER) 1189 - priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; 1211 + priv->n_cur_40mhz_prime_sc = HAL_PRIME_CHNL_OFFSET_UPPER; 1190 1212 else if (Offset == HT_EXTCHNL_OFFSET_UPPER) 1191 - priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; 1213 + priv->n_cur_40mhz_prime_sc = HAL_PRIME_CHNL_OFFSET_LOWER; 1192 1214 else 1193 - priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; 1215 + priv->n_cur_40mhz_prime_sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE; 1194 1216 1195 1217 _rtl92e_set_bw_mode_work_item(dev); 1196 1218 ··· 1273 1295 rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0); 1274 1296 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); 1275 1297 rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0); 1276 - rtl92e_writeb(dev, ANAPAR_FOR_8192PciE, 0x07); 1298 + rtl92e_writeb(dev, ANAPAR_FOR_8192PCIE, 0x07); 1277 1299 1278 1300 } 1279 1301 ··· 1287 1309 u8 i = 0, QueueID = 0; 1288 1310 struct rtl8192_tx_ring *ring = NULL; 1289 1311 1290 - if (priv->SetRFPowerStateInProgress) 1312 + if (priv->set_rf_pwr_state_in_progress) 1291 1313 return false; 1292 - priv->SetRFPowerStateInProgress = true; 1314 + priv->set_rf_pwr_state_in_progress = true; 1293 1315 1294 1316 switch (priv->rf_chip) { 1295 1317 case RF_8256: ··· 1309 1331 netdev_err(dev, 1310 1332 "%s(): Failed to initialize Adapter.\n", 1311 1333 __func__); 1312 - priv->SetRFPowerStateInProgress = false; 1334 + priv->set_rf_pwr_state_in_progress = false; 1313 1335 return false; 1314 1336 } 1315 1337 ··· 1416 1438 } 1417 1439 } 1418 1440 1419 - priv->SetRFPowerStateInProgress = false; 1441 + priv->set_rf_pwr_state_in_progress = false; 1420 1442 return bResult; 1421 1443 } 1422 1444

-2

drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h

··· 42 42 #define CCK_TXAGC 0x348 43 43 44 44 /* Mac block on/off control register */ 45 - #define MacBlkCtrl 0x403 46 - 47 45 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ 48 46 #define rFPGA0_TxInfo 0x804 49 47 #define rFPGA0_PSDFunction 0x808

+22 -64

drivers/staging/rtl8192e/rtl8192e/rtl_core.c

··· 692 692 priv->rtllib->ieee_up = 1; 693 693 694 694 priv->up_first_time = 0; 695 - priv->bfirst_init = true; 696 695 init_status = priv->ops->initialize_adapter(dev); 697 696 if (!init_status) { 698 697 netdev_err(dev, "%s(): Initialization failed!\n", __func__); 699 - priv->bfirst_init = false; 700 698 return -1; 701 699 } 702 700 703 701 RT_CLEAR_PS_LEVEL(psc, RT_RF_OFF_LEVL_HALT_NIC); 704 - priv->bfirst_init = false; 705 702 706 703 if (priv->polling_timer_on == 0) 707 704 rtl92e_check_rfctrl_gpio_timer(&priv->gpio_polling_timer); ··· 834 837 priv->blinked_ingpio = false; 835 838 priv->being_init_adapter = false; 836 839 priv->bdisable_nic = false; 837 - priv->bfirst_init = false; 838 840 priv->txringcount = 64; 839 841 priv->rxbuffersize = 9100; 840 842 priv->rxringcount = MAX_RX_COUNT; ··· 858 862 priv->cck_present_attn = 0; 859 863 priv->rfa_txpowertrackingindex = 0; 860 864 priv->rfc_txpowertrackingindex = 0; 861 - priv->CckPwEnl = 6; 865 + priv->cck_pwr_enl = 6; 862 866 priv->rst_progress = RESET_TYPE_NORESET; 863 867 priv->force_reset = false; 864 868 memset(priv->rtllib->swcamtable, 0, sizeof(struct sw_cam_table) * 32); ··· 868 872 priv->rtllib->rf_off_reason = 0; 869 873 priv->rf_change_in_progress = false; 870 874 priv->hw_rf_off_action = 0; 871 - priv->SetRFPowerStateInProgress = false; 875 + priv->set_rf_pwr_state_in_progress = false; 872 876 priv->rtllib->pwr_save_ctrl.bLeisurePs = true; 873 877 priv->rtllib->LPSDelayCnt = 0; 874 878 priv->rtllib->sta_sleep = LPS_IS_WAKE; ··· 887 891 888 892 priv->card_type = PCI; 889 893 890 - priv->pFirmware = vzalloc(sizeof(struct rt_firmware)); 891 - if (!priv->pFirmware) 894 + priv->fw_info = vzalloc(sizeof(struct rt_firmware)); 895 + if (!priv->fw_info) 892 896 netdev_err(dev, 893 897 "rtl8192e: Unable to allocate space for firmware\n"); 894 898 ··· 948 952 return -1; 949 953 } 950 954 951 - if (priv->ChannelPlan >= COUNTRY_CODE_MAX) { 955 + if (priv->chnl_plan >= COUNTRY_CODE_MAX) { 952 956 netdev_info(dev, 953 957 "rtl819x_init:Error channel plan! Set to default.\n"); 954 - priv->ChannelPlan = COUNTRY_CODE_FCC; 958 + priv->chnl_plan = COUNTRY_CODE_FCC; 955 959 } 956 960 dot11d_init(priv->rtllib); 957 - dot11d_channel_map(priv->ChannelPlan, priv->rtllib); 961 + dot11d_channel_map(priv->chnl_plan, priv->rtllib); 958 962 for (i = 1; i <= 11; i++) 959 963 (priv->rtllib->active_channel_map)[i] = 1; 960 964 (priv->rtllib->active_channel_map)[12] = 2; ··· 1134 1138 goto END; 1135 1139 } 1136 1140 priv->rf_change_in_progress = true; 1137 - priv->bResetInProgress = true; 1141 + priv->reset_in_progress = true; 1138 1142 spin_unlock_irqrestore(&priv->rf_ps_lock, flag); 1139 1143 1140 1144 RESET_START: ··· 1225 1229 END: 1226 1230 priv->rst_progress = RESET_TYPE_NORESET; 1227 1231 priv->reset_count++; 1228 - priv->bResetInProgress = false; 1232 + priv->reset_in_progress = false; 1229 1233 1230 1234 rtl92e_writeb(dev, UFWP, 1); 1231 1235 } ··· 1393 1397 if ((priv->force_reset || ResetType == RESET_TYPE_SILENT)) 1394 1398 _rtl92e_if_silent_reset(dev); 1395 1399 priv->force_reset = false; 1396 - priv->bResetInProgress = false; 1400 + priv->reset_in_progress = false; 1397 1401 } 1398 1402 1399 1403 static void _rtl92e_watchdog_timer_cb(struct timer_list *t) ··· 1482 1486 u8 queue_index = tcb_desc->queue_index; 1483 1487 1484 1488 if ((priv->rtllib->rf_power_state == rf_off) || !priv->up || 1485 - priv->bResetInProgress) { 1489 + priv->reset_in_progress) { 1486 1490 kfree_skb(skb); 1487 1491 return; 1488 1492 } ··· 1515 1519 1516 1520 if (queue_index != TXCMD_QUEUE) { 1517 1521 if ((priv->rtllib->rf_power_state == rf_off) || 1518 - !priv->up || priv->bResetInProgress) { 1522 + !priv->up || priv->reset_in_progress) { 1519 1523 kfree_skb(skb); 1520 1524 return 0; 1521 1525 } ··· 1616 1620 type = WLAN_FC_GET_TYPE(fc); 1617 1621 pda_addr = header->addr1; 1618 1622 1619 - if (is_broadcast_ether_addr(pda_addr)) 1620 - priv->stats.txbytesbroadcast += skb->len - fwinfo_size; 1621 - else if (is_multicast_ether_addr(pda_addr)) 1622 - priv->stats.txbytesmulticast += skb->len - fwinfo_size; 1623 - else 1623 + if (!is_broadcast_ether_addr(pda_addr) && !is_multicast_ether_addr(pda_addr)) 1624 1624 priv->stats.txbytesunicast += skb->len - fwinfo_size; 1625 1625 1626 1626 spin_lock_irqsave(&priv->irq_th_lock, flags); ··· 1646 1654 spin_unlock_irqrestore(&priv->irq_th_lock, flags); 1647 1655 netif_trans_update(dev); 1648 1656 1649 - rtl92e_writew(dev, TPPoll, 0x01 << tcb_desc->queue_index); 1657 + rtl92e_writew(dev, TP_POLL, 0x01 << tcb_desc->queue_index); 1650 1658 return 0; 1651 1659 } 1652 1660 ··· 1799 1807 struct r8192_priv *priv = rtllib_priv(dev); 1800 1808 1801 1809 if (stats->bIsAMPDU && !stats->bFirstMPDU) 1802 - stats->mac_time = priv->LastRxDescTSF; 1810 + stats->mac_time = priv->last_rx_desc_tsf; 1803 1811 else 1804 - priv->LastRxDescTSF = stats->mac_time; 1812 + priv->last_rx_desc_tsf = stats->mac_time; 1805 1813 } 1806 1814 1807 1815 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index) ··· 1906 1914 skb_put(skb, pdesc->Length); 1907 1915 skb_reserve(skb, stats.RxDrvInfoSize + 1908 1916 stats.RxBufShift); 1909 - skb_trim(skb, skb->len - 4/*sCrcLng*/); 1917 + skb_trim(skb, skb->len - S_CRC_LEN); 1910 1918 rtllib_hdr = (struct rtllib_hdr_1addr *)skb->data; 1911 1919 if (!is_multicast_ether_addr(rtllib_hdr->addr1)) { 1912 1920 /* unicast packet */ ··· 1922 1930 priv->rtllib->LedControlHandler(dev, 1923 1931 LED_CTL_RX); 1924 1932 1925 - if (stats.bCRC) { 1926 - if (type != RTLLIB_FTYPE_MGMT) 1927 - priv->stats.rxdatacrcerr++; 1928 - else 1929 - priv->stats.rxmgmtcrcerr++; 1930 - } 1931 - 1932 1933 skb_len = skb->len; 1933 1934 1934 1935 if (!rtllib_rx(priv->rtllib, skb, &stats)) { 1935 1936 dev_kfree_skb_any(skb); 1936 1937 } else { 1937 - priv->stats.rxok++; 1938 1938 if (unicast_packet) 1939 1939 priv->stats.rxbytesunicast += skb_len; 1940 1940 } ··· 2119 2135 spin_lock_irqsave(&priv->irq_th_lock, flags); 2120 2136 2121 2137 priv->ops->interrupt_recognized(dev, &inta, &intb); 2122 - priv->stats.shints++; 2123 2138 2124 2139 if (!inta) { 2125 2140 spin_unlock_irqrestore(&priv->irq_th_lock, flags); ··· 2130 2147 goto done; 2131 2148 } 2132 2149 2133 - priv->stats.ints++; 2134 - 2135 2150 if (!netif_running(dev)) { 2136 2151 spin_unlock_irqrestore(&priv->irq_th_lock, flags); 2137 2152 goto done; 2138 2153 } 2139 2154 2140 - if (inta & IMR_TBDOK) 2141 - priv->stats.txbeaconokint++; 2142 - 2143 - if (inta & IMR_TBDER) 2144 - priv->stats.txbeaconerr++; 2145 - 2146 2155 if (inta & IMR_MGNTDOK) { 2147 - priv->stats.txmanageokint++; 2148 2156 _rtl92e_tx_isr(dev, MGNT_QUEUE); 2149 2157 spin_unlock_irqrestore(&priv->irq_th_lock, flags); 2150 2158 if (priv->rtllib->ack_tx_to_ieee) { ··· 2147 2173 spin_lock_irqsave(&priv->irq_th_lock, flags); 2148 2174 } 2149 2175 2150 - if (inta & IMR_COMDOK) { 2151 - priv->stats.txcmdpktokint++; 2176 + if (inta & IMR_COMDOK) 2152 2177 _rtl92e_tx_isr(dev, TXCMD_QUEUE); 2153 - } 2154 2178 2155 2179 if (inta & IMR_HIGHDOK) 2156 2180 _rtl92e_tx_isr(dev, HIGH_QUEUE); 2157 2181 2158 - if (inta & IMR_ROK) { 2159 - priv->stats.rxint++; 2182 + if (inta & IMR_ROK) 2160 2183 tasklet_schedule(&priv->irq_rx_tasklet); 2161 - } 2162 2184 2163 2185 if (inta & IMR_BcnInt) 2164 2186 tasklet_schedule(&priv->irq_prepare_beacon_tasklet); 2165 2187 2166 2188 if (inta & IMR_RDU) { 2167 - priv->stats.rxrdu++; 2168 2189 rtl92e_writel(dev, INTA_MASK, 2169 2190 rtl92e_readl(dev, INTA_MASK) & ~IMR_RDU); 2170 2191 tasklet_schedule(&priv->irq_rx_tasklet); 2171 2192 } 2172 2193 2173 - if (inta & IMR_RXFOVW) { 2174 - priv->stats.rxoverflow++; 2194 + if (inta & IMR_RXFOVW) 2175 2195 tasklet_schedule(&priv->irq_rx_tasklet); 2176 - } 2177 - 2178 - if (inta & IMR_TXFOVW) 2179 - priv->stats.txoverflow++; 2180 2196 2181 2197 if (inta & IMR_BKDOK) { 2182 - priv->stats.txbkokint++; 2183 2198 priv->rtllib->link_detect_info.NumTxOkInPeriod++; 2184 2199 _rtl92e_tx_isr(dev, BK_QUEUE); 2185 2200 } 2186 2201 2187 2202 if (inta & IMR_BEDOK) { 2188 - priv->stats.txbeokint++; 2189 2203 priv->rtllib->link_detect_info.NumTxOkInPeriod++; 2190 2204 _rtl92e_tx_isr(dev, BE_QUEUE); 2191 2205 } 2192 2206 2193 2207 if (inta & IMR_VIDOK) { 2194 - priv->stats.txviokint++; 2195 2208 priv->rtllib->link_detect_info.NumTxOkInPeriod++; 2196 2209 _rtl92e_tx_isr(dev, VI_QUEUE); 2197 2210 } 2198 2211 2199 2212 if (inta & IMR_VODOK) { 2200 - priv->stats.txvookint++; 2201 2213 priv->rtllib->link_detect_info.NumTxOkInPeriod++; 2202 2214 _rtl92e_tx_isr(dev, VO_QUEUE); 2203 2215 } ··· 2346 2386 priv->polling_timer_on = 0; 2347 2387 _rtl92e_down(dev, true); 2348 2388 rtl92e_dm_deinit(dev); 2349 - vfree(priv->pFirmware); 2350 - priv->pFirmware = NULL; 2389 + vfree(priv->fw_info); 2390 + priv->fw_info = NULL; 2351 2391 _rtl92e_free_rx_ring(dev); 2352 2392 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) 2353 2393 _rtl92e_free_tx_ring(dev, i); ··· 2383 2423 return false; 2384 2424 } 2385 2425 2386 - priv->bfirst_init = true; 2387 2426 init_status = priv->ops->initialize_adapter(dev); 2388 2427 if (!init_status) { 2389 2428 netdev_warn(dev, "%s(): Initialization failed!\n", __func__); ··· 2390 2431 return false; 2391 2432 } 2392 2433 RT_CLEAR_PS_LEVEL(psc, RT_RF_OFF_LEVL_HALT_NIC); 2393 - priv->bfirst_init = false; 2394 2434 2395 2435 rtl92e_irq_enable(dev); 2396 2436 priv->bdisable_nic = false;

+66 -140

drivers/staging/rtl8192e/rtl8192e/rtl_core.h

··· 90 90 91 91 #define PHY_RSSI_SLID_WIN_MAX 100 92 92 93 - #define TxBBGainTableLength 37 94 - #define CCKTxBBGainTableLength 23 93 + #define TX_BB_GAIN_TABLE_LEN 37 94 + #define CCK_TX_BB_GAIN_TABLE_LEN 23 95 95 96 96 #define CHANNEL_PLAN_LEN 10 97 - #define sCrcLng 4 97 + #define S_CRC_LEN 4 98 98 99 99 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4 100 100 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8 ··· 145 145 146 146 enum rt_customer_id { 147 147 RT_CID_DEFAULT = 0, 148 - RT_CID_8187_ALPHA0 = 1, 149 - RT_CID_8187_SERCOMM_PS = 2, 150 - RT_CID_8187_HW_LED = 3, 151 - RT_CID_8187_NETGEAR = 4, 152 - RT_CID_WHQL = 5, 153 148 RT_CID_819x_CAMEO = 6, 154 149 RT_CID_819x_RUNTOP = 7, 155 - RT_CID_819x_Senao = 8, 156 150 RT_CID_TOSHIBA = 9, 157 - RT_CID_819x_Netcore = 10, 151 + RT_CID_819X_NETCORE = 10, 158 152 RT_CID_Nettronix = 11, 159 153 RT_CID_DLINK = 12, 160 154 RT_CID_PRONET = 13, 161 - RT_CID_COREGA = 14, 162 - RT_CID_819x_ALPHA = 15, 163 - RT_CID_819x_Sitecom = 16, 164 - RT_CID_CCX = 17, 165 - RT_CID_819x_Lenovo = 18, 166 - RT_CID_819x_QMI = 19, 167 - RT_CID_819x_Edimax_Belkin = 20, 168 - RT_CID_819x_Sercomm_Belkin = 21, 169 - RT_CID_819x_CAMEO1 = 22, 170 - RT_CID_819x_MSI = 23, 171 - RT_CID_819x_Acer = 24, 172 - RT_CID_819x_HP = 27, 173 - RT_CID_819x_CLEVO = 28, 174 - RT_CID_819x_Arcadyan_Belkin = 29, 175 - RT_CID_819x_SAMSUNG = 30, 176 - RT_CID_819x_WNC_COREGA = 31, 177 155 }; 178 156 179 157 enum reset_type { ··· 161 183 }; 162 184 163 185 struct rt_stats { 164 - unsigned long rxrdu; 165 - unsigned long rxok; 166 - unsigned long rxdatacrcerr; 167 - unsigned long rxmgmtcrcerr; 168 - unsigned long rxcrcerrmin; 169 - unsigned long rxcrcerrmid; 170 - unsigned long rxcrcerrmax; 171 186 unsigned long received_rate_histogram[4][32]; 172 - unsigned long received_preamble_GI[2][32]; 173 - unsigned long numpacket_matchbssid; 174 - unsigned long numpacket_toself; 175 - unsigned long num_process_phyinfo; 176 - unsigned long numqry_phystatus; 177 - unsigned long numqry_phystatusCCK; 178 - unsigned long numqry_phystatusHT; 179 - unsigned long received_bwtype[5]; 180 - unsigned long rxoverflow; 181 - unsigned long rxint; 182 - unsigned long ints; 183 - unsigned long shints; 184 - unsigned long txoverflow; 185 - unsigned long txbeokint; 186 - unsigned long txbkokint; 187 - unsigned long txviokint; 188 - unsigned long txvookint; 189 - unsigned long txbeaconokint; 190 - unsigned long txbeaconerr; 191 - unsigned long txmanageokint; 192 - unsigned long txcmdpktokint; 193 - unsigned long txbytesmulticast; 194 - unsigned long txbytesbroadcast; 195 187 unsigned long txbytesunicast; 196 188 unsigned long rxbytesunicast; 197 189 unsigned long txretrycount; ··· 171 223 unsigned long slide_rssi_total; 172 224 unsigned long slide_evm_total; 173 225 long signal_strength; 174 - long signal_quality; 175 226 long last_signal_strength_inpercent; 176 227 long recv_signal_power; 177 228 u8 rx_rssi_percentage[4]; 178 229 u8 rx_evm_percentage[2]; 179 - long rxSNRdB[4]; 180 - u32 Slide_Beacon_pwdb[100]; 181 - u32 Slide_Beacon_Total; 230 + u32 slide_beacon_pwdb[100]; 231 + u32 slide_beacon_total; 182 232 u32 CurrentShowTxate; 183 233 }; 184 234 ··· 202 256 unsigned int entries; 203 257 struct sk_buff_head queue; 204 258 }; 205 - 206 - 207 259 208 260 struct rtl819x_ops { 209 261 enum nic_t nic_type; ··· 242 298 struct pci_dev *pdev; 243 299 struct pci_dev *bridge_pdev; 244 300 245 - bool bfirst_init; 246 301 bool bfirst_after_down; 247 302 bool being_init_adapter; 248 303 ··· 260 317 261 318 struct work_struct reset_wq; 262 319 263 - enum rt_customer_id CustomerID; 264 - 320 + enum rt_customer_id customer_id; 265 321 266 322 enum rt_rf_type_819xu rf_chip; 267 - enum ht_channel_width CurrentChannelBW; 268 - struct bb_reg_definition PHYRegDef[4]; 323 + enum ht_channel_width current_chnl_bw; 324 + struct bb_reg_definition phy_reg_def[4]; 269 325 struct rate_adaptive rate_adaptive; 270 326 271 - struct rt_firmware *pFirmware; 272 - enum rtl819x_loopback LoopbackMode; 327 + struct rt_firmware *fw_info; 328 + enum rtl819x_loopback loopback_mode; 273 329 274 330 struct timer_list watch_dog_timer; 275 331 struct timer_list fsync_timer; ··· 302 360 int rxringcount; 303 361 u16 rxbuffersize; 304 362 305 - u64 LastRxDescTSF; 363 + u64 last_rx_desc_tsf; 306 364 307 - u32 ReceiveConfig; 365 + u32 receive_config; 308 366 u8 retry_data; 309 367 u8 retry_rts; 310 368 u16 rts; ··· 313 371 int txringcount; 314 372 atomic_t tx_pending[0x10]; 315 373 316 - u16 ShortRetryLimit; 317 - u16 LongRetryLimit; 374 + u16 short_retry_limit; 375 + u16 long_retry_limit; 318 376 319 377 bool hw_radio_off; 320 378 bool blinked_ingpio; ··· 338 396 339 397 u32 irq_mask[2]; 340 398 341 - u8 Rf_Mode; 399 + u8 rf_mode; 342 400 enum nic_t card_8192; 343 401 u8 card_8192_version; 344 402 345 403 u8 rf_type; 346 - u8 IC_Cut; 404 + u8 ic_cut; 347 405 char nick[IW_ESSID_MAX_SIZE + 1]; 348 406 u8 check_roaming_cnt; 349 407 350 - u32 SilentResetRxSlotIndex; 351 - u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM]; 408 + u32 silent_reset_rx_slot_index; 409 + u32 silent_reset_rx_stuck_event[MAX_SILENT_RESET_RX_SLOT_NUM]; 352 410 353 411 u16 basic_rate; 354 412 u8 short_preamble; 355 413 u8 dot11_current_preamble_mode; 356 414 u8 slot_time; 357 - u16 SifsTime; 358 415 359 - bool AutoloadFailFlag; 416 + bool autoload_fail_flag; 360 417 361 418 short epromtype; 362 419 u16 eeprom_vid; 363 420 u16 eeprom_did; 364 - u8 eeprom_CustomerID; 365 - u16 eeprom_ChannelPlan; 421 + u8 eeprom_customer_id; 422 + u16 eeprom_chnl_plan; 366 423 367 - u8 EEPROMTxPowerLevelCCK[14]; 368 - u8 EEPROMTxPowerLevelOFDM24G[14]; 369 - u8 EEPROMRfACCKChnl1TxPwLevel[3]; 370 - u8 EEPROMRfAOfdmChnlTxPwLevel[3]; 371 - u8 EEPROMRfCCCKChnl1TxPwLevel[3]; 372 - u8 EEPROMRfCOfdmChnlTxPwLevel[3]; 373 - u16 EEPROMAntPwDiff; 374 - u8 EEPROMThermalMeter; 375 - u8 EEPROMCrystalCap; 424 + u8 eeprom_tx_pwr_level_cck[14]; 425 + u8 eeprom_tx_pwr_level_ofdm24g[14]; 426 + u16 eeprom_ant_pwr_diff; 427 + u8 eeprom_thermal_meter; 428 + u8 eeprom_crystal_cap; 376 429 377 - u8 EEPROMLegacyHTTxPowerDiff; 430 + u8 eeprom_legacy_ht_tx_pwr_diff; 378 431 379 - u8 CrystalCap; 380 - u8 ThermalMeter[2]; 432 + u8 crystal_cap; 433 + u8 thermal_meter[2]; 381 434 382 - u8 SwChnlInProgress; 383 - u8 SwChnlStage; 384 - u8 SwChnlStep; 385 - u8 SetBWModeInProgress; 435 + u8 sw_chnl_in_progress; 436 + u8 sw_chnl_stage; 437 + u8 sw_chnl_step; 438 + u8 set_bw_mode_in_progress; 386 439 387 - u8 nCur40MhzPrimeSC; 440 + u8 n_cur_40mhz_prime_sc; 388 441 389 - u32 RfReg0Value[4]; 390 - u8 NumTotalRFPath; 442 + u32 rf_reg_0value[4]; 443 + u8 num_total_rf_path; 391 444 bool brfpath_rxenable[4]; 392 445 393 - bool bTXPowerDataReadFromEEPORM; 446 + bool tx_pwr_data_read_from_eeprom; 394 447 395 448 u16 reg_chnl_plan; 396 - u16 ChannelPlan; 449 + u16 chnl_plan; 397 450 u8 hw_rf_off_action; 398 451 399 452 bool rf_change_in_progress; 400 - bool SetRFPowerStateInProgress; 453 + bool set_rf_pwr_state_in_progress; 401 454 bool bdisable_nic; 402 455 403 - u8 DM_Type; 404 - 405 - u8 CckPwEnl; 406 - u16 TSSI_13dBm; 407 - u32 Pwr_Track; 408 - u8 CCKPresentAttentuation_20Mdefault; 409 - u8 CCKPresentAttentuation_40Mdefault; 410 - s8 CCKPresentAttentuation_difference; 456 + u8 cck_pwr_enl; 457 + u16 tssi_13dBm; 458 + u32 pwr_track; 459 + u8 cck_present_attn_20m_def; 460 + u8 cck_present_attn_40m_def; 461 + s8 cck_present_attn_diff; 411 462 s8 cck_present_attn; 412 463 long undecorated_smoothed_pwdb; 413 464 414 - u32 MCSTxPowerLevelOriginalOffset[6]; 415 - u8 TxPowerLevelCCK[14]; 416 - u8 TxPowerLevelCCK_A[14]; 417 - u8 TxPowerLevelCCK_C[14]; 418 - u8 TxPowerLevelOFDM24G[14]; 419 - u8 TxPowerLevelOFDM24G_A[14]; 420 - u8 TxPowerLevelOFDM24G_C[14]; 421 - u8 LegacyHTTxPowerDiff; 422 - s8 RF_C_TxPwDiff; 423 - u8 AntennaTxPwDiff[3]; 465 + u32 mcs_tx_pwr_level_org_offset[6]; 466 + u8 tx_pwr_level_cck[14]; 467 + u8 tx_pwr_level_ofdm_24g[14]; 468 + u8 legacy_ht_tx_pwr_diff; 469 + u8 antenna_tx_pwr_diff[3]; 424 470 425 - bool bDynamicTxHighPower; 426 - bool bDynamicTxLowPower; 427 - bool bLastDTPFlag_High; 428 - bool bLastDTPFlag_Low; 471 + bool dynamic_tx_high_pwr; 472 + bool dynamic_tx_low_pwr; 473 + bool last_dtp_flag_high; 474 + bool last_dtp_flag_low; 429 475 430 476 u8 rfa_txpowertrackingindex; 431 477 u8 rfa_txpowertrackingindex_real; ··· 424 494 bool bcck_in_ch14; 425 495 426 496 u8 txpower_count; 427 - bool btxpower_trackingInit; 497 + bool tx_pwr_tracking_init; 428 498 429 - u8 OFDM_index[2]; 430 - u8 CCK_index; 499 + u8 ofdm_index[2]; 500 + u8 cck_index; 431 501 432 - u8 Record_CCK_20Mindex; 433 - u8 Record_CCK_40Mindex; 502 + u8 rec_cck_20m_idx; 503 + u8 rec_cck_40m_idx; 434 504 435 505 struct init_gain initgain_backup; 436 - u8 DefaultInitialGain[4]; 506 + u8 def_initial_gain[4]; 437 507 bool bis_any_nonbepkts; 438 508 bool bcurrent_turbo_EDCA; 439 509 bool bis_cur_rdlstate; 440 510 441 511 bool bfsync_processing; 442 512 u32 rate_record; 443 - u32 rateCountDiffRecord; 444 - u32 ContinueDiffCount; 513 + u32 rate_count_diff_rec; 514 + u32 continue_diff_count; 445 515 bool bswitch_fsync; 446 516 u8 framesync; 447 - u32 framesyncC34; 448 - u8 framesyncMonitor; 517 + u8 frame_sync_monitor; 449 518 450 519 u32 reset_count; 451 520 452 521 enum reset_type rst_progress; 453 - u16 TxCounter; 522 + u16 tx_counter; 454 523 u16 rx_ctr; 455 - bool bResetInProgress; 524 + bool reset_in_progress; 456 525 bool force_reset; 457 526 bool force_lps; 458 527 459 528 bool chan_forced; 460 - 461 - u8 PwrDomainProtect; 462 - u8 H2CTxCmdSeq; 463 529 }; 464 530 465 531 extern const struct ethtool_ops rtl819x_ethtool_ops;

+170 -172

drivers/staging/rtl8192e/rtl8192e/rtl_dm.c

··· 46 46 0x5e4332 47 47 }; 48 48 49 - const u32 dm_tx_bb_gain[TxBBGainTableLength] = { 49 + const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN] = { 50 50 0x7f8001fe, /* 12 dB */ 51 51 0x788001e2, /* 11 dB */ 52 52 0x71c001c7, ··· 86 86 0x10000040, /* -24 dB */ 87 87 }; 88 88 89 - const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8] = { 89 + const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8] = { 90 90 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, 91 91 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, 92 92 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, ··· 112 112 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01} 113 113 }; 114 114 115 - const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8] = { 115 + const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8] = { 116 116 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, 117 117 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, 118 118 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, ··· 144 144 /*------------------------Define global variable-----------------------------*/ 145 145 struct dig_t dm_digtable; 146 146 147 - struct drx_path_sel DM_RxPathSelTable; 147 + struct drx_path_sel dm_rx_path_sel_table; 148 148 /*------------------------Define global variable-----------------------------*/ 149 149 150 150 ··· 202 202 void rtl92e_dm_init(struct net_device *dev) 203 203 { 204 204 struct r8192_priv *priv = rtllib_priv(dev); 205 - 206 - priv->DM_Type = DM_Type_ByDriver; 207 205 208 206 priv->undecorated_smoothed_pwdb = -1; 209 207 ··· 282 284 struct rate_adaptive *pra = &priv->rate_adaptive; 283 285 284 286 pra->ratr_state = DM_RATR_STA_MAX; 285 - pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High; 286 - pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5; 287 - pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5; 287 + pra->high2low_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH; 288 + pra->low2high_rssi_thresh_for_ra20M = RATE_ADAPTIVE_TH_LOW_20M + 5; 289 + pra->low2high_rssi_thresh_for_ra40M = RATE_ADAPTIVE_TH_LOW_40M + 5; 288 290 289 - pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5; 290 - pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M; 291 - pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M; 291 + pra->high_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH + 5; 292 + pra->low_rssi_thresh_for_ra20M = RATE_ADAPTIVE_TH_LOW_20M; 293 + pra->low_rssi_thresh_for_ra40M = RATE_ADAPTIVE_TH_LOW_40M; 292 294 293 - if (priv->CustomerID == RT_CID_819x_Netcore) 295 + if (priv->customer_id == RT_CID_819X_NETCORE) 294 296 pra->ping_rssi_enable = 1; 295 297 else 296 298 pra->ping_rssi_enable = 0; ··· 351 353 (pra->middle_rssi_threshold_ratr & (~BIT31)) | 352 354 ((bshort_gi_enabled) ? BIT31 : 0); 353 355 354 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) { 356 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) { 355 357 pra->low_rssi_threshold_ratr = 356 358 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | 357 359 ((bshort_gi_enabled) ? BIT31 : 0); ··· 366 368 367 369 if (pra->ratr_state == DM_RATR_STA_HIGH) { 368 370 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra; 369 - LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ? 371 + LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? 370 372 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M); 371 373 } else if (pra->ratr_state == DM_RATR_STA_LOW) { 372 374 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra; 373 - LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ? 375 + LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? 374 376 (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M); 375 377 } else { 376 378 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra; 377 - LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ? 379 + LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? 378 380 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M); 379 381 } 380 382 ··· 441 443 { 442 444 struct r8192_priv *priv = rtllib_priv(dev); 443 445 444 - if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 || 445 - !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) 446 + if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20 || 447 + !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) 446 448 return; 447 449 if (!priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz) { 448 450 if (priv->undecorated_smoothed_pwdb <= ··· 455 457 } 456 458 } 457 459 458 - static u32 OFDMSwingTable[OFDM_Table_Length] = { 460 + static u32 OFDMSwingTable[OFDM_TABLE_LEN] = { 459 461 0x7f8001fe, 460 462 0x71c001c7, 461 463 0x65400195, ··· 477 479 0x10000040 478 480 }; 479 481 480 - static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = { 482 + static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_LEN][8] = { 481 483 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, 482 484 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, 483 485 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, ··· 492 494 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01} 493 495 }; 494 496 495 - static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = { 497 + static u8 CCKSwingTable_Ch14[CCK_TABLE_LEN][8] = { 496 498 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, 497 499 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, 498 500 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, ··· 568 570 struct r8192_priv *p = rtllib_priv(dev); 569 571 570 572 if (RF_Type == RF_2T4R) { 571 - if ((p->rfa_txpowertrackingindex < TxBBGainTableLength - 1) && 572 - (p->rfc_txpowertrackingindex < TxBBGainTableLength - 1)) { 573 + if ((p->rfa_txpowertrackingindex < TX_BB_GAIN_TABLE_LEN - 1) && 574 + (p->rfc_txpowertrackingindex < TX_BB_GAIN_TABLE_LEN - 1)) { 573 575 p->rfa_txpowertrackingindex++; 574 576 p->rfa_txpowertrackingindex_real++; 575 577 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, ··· 583 585 } else { 584 586 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, 585 587 bMaskDWord, 586 - dm_tx_bb_gain[TxBBGainTableLength - 1]); 588 + dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN - 1]); 587 589 rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance, 588 590 bMaskDWord, 589 - dm_tx_bb_gain[TxBBGainTableLength - 1]); 591 + dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN - 1]); 590 592 } 591 593 } else { 592 - if (p->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) { 594 + if (p->rfa_txpowertrackingindex < (TX_BB_GAIN_TABLE_LEN - 1)) { 593 595 p->rfa_txpowertrackingindex++; 594 596 p->rfa_txpowertrackingindex_real++; 595 597 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, ··· 598 600 } else { 599 601 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, 600 602 bMaskDWord, 601 - dm_tx_bb_gain[TxBBGainTableLength - 1]); 603 + dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN - 1]); 602 604 } 603 605 } 604 606 } ··· 613 615 u8 RF_Type, tmp_report[5] = {0, 0, 0, 0, 0}; 614 616 u32 Value; 615 617 u8 Pwr_Flag; 616 - u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0; 618 + u16 Avg_TSSI_Meas, tssi_13dBm, Avg_TSSI_Meas_from_driver = 0; 617 619 u32 delta = 0; 618 620 619 621 rtl92e_writeb(dev, Pw_Track_Flag, 0); 620 622 rtl92e_writeb(dev, FW_Busy_Flag, 0); 621 623 priv->rtllib->bdynamic_txpower_enable = false; 622 624 623 - powerlevelOFDM24G = priv->Pwr_Track >> 24; 625 + powerlevelOFDM24G = priv->pwr_track >> 24; 624 626 RF_Type = priv->rf_type; 625 627 Value = (RF_Type<<8) | powerlevelOFDM24G; 626 628 ··· 638 640 if (Pwr_Flag == 0) { 639 641 mdelay(1); 640 642 641 - if (priv->bResetInProgress) { 643 + if (priv->reset_in_progress) { 642 644 rtl92e_writeb(dev, Pw_Track_Flag, 0); 643 645 rtl92e_writeb(dev, FW_Busy_Flag, 0); 644 646 return; ··· 686 688 Avg_TSSI_Meas_from_driver += tmp_report[k]; 687 689 688 690 Avg_TSSI_Meas_from_driver *= 100 / 5; 689 - TSSI_13dBm = priv->TSSI_13dBm; 691 + tssi_13dBm = priv->tssi_13dBm; 690 692 691 - if (Avg_TSSI_Meas_from_driver > TSSI_13dBm) 692 - delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm; 693 + if (Avg_TSSI_Meas_from_driver > tssi_13dBm) 694 + delta = Avg_TSSI_Meas_from_driver - tssi_13dBm; 693 695 else 694 - delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver; 696 + delta = tssi_13dBm - Avg_TSSI_Meas_from_driver; 695 697 696 698 if (delta <= E_FOR_TX_POWER_TRACK) { 697 699 priv->rtllib->bdynamic_txpower_enable = true; ··· 699 701 rtl92e_writeb(dev, FW_Busy_Flag, 0); 700 702 return; 701 703 } 702 - if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) 704 + if (Avg_TSSI_Meas_from_driver < tssi_13dBm - E_FOR_TX_POWER_TRACK) 703 705 _rtl92e_dm_tx_update_tssi_weak_signal(dev, 704 706 RF_Type); 705 707 else 706 708 _rtl92e_dm_tx_update_tssi_strong_signal(dev, RF_Type); 707 709 708 710 if (RF_Type == RF_2T4R) { 709 - priv->CCKPresentAttentuation_difference 711 + priv->cck_present_attn_diff 710 712 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default; 711 713 } else { 712 - priv->CCKPresentAttentuation_difference 714 + priv->cck_present_attn_diff 713 715 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default; 714 716 } 715 717 716 - if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) 718 + if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20) 717 719 priv->cck_present_attn = 718 - priv->CCKPresentAttentuation_20Mdefault + 719 - priv->CCKPresentAttentuation_difference; 720 + priv->cck_present_attn_20m_def + 721 + priv->cck_present_attn_diff; 720 722 else 721 723 priv->cck_present_attn = 722 - priv->CCKPresentAttentuation_40Mdefault + 723 - priv->CCKPresentAttentuation_difference; 724 + priv->cck_present_attn_40m_def + 725 + priv->cck_present_attn_diff; 724 726 725 - if (priv->cck_present_attn > (CCKTxBBGainTableLength-1)) 726 - priv->cck_present_attn = CCKTxBBGainTableLength-1; 727 + if (priv->cck_present_attn > (CCK_TX_BB_GAIN_TABLE_LEN - 1)) 728 + priv->cck_present_attn = CCK_TX_BB_GAIN_TABLE_LEN - 1; 727 729 if (priv->cck_present_attn < 0) 728 730 priv->cck_present_attn = 0; 729 731 730 732 if (priv->cck_present_attn > -1 && 731 - priv->cck_present_attn < CCKTxBBGainTableLength) { 733 + priv->cck_present_attn < CCK_TX_BB_GAIN_TABLE_LEN) { 732 734 if (priv->rtllib->current_network.channel == 14 && 733 735 !priv->bcck_in_ch14) { 734 736 priv->bcck_in_ch14 = true; ··· 740 742 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); 741 743 } 742 744 743 - if (priv->CCKPresentAttentuation_difference <= -12 || 744 - priv->CCKPresentAttentuation_difference >= 24) { 745 + if (priv->cck_present_attn_diff <= -12 || 746 + priv->cck_present_attn_diff >= 24) { 745 747 priv->rtllib->bdynamic_txpower_enable = true; 746 748 rtl92e_writeb(dev, Pw_Track_Flag, 0); 747 749 rtl92e_writeb(dev, FW_Busy_Flag, 0); ··· 768 770 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval; 769 771 int i = 0, CCKSwingNeedUpdate = 0; 770 772 771 - if (!priv->btxpower_trackingInit) { 773 + if (!priv->tx_pwr_tracking_init) { 772 774 tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance, 773 775 bMaskDWord); 774 - for (i = 0; i < OFDM_Table_Length; i++) { 776 + for (i = 0; i < OFDM_TABLE_LEN; i++) { 775 777 if (tmpRegA == OFDMSwingTable[i]) 776 - priv->OFDM_index[0] = i; 778 + priv->ofdm_index[0] = i; 777 779 } 778 780 779 781 TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, bMaskByte2); 780 - for (i = 0; i < CCK_Table_length; i++) { 782 + for (i = 0; i < CCK_TABLE_LEN; i++) { 781 783 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) { 782 - priv->CCK_index = i; 784 + priv->cck_index = i; 783 785 break; 784 786 } 785 787 } 786 - priv->btxpower_trackingInit = true; 788 + priv->tx_pwr_tracking_init = true; 787 789 return; 788 790 } 789 791 ··· 792 794 return; 793 795 if (tmpRegA >= 12) 794 796 tmpRegA = 12; 795 - priv->ThermalMeter[0] = ThermalMeterVal; 796 - priv->ThermalMeter[1] = ThermalMeterVal; 797 + priv->thermal_meter[0] = ThermalMeterVal; 798 + priv->thermal_meter[1] = ThermalMeterVal; 797 799 798 - if (priv->ThermalMeter[0] >= (u8)tmpRegA) { 799 - tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] - 800 + if (priv->thermal_meter[0] >= (u8)tmpRegA) { 801 + tmpOFDMindex = tmpCCK20Mindex = 6+(priv->thermal_meter[0] - 800 802 (u8)tmpRegA); 801 803 tmpCCK40Mindex = tmpCCK20Mindex - 6; 802 - if (tmpOFDMindex >= OFDM_Table_Length) 803 - tmpOFDMindex = OFDM_Table_Length-1; 804 - if (tmpCCK20Mindex >= CCK_Table_length) 805 - tmpCCK20Mindex = CCK_Table_length-1; 806 - if (tmpCCK40Mindex >= CCK_Table_length) 807 - tmpCCK40Mindex = CCK_Table_length-1; 804 + if (tmpOFDMindex >= OFDM_TABLE_LEN) 805 + tmpOFDMindex = OFDM_TABLE_LEN - 1; 806 + if (tmpCCK20Mindex >= CCK_TABLE_LEN) 807 + tmpCCK20Mindex = CCK_TABLE_LEN - 1; 808 + if (tmpCCK40Mindex >= CCK_TABLE_LEN) 809 + tmpCCK40Mindex = CCK_TABLE_LEN - 1; 808 810 } else { 809 - tmpval = (u8)tmpRegA - priv->ThermalMeter[0]; 811 + tmpval = (u8)tmpRegA - priv->thermal_meter[0]; 810 812 if (tmpval >= 6) { 811 813 tmpOFDMindex = 0; 812 814 tmpCCK20Mindex = 0; ··· 816 818 } 817 819 tmpCCK40Mindex = 0; 818 820 } 819 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 821 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 820 822 tmpCCKindex = tmpCCK40Mindex; 821 823 else 822 824 tmpCCKindex = tmpCCK20Mindex; 823 825 824 - priv->Record_CCK_20Mindex = tmpCCK20Mindex; 825 - priv->Record_CCK_40Mindex = tmpCCK40Mindex; 826 + priv->rec_cck_20m_idx = tmpCCK20Mindex; 827 + priv->rec_cck_40m_idx = tmpCCK40Mindex; 826 828 827 829 if (priv->rtllib->current_network.channel == 14 && 828 830 !priv->bcck_in_ch14) { ··· 834 836 CCKSwingNeedUpdate = 1; 835 837 } 836 838 837 - if (priv->CCK_index != tmpCCKindex) { 838 - priv->CCK_index = tmpCCKindex; 839 + if (priv->cck_index != tmpCCKindex) { 840 + priv->cck_index = tmpCCKindex; 839 841 CCKSwingNeedUpdate = 1; 840 842 } 841 843 842 844 if (CCKSwingNeedUpdate) 843 845 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); 844 - if (priv->OFDM_index[0] != tmpOFDMindex) { 845 - priv->OFDM_index[0] = tmpOFDMindex; 846 + if (priv->ofdm_index[0] != tmpOFDMindex) { 847 + priv->ofdm_index[0] = tmpOFDMindex; 846 848 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, 847 - OFDMSwingTable[priv->OFDM_index[0]]); 849 + OFDMSwingTable[priv->ofdm_index[0]]); 848 850 } 849 851 priv->txpower_count = 0; 850 852 } ··· 855 857 struct r8192_priv, txpower_tracking_wq); 856 858 struct net_device *dev = priv->rtllib->dev; 857 859 858 - if (priv->IC_Cut >= IC_VersionCut_D) 860 + if (priv->ic_cut >= IC_VersionCut_D) 859 861 _rtl92e_dm_tx_power_tracking_callback_tssi(dev); 860 862 else 861 863 _rtl92e_dm_tx_power_tracking_cb_thermal(dev); ··· 868 870 869 871 priv->btxpower_tracking = true; 870 872 priv->txpower_count = 0; 871 - priv->btxpower_trackingInit = false; 873 + priv->tx_pwr_tracking_init = false; 872 874 873 875 } 874 876 ··· 882 884 else 883 885 priv->btxpower_tracking = false; 884 886 priv->txpower_count = 0; 885 - priv->btxpower_trackingInit = false; 887 + priv->tx_pwr_tracking_init = false; 886 888 } 887 889 888 890 void rtl92e_dm_init_txpower_tracking(struct net_device *dev) 889 891 { 890 892 struct r8192_priv *priv = rtllib_priv(dev); 891 893 892 - if (priv->IC_Cut >= IC_VersionCut_D) 894 + if (priv->ic_cut >= IC_VersionCut_D) 893 895 _rtl92e_dm_initialize_tx_power_tracking_tssi(dev); 894 896 else 895 897 _rtl92e_dm_init_tx_power_tracking_thermal(dev); ··· 950 952 { 951 953 struct r8192_priv *priv = rtllib_priv(dev); 952 954 953 - if (priv->IC_Cut >= IC_VersionCut_D) 955 + if (priv->ic_cut >= IC_VersionCut_D) 954 956 _rtl92e_dm_check_tx_power_tracking_tssi(dev); 955 957 else 956 958 _rtl92e_dm_check_tx_power_tracking_thermal(dev); ··· 1003 1005 1004 1006 TempVal = 0; 1005 1007 if (!bInCH14) { 1006 - TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] + 1007 - (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1] << 8); 1008 + TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][0] + 1009 + (CCKSwingTable_Ch1_Ch13[priv->cck_index][1] << 8); 1008 1010 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); 1009 - TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] + 1010 - (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3] << 8) + 1011 - (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4] << 16)+ 1012 - (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5] << 24); 1011 + TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][2] + 1012 + (CCKSwingTable_Ch1_Ch13[priv->cck_index][3] << 8) + 1013 + (CCKSwingTable_Ch1_Ch13[priv->cck_index][4] << 16)+ 1014 + (CCKSwingTable_Ch1_Ch13[priv->cck_index][5] << 24); 1013 1015 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); 1014 - TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] + 1015 - (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7] << 8); 1016 + TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][6] + 1017 + (CCKSwingTable_Ch1_Ch13[priv->cck_index][7] << 8); 1016 1018 1017 1019 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); 1018 1020 } else { 1019 - TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] + 1020 - (CCKSwingTable_Ch14[priv->CCK_index][1] << 8); 1021 + TempVal = CCKSwingTable_Ch14[priv->cck_index][0] + 1022 + (CCKSwingTable_Ch14[priv->cck_index][1] << 8); 1021 1023 1022 1024 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); 1023 - TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] + 1024 - (CCKSwingTable_Ch14[priv->CCK_index][3] << 8) + 1025 - (CCKSwingTable_Ch14[priv->CCK_index][4] << 16)+ 1026 - (CCKSwingTable_Ch14[priv->CCK_index][5] << 24); 1025 + TempVal = CCKSwingTable_Ch14[priv->cck_index][2] + 1026 + (CCKSwingTable_Ch14[priv->cck_index][3] << 8) + 1027 + (CCKSwingTable_Ch14[priv->cck_index][4] << 16)+ 1028 + (CCKSwingTable_Ch14[priv->cck_index][5] << 24); 1027 1029 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); 1028 - TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] + 1029 - (CCKSwingTable_Ch14[priv->CCK_index][7]<<8); 1030 + TempVal = CCKSwingTable_Ch14[priv->cck_index][6] + 1031 + (CCKSwingTable_Ch14[priv->cck_index][7]<<8); 1030 1032 1031 1033 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); 1032 1034 } ··· 1036 1038 { 1037 1039 struct r8192_priv *priv = rtllib_priv(dev); 1038 1040 1039 - if (priv->IC_Cut >= IC_VersionCut_D) 1041 + if (priv->ic_cut >= IC_VersionCut_D) 1040 1042 _rtl92e_dm_cck_tx_power_adjust_tssi(dev, binch14); 1041 1043 else 1042 1044 _rtl92e_dm_cck_tx_power_adjust_thermal_meter(dev, binch14); ··· 1073 1075 ratr_value &= ~(RATE_ALL_OFDM_2SS); 1074 1076 rtl92e_writel(dev, RATR0, ratr_value); 1075 1077 rtl92e_writeb(dev, UFWP, 1); 1076 - if (priv->btxpower_trackingInit && priv->btxpower_tracking) 1078 + if (priv->tx_pwr_tracking_init && priv->btxpower_tracking) 1077 1079 _rtl92e_dm_tx_power_reset_recovery(dev); 1078 1080 1079 1081 _rtl92e_dm_bb_initialgain_restore(dev); ··· 1148 1150 dm_digtable.rssi_val = 50; 1149 1151 dm_digtable.backoff_val = DM_DIG_BACKOFF; 1150 1152 dm_digtable.rx_gain_range_max = DM_DIG_MAX; 1151 - if (priv->CustomerID == RT_CID_819x_Netcore) 1153 + if (priv->customer_id == RT_CID_819X_NETCORE) 1152 1154 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore; 1153 1155 else 1154 1156 dm_digtable.rx_gain_range_min = DM_DIG_MIN; ··· 1258 1260 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x17); 1259 1261 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x17); 1260 1262 1261 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1263 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1262 1264 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00); 1263 1265 else 1264 1266 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42); ··· 1295 1297 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x20); 1296 1298 } 1297 1299 1298 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1300 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1299 1301 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20); 1300 1302 else 1301 1303 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44); ··· 1326 1328 return; 1327 1329 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON; 1328 1330 1329 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1331 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1330 1332 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10); 1331 1333 else 1332 1334 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43); ··· 1340 1342 dm_digtable.rssi_high_power_lowthresh) && 1341 1343 (priv->undecorated_smoothed_pwdb >= 1342 1344 dm_digtable.rssi_high_thresh)) { 1343 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1345 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1344 1346 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20); 1345 1347 else 1346 1348 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44); ··· 1376 1378 dm_digtable.cur_ig_value = gain_range; 1377 1379 } else { 1378 1380 if (dm_digtable.cur_ig_value == 0) 1379 - dm_digtable.cur_ig_value = priv->DefaultInitialGain[0]; 1381 + dm_digtable.cur_ig_value = priv->def_initial_gain[0]; 1380 1382 else 1381 1383 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value; 1382 1384 } 1383 1385 } else { 1384 - dm_digtable.cur_ig_value = priv->DefaultInitialGain[0]; 1386 + dm_digtable.cur_ig_value = priv->def_initial_gain[0]; 1385 1387 dm_digtable.pre_ig_value = 0; 1386 1388 } 1387 1389 ··· 1451 1453 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) || 1452 1454 (initialized <= 3) || force_write) { 1453 1455 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) { 1454 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1456 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1455 1457 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00); 1456 1458 else 1457 1459 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42); 1458 1460 } else if (dm_digtable.curpd_thstate == 1459 1461 DIG_PD_AT_NORMAL_POWER) { 1460 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1462 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1461 1463 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20); 1462 1464 else 1463 1465 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44); 1464 1466 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) { 1465 - if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) 1467 + if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) 1466 1468 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10); 1467 1469 else 1468 1470 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43); ··· 1649 1651 struct rt_hi_throughput *ht_info = priv->rtllib->ht_info; 1650 1652 1651 1653 ht_info->bWAIotBroadcom = false; 1652 - ht_info->WAIotTH = WAIotTHVal; 1654 + ht_info->WAIotTH = WA_IOT_TH_VAL; 1653 1655 } 1654 1656 1655 1657 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data) ··· 1720 1722 else 1721 1723 priv->brfpath_rxenable[i] = false; 1722 1724 } 1723 - if (!DM_RxPathSelTable.Enable) 1725 + if (!dm_rx_path_sel_table.enable) 1724 1726 return; 1725 1727 1726 1728 _rtl92e_dm_rx_path_sel_byrssi(dev); ··· 1731 1733 u8 i; 1732 1734 struct r8192_priv *priv = rtllib_priv(dev); 1733 1735 1734 - DM_RxPathSelTable.Enable = 1; 1735 - DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low; 1736 - DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH; 1737 - if (priv->CustomerID == RT_CID_819x_Netcore) 1738 - DM_RxPathSelTable.cck_method = CCK_Rx_Version_2; 1736 + dm_rx_path_sel_table.enable = 1; 1737 + dm_rx_path_sel_table.ss_th_low = RX_PATH_SEL_SS_TH_LOW; 1738 + dm_rx_path_sel_table.diff_th = RX_PATH_SEL_DIFF_TH; 1739 + if (priv->customer_id == RT_CID_819X_NETCORE) 1740 + dm_rx_path_sel_table.cck_method = CCK_Rx_Version_2; 1739 1741 else 1740 - DM_RxPathSelTable.cck_method = CCK_Rx_Version_1; 1741 - DM_RxPathSelTable.disabledRF = 0; 1742 + dm_rx_path_sel_table.cck_method = CCK_Rx_Version_1; 1743 + dm_rx_path_sel_table.disabled_rf = 0; 1742 1744 for (i = 0; i < 4; i++) { 1743 - DM_RxPathSelTable.rf_rssi[i] = 50; 1744 - DM_RxPathSelTable.cck_pwdb_sta[i] = -64; 1745 - DM_RxPathSelTable.rf_enable_rssi_th[i] = 100; 1745 + dm_rx_path_sel_table.rf_rssi[i] = 50; 1746 + dm_rx_path_sel_table.cck_pwdb_sta[i] = -64; 1747 + dm_rx_path_sel_table.rf_enable_rssi_th[i] = 100; 1746 1748 } 1747 1749 } 1748 1750 ··· 1769 1771 return; 1770 1772 1771 1773 if (!cck_Rx_Path_initialized) { 1772 - DM_RxPathSelTable.cck_Rx_path = (rtl92e_readb(dev, 0xa07)&0xf); 1774 + dm_rx_path_sel_table.cck_rx_path = (rtl92e_readb(dev, 0xa07)&0xf); 1773 1775 cck_Rx_Path_initialized = 1; 1774 1776 } 1775 1777 1776 - DM_RxPathSelTable.disabledRF = 0xf; 1777 - DM_RxPathSelTable.disabledRF &= ~(rtl92e_readb(dev, 0xc04)); 1778 + dm_rx_path_sel_table.disabled_rf = 0xf; 1779 + dm_rx_path_sel_table.disabled_rf &= ~(rtl92e_readb(dev, 0xc04)); 1778 1780 1779 1781 if (priv->rtllib->mode == WIRELESS_MODE_B) 1780 - DM_RxPathSelTable.cck_method = CCK_Rx_Version_2; 1782 + dm_rx_path_sel_table.cck_method = CCK_Rx_Version_2; 1781 1783 1782 1784 for (i = 0; i < RF90_PATH_MAX; i++) { 1783 - DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i]; 1785 + dm_rx_path_sel_table.rf_rssi[i] = priv->stats.rx_rssi_percentage[i]; 1784 1786 1785 1787 if (priv->brfpath_rxenable[i]) { 1786 1788 rf_num++; 1787 - cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i]; 1789 + cur_rf_rssi = dm_rx_path_sel_table.rf_rssi[i]; 1788 1790 1789 1791 if (rf_num == 1) { 1790 1792 max_rssi_index = min_rssi_index = sec_rssi_index = i; ··· 1832 1834 } 1833 1835 1834 1836 rf_num = 0; 1835 - if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) { 1837 + if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_2) { 1836 1838 for (i = 0; i < RF90_PATH_MAX; i++) { 1837 1839 if (priv->brfpath_rxenable[i]) { 1838 1840 rf_num++; 1839 1841 cur_cck_pwdb = 1840 - DM_RxPathSelTable.cck_pwdb_sta[i]; 1842 + dm_rx_path_sel_table.cck_pwdb_sta[i]; 1841 1843 1842 1844 if (rf_num == 1) { 1843 1845 cck_rx_ver2_max_index = i; ··· 1894 1896 } 1895 1897 1896 1898 update_cck_rx_path = 0; 1897 - if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) { 1899 + if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_2) { 1898 1900 cck_default_Rx = cck_rx_ver2_max_index; 1899 1901 cck_optional_Rx = cck_rx_ver2_sec_index; 1900 1902 if (tmp_cck_max_pwdb != -64) 1901 1903 update_cck_rx_path = 1; 1902 1904 } 1903 1905 1904 - if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) { 1906 + if (tmp_min_rssi < dm_rx_path_sel_table.ss_th_low && disabled_rf_cnt < 2) { 1905 1907 if ((tmp_max_rssi - tmp_min_rssi) >= 1906 - DM_RxPathSelTable.diff_TH) { 1907 - DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] = 1908 + dm_rx_path_sel_table.diff_th) { 1909 + dm_rx_path_sel_table.rf_enable_rssi_th[min_rssi_index] = 1908 1910 tmp_max_rssi+5; 1909 1911 rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable, 1910 1912 0x1<<min_rssi_index, 0x0); ··· 1912 1914 0x1<<min_rssi_index, 0x0); 1913 1915 disabled_rf_cnt++; 1914 1916 } 1915 - if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) { 1917 + if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_1) { 1916 1918 cck_default_Rx = max_rssi_index; 1917 1919 cck_optional_Rx = sec_rssi_index; 1918 1920 if (tmp_max_rssi) ··· 1921 1923 } 1922 1924 1923 1925 if (update_cck_rx_path) { 1924 - DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) | 1926 + dm_rx_path_sel_table.cck_rx_path = (cck_default_Rx<<2) | 1925 1927 (cck_optional_Rx); 1926 1928 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000, 1927 - DM_RxPathSelTable.cck_Rx_path); 1929 + dm_rx_path_sel_table.cck_rx_path); 1928 1930 } 1929 1931 1930 - if (DM_RxPathSelTable.disabledRF) { 1932 + if (dm_rx_path_sel_table.disabled_rf) { 1931 1933 for (i = 0; i < 4; i++) { 1932 - if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) { 1934 + if ((dm_rx_path_sel_table.disabled_rf >> i) & 0x1) { 1933 1935 if (tmp_max_rssi >= 1934 - DM_RxPathSelTable.rf_enable_rssi_th[i]) { 1936 + dm_rx_path_sel_table.rf_enable_rssi_th[i]) { 1935 1937 rtl92e_set_bb_reg(dev, 1936 1938 rOFDM0_TRxPathEnable, 1937 1939 0x1 << i, 0x1); 1938 1940 rtl92e_set_bb_reg(dev, 1939 1941 rOFDM1_TRxPathEnable, 1940 1942 0x1 << i, 0x1); 1941 - DM_RxPathSelTable.rf_enable_rssi_th[i] 1943 + dm_rx_path_sel_table.rf_enable_rssi_th[i] 1942 1944 = 100; 1943 1945 disabled_rf_cnt--; 1944 1946 } ··· 1967 1969 priv->rtllib->fsync_firstdiff_ratethreshold = 100; 1968 1970 priv->rtllib->fsync_seconddiff_ratethreshold = 200; 1969 1971 priv->rtllib->fsync_state = Default_Fsync; 1970 - priv->framesyncMonitor = 1; 1972 + priv->frame_sync_monitor = 1; 1971 1973 1972 1974 timer_setup(&priv->fsync_timer, _rtl92e_dm_fsync_timer_callback, 0); 1973 1975 } ··· 2006 2008 priv->rate_record; 2007 2009 else 2008 2010 rate_count_diff = rate_count - priv->rate_record; 2009 - if (rate_count_diff < priv->rateCountDiffRecord) { 2011 + if (rate_count_diff < priv->rate_count_diff_rec) { 2010 2012 2011 - u32 DiffNum = priv->rateCountDiffRecord - 2013 + u32 DiffNum = priv->rate_count_diff_rec - 2012 2014 rate_count_diff; 2013 2015 if (DiffNum >= 2014 2016 priv->rtllib->fsync_seconddiff_ratethreshold) 2015 - priv->ContinueDiffCount++; 2017 + priv->continue_diff_count++; 2016 2018 else 2017 - priv->ContinueDiffCount = 0; 2019 + priv->continue_diff_count = 0; 2018 2020 2019 - if (priv->ContinueDiffCount >= 2) { 2021 + if (priv->continue_diff_count >= 2) { 2020 2022 bSwitchFromCountDiff = true; 2021 - priv->ContinueDiffCount = 0; 2023 + priv->continue_diff_count = 0; 2022 2024 } 2023 2025 } else { 2024 - priv->ContinueDiffCount = 0; 2026 + priv->continue_diff_count = 0; 2025 2027 } 2026 2028 2027 2029 if (rate_count_diff <= 2028 2030 priv->rtllib->fsync_firstdiff_ratethreshold) { 2029 2031 bSwitchFromCountDiff = true; 2030 - priv->ContinueDiffCount = 0; 2032 + priv->continue_diff_count = 0; 2031 2033 } 2032 2034 priv->rate_record = rate_count; 2033 - priv->rateCountDiffRecord = rate_count_diff; 2035 + priv->rate_count_diff_rec = rate_count_diff; 2034 2036 if (priv->undecorated_smoothed_pwdb > 2035 2037 priv->rtllib->fsync_rssi_threshold && 2036 2038 bSwitchFromCountDiff) { ··· 2071 2073 rtl92e_writeb(dev, 0xC36, 0x5c); 2072 2074 rtl92e_writeb(dev, 0xC3e, 0x96); 2073 2075 } 2074 - priv->ContinueDiffCount = 0; 2076 + priv->continue_diff_count = 0; 2075 2077 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd); 2076 2078 } 2077 2079 } ··· 2112 2114 rtl92e_writeb(dev, 0xC3e, 0x96); 2113 2115 } 2114 2116 2115 - priv->ContinueDiffCount = 0; 2117 + priv->continue_diff_count = 0; 2116 2118 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd); 2117 2119 } 2118 2120 ··· 2123 2125 u32 rate_bitmap; 2124 2126 2125 2127 priv->rate_record = 0; 2126 - priv->ContinueDiffCount = 0; 2127 - priv->rateCountDiffRecord = 0; 2128 + priv->continue_diff_count = 0; 2129 + priv->rate_count_diff_rec = 0; 2128 2130 priv->bswitch_fsync = false; 2129 2131 2130 2132 if (priv->rtllib->mode == WIRELESS_MODE_N_24G) { ··· 2194 2196 2195 2197 } 2196 2198 } 2197 - if (priv->framesyncMonitor) { 2199 + if (priv->frame_sync_monitor) { 2198 2200 if (reg_c38_State != RegC38_Fsync_AP_BCM) { 2199 2201 rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95); 2200 2202 ··· 2216 2218 break; 2217 2219 } 2218 2220 2219 - if (priv->framesyncMonitor) { 2221 + if (priv->frame_sync_monitor) { 2220 2222 if (priv->rtllib->state == RTLLIB_LINKED) { 2221 2223 if (priv->undecorated_smoothed_pwdb <= 2222 2224 RegC38_TH) { ··· 2247 2249 } 2248 2250 } 2249 2251 } 2250 - if (priv->framesyncMonitor) { 2252 + if (priv->frame_sync_monitor) { 2251 2253 if (priv->reset_count != reset_cnt) { 2252 2254 rtl92e_writeb(dev, rOFDM0_RxDetector3, 2253 2255 priv->framesync); ··· 2269 2271 struct r8192_priv *priv = rtllib_priv(dev); 2270 2272 2271 2273 priv->rtllib->bdynamic_txpower_enable = true; 2272 - priv->bLastDTPFlag_High = false; 2273 - priv->bLastDTPFlag_Low = false; 2274 - priv->bDynamicTxHighPower = false; 2275 - priv->bDynamicTxLowPower = false; 2274 + priv->last_dtp_flag_high = false; 2275 + priv->last_dtp_flag_low = false; 2276 + priv->dynamic_tx_high_pwr = false; 2277 + priv->dynamic_tx_low_pwr = false; 2276 2278 } 2277 2279 2278 2280 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev) ··· 2282 2284 unsigned int txlowpower_threshold = 0; 2283 2285 2284 2286 if (!priv->rtllib->bdynamic_txpower_enable) { 2285 - priv->bDynamicTxHighPower = false; 2286 - priv->bDynamicTxLowPower = false; 2287 + priv->dynamic_tx_high_pwr = false; 2288 + priv->dynamic_tx_low_pwr = false; 2287 2289 return; 2288 2290 } 2289 2291 if ((priv->rtllib->ht_info->IOTPeer == HT_IOT_PEER_ATHEROS) && ··· 2297 2299 2298 2300 if (priv->rtllib->state == RTLLIB_LINKED) { 2299 2301 if (priv->undecorated_smoothed_pwdb >= txhipower_threshold) { 2300 - priv->bDynamicTxHighPower = true; 2301 - priv->bDynamicTxLowPower = false; 2302 + priv->dynamic_tx_high_pwr = true; 2303 + priv->dynamic_tx_low_pwr = false; 2302 2304 } else { 2303 2305 if (priv->undecorated_smoothed_pwdb < 2304 - txlowpower_threshold && priv->bDynamicTxHighPower) 2305 - priv->bDynamicTxHighPower = false; 2306 + txlowpower_threshold && priv->dynamic_tx_high_pwr) 2307 + priv->dynamic_tx_high_pwr = false; 2306 2308 if (priv->undecorated_smoothed_pwdb < 35) 2307 - priv->bDynamicTxLowPower = true; 2309 + priv->dynamic_tx_low_pwr = true; 2308 2310 else if (priv->undecorated_smoothed_pwdb >= 40) 2309 - priv->bDynamicTxLowPower = false; 2311 + priv->dynamic_tx_low_pwr = false; 2310 2312 } 2311 2313 } else { 2312 - priv->bDynamicTxHighPower = false; 2313 - priv->bDynamicTxLowPower = false; 2314 + priv->dynamic_tx_high_pwr = false; 2315 + priv->dynamic_tx_low_pwr = false; 2314 2316 } 2315 2317 2316 - if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) || 2317 - (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) { 2318 + if ((priv->dynamic_tx_high_pwr != priv->last_dtp_flag_high) || 2319 + (priv->dynamic_tx_low_pwr != priv->last_dtp_flag_low)) { 2318 2320 rtl92e_set_tx_power(dev, priv->rtllib->current_network.channel); 2319 2321 } 2320 - priv->bLastDTPFlag_High = priv->bDynamicTxHighPower; 2321 - priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower; 2322 + priv->last_dtp_flag_high = priv->dynamic_tx_high_pwr; 2323 + priv->last_dtp_flag_low = priv->dynamic_tx_low_pwr; 2322 2324 2323 2325 } 2324 2326

+18 -27

drivers/staging/rtl8192e/rtl8192e/rtl_dm.h

··· 7 7 #ifndef __R8192UDM_H__ 8 8 #define __R8192UDM_H__ 9 9 10 - 11 10 /*--------------------------Define Parameters-------------------------------*/ 12 - #define OFDM_Table_Length 19 13 - #define CCK_Table_length 12 11 + #define OFDM_TABLE_LEN 19 12 + #define CCK_TABLE_LEN 12 14 13 15 14 #define DM_DIG_THRESH_HIGH 40 16 15 #define DM_DIG_THRESH_LOW 35 ··· 25 26 #define DM_DIG_MIN 0x1c 26 27 #define DM_DIG_MIN_Netcore 0x12 27 28 28 - #define RxPathSelection_SS_TH_low 30 29 - #define RxPathSelection_diff_TH 18 29 + #define RX_PATH_SEL_SS_TH_LOW 30 30 + #define RX_PATH_SEL_DIFF_TH 18 30 31 31 - #define RateAdaptiveTH_High 50 32 - #define RateAdaptiveTH_Low_20M 30 33 - #define RateAdaptiveTH_Low_40M 10 34 - #define VeryLowRSSI 15 32 + #define RATE_ADAPTIVE_TH_HIGH 50 33 + #define RATE_ADAPTIVE_TH_LOW_20M 30 34 + #define RATE_ADAPTIVE_TH_LOW_40M 10 35 + #define VERY_LOW_RSSI 15 35 36 36 - #define WAIotTHVal 25 37 + #define WA_IOT_TH_VAL 25 37 38 38 39 #define E_FOR_TX_POWER_TRACK 300 39 40 #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68 ··· 46 47 #define TX_RETRY_COUNT_REG 0x1ac 47 48 #define RegC38_TH 20 48 49 49 - #define DM_Type_ByDriver 1 50 - 51 50 /*--------------------------Define Parameters-------------------------------*/ 52 - 53 51 54 52 /*------------------------------Define structure----------------------------*/ 55 53 struct dig_t { ··· 85 89 DM_STA_DIG_ON, 86 90 DM_STA_DIG_MAX 87 91 }; 88 - 89 92 90 93 enum dm_ratr_sta { 91 94 DM_RATR_STA_HIGH = 0, ··· 125 130 }; 126 131 127 132 struct drx_path_sel { 128 - u8 Enable; 133 + u8 enable; 129 134 u8 cck_method; 130 - u8 cck_Rx_path; 135 + u8 cck_rx_path; 131 136 132 - u8 SS_TH_low; 133 - u8 diff_TH; 134 - u8 disabledRF; 137 + u8 ss_th_low; 138 + u8 diff_th; 139 + u8 disabled_rf; 135 140 u8 reserved; 136 141 137 142 u8 rf_rssi[4]; ··· 145 150 CCK_Rx_Version_MAX 146 151 }; 147 152 148 - 149 153 struct dcmd_txcmd { 150 154 u32 op; 151 155 u32 length; 152 156 u32 value; 153 157 }; 154 - /*------------------------------Define structure----------------------------*/ 155 158 159 + /*------------------------------Define structure----------------------------*/ 156 160 157 161 /*------------------------Export global variable----------------------------*/ 158 162 extern struct dig_t dm_digtable; 159 - extern struct drx_path_sel DM_RxPathSelTable; 160 163 161 164 /* Pre-calculated gain tables */ 162 - extern const u32 dm_tx_bb_gain[TxBBGainTableLength]; 163 - extern const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8]; 164 - extern const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8]; 165 + extern const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN]; 166 + extern const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8]; 167 + extern const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8]; 165 168 /* Maps table index to iq amplify gain (dB, 12 to -24dB) */ 166 169 #define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) 167 170 168 171 /*------------------------Export global variable----------------------------*/ 169 - 170 172 171 173 /*--------------------------Exported Function prototype---------------------*/ 172 174 /*--------------------------Exported Function prototype---------------------*/ ··· 172 180 void rtl92e_dm_deinit(struct net_device *dev); 173 181 174 182 void rtl92e_dm_watchdog(struct net_device *dev); 175 - 176 183 177 184 void rtl92e_init_adaptive_rate(struct net_device *dev); 178 185 void rtl92e_dm_txpower_tracking_wq(void *data);

+1 -1

drivers/staging/rtl8192e/rtl8192e/rtl_pm.c

··· 41 41 rtl92e_writel(dev, WFCRC1, 0xffffffff); 42 42 rtl92e_writel(dev, WFCRC2, 0xffffffff); 43 43 rtl92e_writeb(dev, PMR, 0x5); 44 - rtl92e_writeb(dev, MacBlkCtrl, 0xa); 44 + rtl92e_writeb(dev, MAC_BLK_CTRL, 0xa); 45 45 } 46 46 out_pci_suspend: 47 47 netdev_info(dev, "WOL is %s\n", priv->rtllib->bSupportRemoteWakeUp ?

+1 -1

drivers/staging/rtl8192u/ieee80211/ieee80211.h

··· 1823 1823 struct work_struct associate_procedure_wq; 1824 1824 struct delayed_work softmac_scan_wq; 1825 1825 struct delayed_work associate_retry_wq; 1826 - struct delayed_work start_ibss_wq; 1826 + struct delayed_work start_ibss_wq; 1827 1827 struct work_struct wx_sync_scan_wq; 1828 1828 struct workqueue_struct *wq; 1829 1829 // Qos related. Added by Annie, 2005-11-01.

+7 -7

drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c

··· 653 653 654 654 655 655 if (PwrState) { 656 - /* To avoid cannot access efuse regsiters after disable/enable several times during DTM test. */ 656 + /* To avoid cannot access efuse registers after disable/enable several times during DTM test. */ 657 657 /* Suggested by SD1 IsaacHsu. 2013.07.08, added by tynli. */ 658 658 tempval = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL); 659 659 if (tempval & BIT(0)) { /* SDIO local register is suspend */ ··· 1693 1693 rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8723B); /* 2ms */ 1694 1694 1695 1695 /* Suggested by designer timchen. Change beacon AIFS to the largest number */ 1696 - /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ 1696 + /* because test chip does not contension before sending beacon. by tynli. 2009.11.03 */ 1697 1697 rtw_write16(padapter, REG_BCNTCFG, 0x660F); 1698 1698 1699 1699 pHalData->RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL); ··· 2089 2089 u16 EEPROMId; 2090 2090 2091 2091 2092 - /* Checl 0x8129 again for making sure autoload status!! */ 2092 + /* Check 0x8129 again for making sure autoload status!! */ 2093 2093 EEPROMId = le16_to_cpu(*((__le16 *)hwinfo)); 2094 2094 if (EEPROMId != RTL_EEPROM_ID) { 2095 2095 pEEPROM->bautoload_fail_flag = true; ··· 2510 2510 /* Clear first */ 2511 2511 ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); 2512 2512 2513 - /* checksume is always calculated by first 32 bytes, */ 2513 + /* checksum is always calculated by first 32 bytes, */ 2514 2514 /* and it doesn't depend on TX DESC length. */ 2515 2515 /* Thomas, Lucas@SD4, 20130515 */ 2516 2516 count = 16; ··· 2723 2723 * multicast / mgnt frame should be controlled by Hw because Fw 2724 2724 * will also send null data which we cannot control when Fw LPS 2725 2725 * enable. 2726 - * --> default enable non-Qos data sequense number. 2010.06.23. 2726 + * --> default enable non-Qos data sequence number. 2010.06.23. 2727 2727 * by tynli. 2728 2728 * (2) Enable HW SEQ control for beacon packet, because we use 2729 2729 * Hw beacon. ··· 2777 2777 SET_TX_DESC_PKT_SIZE_8723B(pDesc, BufferLen); /* Buffer size + command header */ 2778 2778 SET_TX_DESC_QUEUE_SEL_8723B(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */ 2779 2779 2780 - /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */ 2780 + /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error value by Hw. */ 2781 2781 if (IsPsPoll) { 2782 2782 SET_TX_DESC_NAV_USE_HDR_8723B(pDesc, 1); 2783 2783 } else { ··· 3406 3406 /* polling bit, and No Write enable, and address */ 3407 3407 ulCommand = CAM_CONTENT_COUNT*ucIndex+i; 3408 3408 ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE; 3409 - /* write content 0 is equall to mark invalid */ 3409 + /* write content 0 is equal to mark as invalid */ 3410 3410 rtw_write32(padapter, WCAMI, ulContent); /* mdelay(40); */ 3411 3411 rtw_write32(padapter, RWCAM, ulCommand); /* mdelay(40); */ 3412 3412 }

+2

drivers/staging/rts5208/ms.c

··· 1768 1768 1769 1769 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE, 1770 1770 SYSTEM_PARAM, (6 + MS_EXTRA_SIZE)); 1771 + if (retval != STATUS_SUCCESS) 1772 + return STATUS_FAIL; 1771 1773 1772 1774 ms_set_err_code(chip, MS_NO_ERROR); 1773 1775

-2

drivers/staging/vc04_services/Makefile

··· 15 15 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-camera/ 16 16 obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ 17 17 18 - ccflags-y += -I $(srctree)/$(src)/include 19 -

-2

drivers/staging/vc04_services/bcm2835-audio/Makefile

··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 obj-$(CONFIG_SND_BCM2835) += snd-bcm2835.o 3 3 snd-bcm2835-objs := bcm2835.o bcm2835-ctl.o bcm2835-pcm.o bcm2835-vchiq.o 4 - 5 - ccflags-y += -I $(srctree)/$(src)/../include -D__VCCOREVER__=0x04000000

+6 -6

drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c

··· 91 91 return bcm2835_audio_send_msg(instance, &m, wait); 92 92 } 93 93 94 - static enum vchiq_status audio_vchi_callback(struct vchiq_instance *vchiq_instance, 95 - enum vchiq_reason reason, 96 - struct vchiq_header *header, 97 - unsigned int handle, void *userdata) 94 + static int audio_vchi_callback(struct vchiq_instance *vchiq_instance, 95 + enum vchiq_reason reason, 96 + struct vchiq_header *header, 97 + unsigned int handle, void *userdata) 98 98 { 99 99 struct bcm2835_audio_instance *instance = vchiq_get_service_userdata(vchiq_instance, 100 100 handle); 101 101 struct vc_audio_msg *m; 102 102 103 103 if (reason != VCHIQ_MESSAGE_AVAILABLE) 104 - return VCHIQ_SUCCESS; 104 + return 0; 105 105 106 106 m = (void *)header->data; 107 107 if (m->type == VC_AUDIO_MSG_TYPE_RESULT) { ··· 119 119 } 120 120 121 121 vchiq_release_message(vchiq_instance, instance->service_handle, header); 122 - return VCHIQ_SUCCESS; 122 + return 0; 123 123 } 124 124 125 125 static int

+2 -1

drivers/staging/vc04_services/bcm2835-audio/bcm2835.h

··· 6 6 7 7 #include <linux/device.h> 8 8 #include <linux/wait.h> 9 - #include <linux/raspberrypi/vchiq.h> 10 9 #include <sound/core.h> 11 10 #include <sound/pcm.h> 12 11 #include <sound/pcm-indirect.h> 12 + 13 + #include "../include/linux/raspberrypi/vchiq.h" 13 14 14 15 #define MAX_SUBSTREAMS (8) 15 16 #define AVAIL_SUBSTREAMS_MASK (0xff)

-5

drivers/staging/vc04_services/bcm2835-camera/Makefile

··· 4 4 controls.o 5 5 6 6 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-v4l2.o 7 - 8 - ccflags-y += \ 9 - -I $(srctree)/$(src)/.. \ 10 - -I $(srctree)/$(src)/../vchiq-mmal/ \ 11 - -D__VCCOREVER__=0x04000000

+5 -5

drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c

··· 26 26 #include <linux/delay.h> 27 27 #include <linux/platform_device.h> 28 28 29 - #include "mmal-common.h" 30 - #include "mmal-encodings.h" 31 - #include "mmal-vchiq.h" 32 - #include "mmal-msg.h" 33 - #include "mmal-parameters.h" 29 + #include "../vchiq-mmal/mmal-common.h" 30 + #include "../vchiq-mmal/mmal-encodings.h" 31 + #include "../vchiq-mmal/mmal-vchiq.h" 32 + #include "../vchiq-mmal/mmal-msg.h" 33 + #include "../vchiq-mmal/mmal-parameters.h" 34 34 #include "bcm2835-camera.h" 35 35 36 36 #define MIN_WIDTH 32

+3 -3

drivers/staging/vc04_services/bcm2835-camera/controls.c

··· 23 23 #include <media/v4l2-event.h> 24 24 #include <media/v4l2-common.h> 25 25 26 - #include "mmal-common.h" 27 - #include "mmal-vchiq.h" 28 - #include "mmal-parameters.h" 26 + #include "../vchiq-mmal/mmal-common.h" 27 + #include "../vchiq-mmal/mmal-vchiq.h" 28 + #include "../vchiq-mmal/mmal-parameters.h" 29 29 #include "bcm2835-camera.h" 30 30 31 31 /* The supported V4L2_CID_AUTO_EXPOSURE_BIAS values are from -4.0 to +4.0.

+28 -35

drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h

··· 17 17 VCHIQ_BULK_RECEIVE_ABORTED /* service, -, bulk_userdata */ 18 18 }; 19 19 20 - enum vchiq_status { 21 - VCHIQ_ERROR = -1, 22 - VCHIQ_SUCCESS = 0, 23 - VCHIQ_RETRY = 1 24 - }; 25 - 26 20 enum vchiq_bulk_mode { 27 21 VCHIQ_BULK_MODE_CALLBACK, 28 22 VCHIQ_BULK_MODE_BLOCKING, ··· 51 57 52 58 struct vchiq_service_base { 53 59 int fourcc; 54 - enum vchiq_status (*callback)(struct vchiq_instance *instance, 55 - enum vchiq_reason reason, 56 - struct vchiq_header *header, 57 - unsigned int handle, 58 - void *bulk_userdata); 60 + int (*callback)(struct vchiq_instance *instance, 61 + enum vchiq_reason reason, 62 + struct vchiq_header *header, 63 + unsigned int handle, 64 + void *bulk_userdata); 59 65 void *userdata; 60 66 }; 61 67 ··· 68 74 69 75 struct vchiq_service_params_kernel { 70 76 int fourcc; 71 - enum vchiq_status (*callback)(struct vchiq_instance *instance, 72 - enum vchiq_reason reason, 73 - struct vchiq_header *header, 74 - unsigned int handle, 75 - void *bulk_userdata); 77 + int (*callback)(struct vchiq_instance *instance, 78 + enum vchiq_reason reason, 79 + struct vchiq_header *header, 80 + unsigned int handle, 81 + void *bulk_userdata); 76 82 void *userdata; 77 83 short version; /* Increment for non-trivial changes */ 78 84 short version_min; /* Update for incompatible changes */ ··· 81 87 struct vchiq_instance; 82 88 83 89 extern int vchiq_initialise(struct vchiq_instance **pinstance); 84 - extern enum vchiq_status vchiq_shutdown(struct vchiq_instance *instance); 85 - extern enum vchiq_status vchiq_connect(struct vchiq_instance *instance); 86 - extern enum vchiq_status vchiq_open_service(struct vchiq_instance *instance, 87 - const struct vchiq_service_params_kernel *params, 88 - unsigned int *pservice); 89 - extern enum vchiq_status vchiq_close_service(struct vchiq_instance *instance, 90 - unsigned int service); 91 - extern enum vchiq_status vchiq_use_service(struct vchiq_instance *instance, unsigned int service); 92 - extern enum vchiq_status vchiq_release_service(struct vchiq_instance *instance, 93 - unsigned int service); 90 + extern int vchiq_shutdown(struct vchiq_instance *instance); 91 + extern int vchiq_connect(struct vchiq_instance *instance); 92 + extern int vchiq_open_service(struct vchiq_instance *instance, 93 + const struct vchiq_service_params_kernel *params, 94 + unsigned int *pservice); 95 + extern int vchiq_close_service(struct vchiq_instance *instance, 96 + unsigned int service); 97 + extern int vchiq_use_service(struct vchiq_instance *instance, unsigned int service); 98 + extern int vchiq_release_service(struct vchiq_instance *instance, 99 + unsigned int service); 94 100 extern void vchiq_msg_queue_push(struct vchiq_instance *instance, unsigned int handle, 95 101 struct vchiq_header *header); 96 102 extern void vchiq_release_message(struct vchiq_instance *instance, unsigned int service, 97 103 struct vchiq_header *header); 98 104 extern int vchiq_queue_kernel_message(struct vchiq_instance *instance, unsigned int handle, 99 105 void *data, unsigned int size); 100 - extern enum vchiq_status vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int service, 101 - const void *data, unsigned int size, void *userdata, 102 - enum vchiq_bulk_mode mode); 103 - extern enum vchiq_status vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int service, 104 - void *data, unsigned int size, void *userdata, 105 - enum vchiq_bulk_mode mode); 106 + extern int vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int service, 107 + const void *data, unsigned int size, void *userdata, 108 + enum vchiq_bulk_mode mode); 109 + extern int vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int service, 110 + void *data, unsigned int size, void *userdata, 111 + enum vchiq_bulk_mode mode); 106 112 extern void *vchiq_get_service_userdata(struct vchiq_instance *instance, unsigned int service); 107 - extern enum vchiq_status vchiq_get_peer_version(struct vchiq_instance *instance, 108 - unsigned int handle, 109 - short *peer_version); 113 + extern int vchiq_get_peer_version(struct vchiq_instance *instance, unsigned int handle, 114 + short *peer_version); 110 115 extern struct vchiq_header *vchiq_msg_hold(struct vchiq_instance *instance, unsigned int handle); 111 116 112 117 #endif /* VCHIQ_H */

-5

drivers/staging/vc04_services/interface/TODO

··· 40 40 Extra points to whomever confidently reviews the remote_event_*() family of 41 41 functions. 42 42 43 - * Get rid of custom function return values 44 - 45 - Most functions use a custom set of return values, we should force proper Linux 46 - error numbers. Special care is needed for VCHIQ_RETRY. 47 - 48 43 * Reformat core code with more sane indentations 49 44 50 45 The code follows the 80 characters limitation yet tends to go 3 or 4 levels of

+71 -65

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c

··· 151 151 152 152 static DEFINE_SEMAPHORE(g_free_fragments_mutex); 153 153 154 - static enum vchiq_status 154 + static int 155 155 vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *data, 156 156 unsigned int size, enum vchiq_bulk_dir dir); 157 157 ··· 501 501 502 502 vchiq_slot_zero = vchiq_init_slots(slot_mem, slot_mem_size); 503 503 if (!vchiq_slot_zero) 504 - return -EINVAL; 504 + return -ENOMEM; 505 505 506 506 vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] = 507 507 (int)slot_phys + slot_mem_size; ··· 541 541 channelbase = slot_phys; 542 542 err = rpi_firmware_property(fw, RPI_FIRMWARE_VCHIQ_INIT, 543 543 &channelbase, sizeof(channelbase)); 544 - if (err || channelbase) { 545 - dev_err(dev, "failed to set channelbase\n"); 546 - return err ? : -ENXIO; 544 + if (err) { 545 + dev_err(dev, "failed to send firmware property: %d\n", err); 546 + return err; 547 + } 548 + 549 + if (channelbase) { 550 + dev_err(dev, "failed to set channelbase (response: %x)\n", 551 + channelbase); 552 + return -ENXIO; 547 553 } 548 554 549 555 vchiq_log_info(vchiq_arm_log_level, "vchiq_init - done (slots %pK, phys %pad)", ··· 728 722 } 729 723 } 730 724 731 - enum vchiq_status vchiq_shutdown(struct vchiq_instance *instance) 725 + int vchiq_shutdown(struct vchiq_instance *instance) 732 726 { 733 - enum vchiq_status status = VCHIQ_SUCCESS; 727 + int status = 0; 734 728 struct vchiq_state *state = instance->state; 735 729 736 730 if (mutex_lock_killable(&state->mutex)) 737 - return VCHIQ_RETRY; 731 + return -EAGAIN; 738 732 739 733 /* Remove all services */ 740 734 vchiq_shutdown_internal(state, instance); ··· 755 749 return instance->connected; 756 750 } 757 751 758 - enum vchiq_status vchiq_connect(struct vchiq_instance *instance) 752 + int vchiq_connect(struct vchiq_instance *instance) 759 753 { 760 - enum vchiq_status status; 754 + int status; 761 755 struct vchiq_state *state = instance->state; 762 756 763 757 if (mutex_lock_killable(&state->mutex)) { 764 758 vchiq_log_trace(vchiq_core_log_level, "%s: call to mutex_lock failed", __func__); 765 - status = VCHIQ_RETRY; 759 + status = -EAGAIN; 766 760 goto failed; 767 761 } 768 762 status = vchiq_connect_internal(state, instance); 769 763 770 - if (status == VCHIQ_SUCCESS) 764 + if (!status) 771 765 instance->connected = 1; 772 766 773 767 mutex_unlock(&state->mutex); ··· 779 773 } 780 774 EXPORT_SYMBOL(vchiq_connect); 781 775 782 - static enum vchiq_status 776 + static int 783 777 vchiq_add_service(struct vchiq_instance *instance, 784 778 const struct vchiq_service_params_kernel *params, 785 779 unsigned int *phandle) 786 780 { 787 - enum vchiq_status status; 781 + int status; 788 782 struct vchiq_state *state = instance->state; 789 783 struct vchiq_service *service = NULL; 790 784 int srvstate; ··· 799 793 800 794 if (service) { 801 795 *phandle = service->handle; 802 - status = VCHIQ_SUCCESS; 796 + status = 0; 803 797 } else { 804 - status = VCHIQ_ERROR; 798 + status = -EINVAL; 805 799 } 806 800 807 801 vchiq_log_trace(vchiq_core_log_level, "%s(%p): returning %d", __func__, instance, status); ··· 809 803 return status; 810 804 } 811 805 812 - enum vchiq_status 806 + int 813 807 vchiq_open_service(struct vchiq_instance *instance, 814 808 const struct vchiq_service_params_kernel *params, 815 809 unsigned int *phandle) 816 810 { 817 - enum vchiq_status status = VCHIQ_ERROR; 811 + int status = -EINVAL; 818 812 struct vchiq_state *state = instance->state; 819 813 struct vchiq_service *service = NULL; 820 814 ··· 828 822 if (service) { 829 823 *phandle = service->handle; 830 824 status = vchiq_open_service_internal(service, current->pid); 831 - if (status != VCHIQ_SUCCESS) { 825 + if (status) { 832 826 vchiq_remove_service(instance, service->handle); 833 827 *phandle = VCHIQ_SERVICE_HANDLE_INVALID; 834 828 } ··· 841 835 } 842 836 EXPORT_SYMBOL(vchiq_open_service); 843 837 844 - enum vchiq_status 838 + int 845 839 vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int handle, const void *data, 846 840 unsigned int size, void *userdata, enum vchiq_bulk_mode mode) 847 841 { 848 - enum vchiq_status status; 842 + int status; 849 843 850 844 while (1) { 851 845 switch (mode) { ··· 861 855 VCHIQ_BULK_TRANSMIT); 862 856 break; 863 857 default: 864 - return VCHIQ_ERROR; 858 + return -EINVAL; 865 859 } 866 860 867 861 /* 868 - * vchiq_*_bulk_transfer() may return VCHIQ_RETRY, so we need 862 + * vchiq_*_bulk_transfer() may return -EAGAIN, so we need 869 863 * to implement a retry mechanism since this function is 870 864 * supposed to block until queued 871 865 */ 872 - if (status != VCHIQ_RETRY) 866 + if (status != -EAGAIN) 873 867 break; 874 868 875 869 msleep(1); ··· 879 873 } 880 874 EXPORT_SYMBOL(vchiq_bulk_transmit); 881 875 882 - enum vchiq_status vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int handle, 883 - void *data, unsigned int size, void *userdata, 884 - enum vchiq_bulk_mode mode) 876 + int vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int handle, 877 + void *data, unsigned int size, void *userdata, 878 + enum vchiq_bulk_mode mode) 885 879 { 886 - enum vchiq_status status; 880 + int status; 887 881 888 882 while (1) { 889 883 switch (mode) { ··· 898 892 VCHIQ_BULK_RECEIVE); 899 893 break; 900 894 default: 901 - return VCHIQ_ERROR; 895 + return -EINVAL; 902 896 } 903 897 904 898 /* 905 - * vchiq_*_bulk_transfer() may return VCHIQ_RETRY, so we need 899 + * vchiq_*_bulk_transfer() may return -EAGAIN, so we need 906 900 * to implement a retry mechanism since this function is 907 901 * supposed to block until queued 908 902 */ 909 - if (status != VCHIQ_RETRY) 903 + if (status != -EAGAIN) 910 904 break; 911 905 912 906 msleep(1); ··· 916 910 } 917 911 EXPORT_SYMBOL(vchiq_bulk_receive); 918 912 919 - static enum vchiq_status 913 + static int 920 914 vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *data, 921 915 unsigned int size, enum vchiq_bulk_dir dir) 922 916 { 923 917 struct vchiq_service *service; 924 - enum vchiq_status status; 918 + int status; 925 919 struct bulk_waiter_node *waiter = NULL, *iter; 926 920 927 921 service = find_service_by_handle(instance, handle); 928 922 if (!service) 929 - return VCHIQ_ERROR; 923 + return -EINVAL; 930 924 931 925 vchiq_service_put(service); 932 926 ··· 960 954 waiter = kzalloc(sizeof(*waiter), GFP_KERNEL); 961 955 if (!waiter) { 962 956 vchiq_log_error(vchiq_core_log_level, "%s - out of memory", __func__); 963 - return VCHIQ_ERROR; 957 + return -ENOMEM; 964 958 } 965 959 } 966 960 967 961 status = vchiq_bulk_transfer(instance, handle, data, NULL, size, 968 962 &waiter->bulk_waiter, 969 963 VCHIQ_BULK_MODE_BLOCKING, dir); 970 - if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { 964 + if ((status != -EAGAIN) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { 971 965 struct vchiq_bulk *bulk = waiter->bulk_waiter.bulk; 972 966 973 967 if (bulk) { ··· 989 983 return status; 990 984 } 991 985 992 - static enum vchiq_status 986 + static int 993 987 add_completion(struct vchiq_instance *instance, enum vchiq_reason reason, 994 988 struct vchiq_header *header, struct user_service *user_service, 995 989 void *bulk_userdata) ··· 1007 1001 DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT); 1008 1002 if (wait_for_completion_interruptible(&instance->remove_event)) { 1009 1003 vchiq_log_info(vchiq_arm_log_level, "service_callback interrupted"); 1010 - return VCHIQ_RETRY; 1004 + return -EAGAIN; 1011 1005 } else if (instance->closing) { 1012 1006 vchiq_log_info(vchiq_arm_log_level, "service_callback closing"); 1013 - return VCHIQ_SUCCESS; 1007 + return 0; 1014 1008 } 1015 1009 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1016 1010 } ··· 1047 1041 1048 1042 complete(&instance->insert_event); 1049 1043 1050 - return VCHIQ_SUCCESS; 1044 + return 0; 1051 1045 } 1052 1046 1053 - enum vchiq_status 1047 + int 1054 1048 service_callback(struct vchiq_instance *instance, enum vchiq_reason reason, 1055 1049 struct vchiq_header *header, unsigned int handle, void *bulk_userdata) 1056 1050 { ··· 1072 1066 service = handle_to_service(instance, handle); 1073 1067 if (WARN_ON(!service)) { 1074 1068 rcu_read_unlock(); 1075 - return VCHIQ_SUCCESS; 1069 + return 0; 1076 1070 } 1077 1071 1078 1072 user_service = (struct user_service *)service->base.userdata; 1079 1073 1080 1074 if (!instance || instance->closing) { 1081 1075 rcu_read_unlock(); 1082 - return VCHIQ_SUCCESS; 1076 + return 0; 1083 1077 } 1084 1078 1085 1079 /* ··· 1109 1103 */ 1110 1104 if ((user_service->message_available_pos - 1111 1105 instance->completion_remove) < 0) { 1112 - enum vchiq_status status; 1106 + int status; 1113 1107 1114 1108 vchiq_log_info(vchiq_arm_log_level, 1115 1109 "Inserting extra MESSAGE_AVAILABLE"); 1116 1110 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1117 1111 status = add_completion(instance, reason, NULL, user_service, 1118 1112 bulk_userdata); 1119 - if (status != VCHIQ_SUCCESS) { 1113 + if (status) { 1120 1114 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1121 1115 vchiq_service_put(service); 1122 1116 return status; ··· 1128 1122 vchiq_log_info(vchiq_arm_log_level, "%s interrupted", __func__); 1129 1123 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1130 1124 vchiq_service_put(service); 1131 - return VCHIQ_RETRY; 1125 + return -EAGAIN; 1132 1126 } else if (instance->closing) { 1133 1127 vchiq_log_info(vchiq_arm_log_level, "%s closing", __func__); 1134 1128 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1135 1129 vchiq_service_put(service); 1136 - return VCHIQ_ERROR; 1130 + return -EINVAL; 1137 1131 } 1138 1132 DEBUG_TRACE(SERVICE_CALLBACK_LINE); 1139 1133 spin_lock(&msg_queue_spinlock); ··· 1164 1158 vchiq_service_put(service); 1165 1159 1166 1160 if (skip_completion) 1167 - return VCHIQ_SUCCESS; 1161 + return 0; 1168 1162 1169 1163 return add_completion(instance, reason, header, user_service, 1170 1164 bulk_userdata); ··· 1320 1314 * Autosuspend related functionality 1321 1315 */ 1322 1316 1323 - static enum vchiq_status 1317 + static int 1324 1318 vchiq_keepalive_vchiq_callback(struct vchiq_instance *instance, 1325 1319 enum vchiq_reason reason, 1326 1320 struct vchiq_header *header, ··· 1336 1330 struct vchiq_state *state = (struct vchiq_state *)v; 1337 1331 struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); 1338 1332 1339 - enum vchiq_status status; 1333 + int status; 1340 1334 struct vchiq_instance *instance; 1341 1335 unsigned int ka_handle; 1342 1336 int ret; ··· 1356 1350 } 1357 1351 1358 1352 status = vchiq_connect(instance); 1359 - if (status != VCHIQ_SUCCESS) { 1353 + if (status) { 1360 1354 vchiq_log_error(vchiq_susp_log_level, "%s vchiq_connect failed %d", __func__, 1361 1355 status); 1362 1356 goto shutdown; 1363 1357 } 1364 1358 1365 1359 status = vchiq_add_service(instance, &params, &ka_handle); 1366 - if (status != VCHIQ_SUCCESS) { 1360 + if (status) { 1367 1361 vchiq_log_error(vchiq_susp_log_level, "%s vchiq_open_service failed %d", __func__, 1368 1362 status); 1369 1363 goto shutdown; ··· 1392 1386 while (uc--) { 1393 1387 atomic_inc(&arm_state->ka_use_ack_count); 1394 1388 status = vchiq_use_service(instance, ka_handle); 1395 - if (status != VCHIQ_SUCCESS) { 1389 + if (status) { 1396 1390 vchiq_log_error(vchiq_susp_log_level, 1397 1391 "%s vchiq_use_service error %d", __func__, status); 1398 1392 } 1399 1393 } 1400 1394 while (rc--) { 1401 1395 status = vchiq_release_service(instance, ka_handle); 1402 - if (status != VCHIQ_SUCCESS) { 1396 + if (status) { 1403 1397 vchiq_log_error(vchiq_susp_log_level, 1404 1398 "%s vchiq_release_service error %d", __func__, 1405 1399 status); ··· 1452 1446 write_unlock_bh(&arm_state->susp_res_lock); 1453 1447 1454 1448 if (!ret) { 1455 - enum vchiq_status status = VCHIQ_SUCCESS; 1449 + int status = 0; 1456 1450 long ack_cnt = atomic_xchg(&arm_state->ka_use_ack_count, 0); 1457 1451 1458 - while (ack_cnt && (status == VCHIQ_SUCCESS)) { 1452 + while (ack_cnt && !status) { 1459 1453 /* Send the use notify to videocore */ 1460 1454 status = vchiq_send_remote_use_active(state); 1461 - if (status == VCHIQ_SUCCESS) 1455 + if (!status) 1462 1456 ack_cnt--; 1463 1457 else 1464 1458 atomic_add(ack_cnt, &arm_state->ka_use_ack_count); ··· 1593 1587 instance->trace = (trace != 0); 1594 1588 } 1595 1589 1596 - enum vchiq_status 1590 + int 1597 1591 vchiq_use_service(struct vchiq_instance *instance, unsigned int handle) 1598 1592 { 1599 - enum vchiq_status ret = VCHIQ_ERROR; 1593 + int ret = -EINVAL; 1600 1594 struct vchiq_service *service = find_service_by_handle(instance, handle); 1601 1595 1602 1596 if (service) { ··· 1607 1601 } 1608 1602 EXPORT_SYMBOL(vchiq_use_service); 1609 1603 1610 - enum vchiq_status 1604 + int 1611 1605 vchiq_release_service(struct vchiq_instance *instance, unsigned int handle) 1612 1606 { 1613 - enum vchiq_status ret = VCHIQ_ERROR; 1607 + int ret = -EINVAL; 1614 1608 struct vchiq_service *service = find_service_by_handle(instance, handle); 1615 1609 1616 1610 if (service) { ··· 1701 1695 kfree(service_data); 1702 1696 } 1703 1697 1704 - enum vchiq_status 1698 + int 1705 1699 vchiq_check_service(struct vchiq_service *service) 1706 1700 { 1707 1701 struct vchiq_arm_state *arm_state; 1708 - enum vchiq_status ret = VCHIQ_ERROR; 1702 + int ret = -EINVAL; 1709 1703 1710 1704 if (!service || !service->state) 1711 1705 goto out; ··· 1714 1708 1715 1709 read_lock_bh(&arm_state->susp_res_lock); 1716 1710 if (service->service_use_count) 1717 - ret = VCHIQ_SUCCESS; 1711 + ret = 0; 1718 1712 read_unlock_bh(&arm_state->susp_res_lock); 1719 1713 1720 - if (ret == VCHIQ_ERROR) { 1714 + if (ret) { 1721 1715 vchiq_log_error(vchiq_susp_log_level, 1722 1716 "%s ERROR - %c%c%c%c:%d service count %d, state count %d", __func__, 1723 1717 VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), service->client_id,

+4 -4

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h

··· 85 85 extern struct vchiq_state * 86 86 vchiq_get_state(void); 87 87 88 - enum vchiq_status 88 + int 89 89 vchiq_use_service(struct vchiq_instance *instance, unsigned int handle); 90 90 91 - extern enum vchiq_status 91 + extern int 92 92 vchiq_release_service(struct vchiq_instance *instance, unsigned int handle); 93 93 94 - extern enum vchiq_status 94 + extern int 95 95 vchiq_check_service(struct vchiq_service *service); 96 96 97 97 extern void ··· 137 137 138 138 #endif /* IS_ENABLED(CONFIG_VCHIQ_CDEV) */ 139 139 140 - extern enum vchiq_status 140 + extern int 141 141 service_callback(struct vchiq_instance *vchiq_instance, enum vchiq_reason reason, 142 142 struct vchiq_header *header, unsigned int handle, void *bulk_userdata); 143 143

+117 -109

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c

··· 463 463 mark_service_closing_internal(service, 0); 464 464 } 465 465 466 - static inline enum vchiq_status 466 + static inline int 467 467 make_service_callback(struct vchiq_service *service, enum vchiq_reason reason, 468 468 struct vchiq_header *header, void *bulk_userdata) 469 469 { 470 - enum vchiq_status status; 470 + int status; 471 471 472 472 vchiq_log_trace(vchiq_core_log_level, "%d: callback:%d (%s, %pK, %pK)", 473 473 service->state->id, service->localport, reason_names[reason], 474 474 header, bulk_userdata); 475 475 status = service->base.callback(service->instance, reason, header, service->handle, 476 476 bulk_userdata); 477 - if (status == VCHIQ_ERROR) { 477 + if (status && (status != -EAGAIN)) { 478 478 vchiq_log_warning(vchiq_core_log_level, 479 479 "%d: ignoring ERROR from callback to service %x", 480 480 service->state->id, service->handle); 481 - status = VCHIQ_SUCCESS; 481 + status = 0; 482 482 } 483 483 484 484 if (reason != VCHIQ_MESSAGE_AVAILABLE) ··· 498 498 vchiq_platform_conn_state_changed(state, oldstate, newstate); 499 499 } 500 500 501 + /* This initialises a single remote_event, and the associated wait_queue. */ 501 502 static inline void 502 503 remote_event_create(wait_queue_head_t *wq, struct remote_event *event) 503 504 { ··· 537 536 return 1; 538 537 } 539 538 539 + /* 540 + * Acknowledge that the event has been signalled, and wake any waiters. Usually 541 + * called as a result of the doorbell being rung. 542 + */ 540 543 static inline void 541 544 remote_event_signal_local(wait_queue_head_t *wq, struct remote_event *event) 542 545 { ··· 549 544 wake_up_all(wq); 550 545 } 551 546 547 + /* Check if a single event has been signalled, waking the waiters if it has. */ 552 548 static inline void 553 549 remote_event_poll(wait_queue_head_t *wq, struct remote_event *event) 554 550 { ··· 557 551 remote_event_signal_local(wq, event); 558 552 } 559 553 554 + /* 555 + * VCHIQ used a small, fixed number of remote events. It is simplest to 556 + * enumerate them here for polling. 557 + */ 560 558 void 561 559 remote_event_pollall(struct vchiq_state *state) 562 560 { ··· 910 900 } 911 901 912 902 /* Called by the slot handler and application threads */ 913 - static enum vchiq_status 903 + static int 914 904 queue_message(struct vchiq_state *state, struct vchiq_service *service, 915 905 int msgid, 916 906 ssize_t (*copy_callback)(void *context, void *dest, ··· 932 922 933 923 if (!(flags & QMFLAGS_NO_MUTEX_LOCK) && 934 924 mutex_lock_killable(&state->slot_mutex)) 935 - return VCHIQ_RETRY; 925 + return -EAGAIN; 936 926 937 927 if (type == VCHIQ_MSG_DATA) { 938 928 int tx_end_index; ··· 940 930 if (!service) { 941 931 WARN(1, "%s: service is NULL\n", __func__); 942 932 mutex_unlock(&state->slot_mutex); 943 - return VCHIQ_ERROR; 933 + return -EINVAL; 944 934 } 945 935 946 936 WARN_ON(flags & (QMFLAGS_NO_MUTEX_LOCK | ··· 949 939 if (service->closing) { 950 940 /* The service has been closed */ 951 941 mutex_unlock(&state->slot_mutex); 952 - return VCHIQ_ERROR; 942 + return -EHOSTDOWN; 953 943 } 954 944 955 945 quota = &state->service_quotas[service->localport]; ··· 973 963 mutex_unlock(&state->slot_mutex); 974 964 975 965 if (wait_for_completion_interruptible(&state->data_quota_event)) 976 - return VCHIQ_RETRY; 966 + return -EAGAIN; 977 967 978 968 mutex_lock(&state->slot_mutex); 979 969 spin_lock(&quota_spinlock); ··· 997 987 VCHIQ_SERVICE_STATS_INC(service, quota_stalls); 998 988 mutex_unlock(&state->slot_mutex); 999 989 if (wait_for_completion_interruptible(&quota->quota_event)) 1000 - return VCHIQ_RETRY; 990 + return -EAGAIN; 1001 991 if (service->closing) 1002 - return VCHIQ_ERROR; 992 + return -EHOSTDOWN; 1003 993 if (mutex_lock_killable(&state->slot_mutex)) 1004 - return VCHIQ_RETRY; 994 + return -EAGAIN; 1005 995 if (service->srvstate != VCHIQ_SRVSTATE_OPEN) { 1006 996 /* The service has been closed */ 1007 997 mutex_unlock(&state->slot_mutex); 1008 - return VCHIQ_ERROR; 998 + return -EHOSTDOWN; 1009 999 } 1010 1000 spin_lock(&quota_spinlock); 1011 1001 tx_end_index = SLOT_QUEUE_INDEX_FROM_POS(state->local_tx_pos + stride - 1); ··· 1025 1015 */ 1026 1016 if (!(flags & QMFLAGS_NO_MUTEX_LOCK)) 1027 1017 mutex_unlock(&state->slot_mutex); 1028 - return VCHIQ_RETRY; 1018 + return -EAGAIN; 1029 1019 } 1030 1020 1031 1021 if (type == VCHIQ_MSG_DATA) { ··· 1047 1037 if (callback_result < 0) { 1048 1038 mutex_unlock(&state->slot_mutex); 1049 1039 VCHIQ_SERVICE_STATS_INC(service, error_count); 1050 - return VCHIQ_ERROR; 1040 + return -EINVAL; 1051 1041 } 1052 1042 1053 1043 if (SRVTRACE_ENABLED(service, ··· 1145 1135 1146 1136 remote_event_signal(&state->remote->trigger); 1147 1137 1148 - return VCHIQ_SUCCESS; 1138 + return 0; 1149 1139 } 1150 1140 1151 1141 /* Called by the slot handler and application threads */ 1152 - static enum vchiq_status 1142 + static int 1153 1143 queue_message_sync(struct vchiq_state *state, struct vchiq_service *service, 1154 1144 int msgid, 1155 1145 ssize_t (*copy_callback)(void *context, void *dest, ··· 1164 1154 1165 1155 if (VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_RESUME && 1166 1156 mutex_lock_killable(&state->sync_mutex)) 1167 - return VCHIQ_RETRY; 1157 + return -EAGAIN; 1168 1158 1169 1159 remote_event_wait(&state->sync_release_event, &local->sync_release); 1170 1160 ··· 1195 1185 if (callback_result < 0) { 1196 1186 mutex_unlock(&state->slot_mutex); 1197 1187 VCHIQ_SERVICE_STATS_INC(service, error_count); 1198 - return VCHIQ_ERROR; 1188 + return -EINVAL; 1199 1189 } 1200 1190 1201 1191 if (service) { ··· 1233 1223 if (VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_PAUSE) 1234 1224 mutex_unlock(&state->sync_mutex); 1235 1225 1236 - return VCHIQ_SUCCESS; 1226 + return 0; 1237 1227 } 1238 1228 1239 1229 static inline void ··· 1309 1299 } 1310 1300 1311 1301 /* Called by the slot handler - don't hold the bulk mutex */ 1312 - static enum vchiq_status 1302 + static int 1313 1303 notify_bulks(struct vchiq_service *service, struct vchiq_bulk_queue *queue, 1314 1304 int retry_poll) 1315 1305 { 1316 - enum vchiq_status status = VCHIQ_SUCCESS; 1306 + int status = 0; 1317 1307 1318 1308 vchiq_log_trace(vchiq_core_log_level, "%d: nb:%d %cx - p=%x rn=%x r=%x", service->state->id, 1319 1309 service->localport, (queue == &service->bulk_tx) ? 't' : 'r', ··· 1358 1348 get_bulk_reason(bulk); 1359 1349 status = make_service_callback(service, reason, NULL, 1360 1350 bulk->userdata); 1361 - if (status == VCHIQ_RETRY) 1351 + if (status == -EAGAIN) 1362 1352 break; 1363 1353 } 1364 1354 } ··· 1367 1357 complete(&service->bulk_remove_event); 1368 1358 } 1369 1359 if (!retry_poll) 1370 - status = VCHIQ_SUCCESS; 1360 + status = 0; 1371 1361 1372 - if (status == VCHIQ_RETRY) 1362 + if (status == -EAGAIN) 1373 1363 request_poll(service->state, service, (queue == &service->bulk_tx) ? 1374 1364 VCHIQ_POLL_TXNOTIFY : VCHIQ_POLL_RXNOTIFY); 1375 1365 ··· 1408 1398 */ 1409 1399 service->public_fourcc = VCHIQ_FOURCC_INVALID; 1410 1400 1411 - if (vchiq_close_service_internal(service, NO_CLOSE_RECVD) != 1412 - VCHIQ_SUCCESS) 1401 + if (vchiq_close_service_internal(service, NO_CLOSE_RECVD)) 1413 1402 request_poll(state, service, VCHIQ_POLL_REMOVE); 1414 1403 } else if (service_flags & BIT(VCHIQ_POLL_TERMINATE)) { 1415 1404 vchiq_log_info(vchiq_core_log_level, "%d: ps - terminate %d<->%d", 1416 1405 state->id, service->localport, service->remoteport); 1417 - if (vchiq_close_service_internal(service, NO_CLOSE_RECVD) != VCHIQ_SUCCESS) 1406 + if (vchiq_close_service_internal(service, NO_CLOSE_RECVD)) 1418 1407 request_poll(state, service, VCHIQ_POLL_TERMINATE); 1419 1408 } 1420 1409 if (service_flags & BIT(VCHIQ_POLL_TXNOTIFY)) ··· 1536 1527 /* Acknowledge the OPEN */ 1537 1528 if (service->sync) { 1538 1529 if (queue_message_sync(state, NULL, openack_id, memcpy_copy_callback, 1539 - &ack_payload, sizeof(ack_payload), 0) == VCHIQ_RETRY) 1530 + &ack_payload, sizeof(ack_payload), 0) == -EAGAIN) 1540 1531 goto bail_not_ready; 1541 1532 1542 1533 /* The service is now open */ 1543 1534 set_service_state(service, VCHIQ_SRVSTATE_OPENSYNC); 1544 1535 } else { 1545 1536 if (queue_message(state, NULL, openack_id, memcpy_copy_callback, 1546 - &ack_payload, sizeof(ack_payload), 0) == VCHIQ_RETRY) 1537 + &ack_payload, sizeof(ack_payload), 0) == -EAGAIN) 1547 1538 goto bail_not_ready; 1548 1539 1549 1540 /* The service is now open */ ··· 1558 1549 fail_open: 1559 1550 /* No available service, or an invalid request - send a CLOSE */ 1560 1551 if (queue_message(state, NULL, MAKE_CLOSE(0, VCHIQ_MSG_SRCPORT(msgid)), 1561 - NULL, NULL, 0, 0) == VCHIQ_RETRY) 1552 + NULL, NULL, 0, 0) == -EAGAIN) 1562 1553 goto bail_not_ready; 1563 1554 1564 1555 return 1; ··· 1697 1688 1698 1689 mark_service_closing_internal(service, 1); 1699 1690 1700 - if (vchiq_close_service_internal(service, CLOSE_RECVD) == VCHIQ_RETRY) 1691 + if (vchiq_close_service_internal(service, CLOSE_RECVD) == -EAGAIN) 1701 1692 goto bail_not_ready; 1702 1693 1703 1694 vchiq_log_info(vchiq_core_log_level, "Close Service %c%c%c%c s:%u d:%d", ··· 1714 1705 claim_slot(state->rx_info); 1715 1706 DEBUG_TRACE(PARSE_LINE); 1716 1707 if (make_service_callback(service, VCHIQ_MESSAGE_AVAILABLE, header, 1717 - NULL) == VCHIQ_RETRY) { 1708 + NULL) == -EAGAIN) { 1718 1709 DEBUG_TRACE(PARSE_LINE); 1719 1710 goto bail_not_ready; 1720 1711 } ··· 1812 1803 if (state->conn_state != VCHIQ_CONNSTATE_PAUSE_SENT) { 1813 1804 /* Send a PAUSE in response */ 1814 1805 if (queue_message(state, NULL, MAKE_PAUSE, NULL, NULL, 0, 1815 - QMFLAGS_NO_MUTEX_UNLOCK) == VCHIQ_RETRY) 1806 + QMFLAGS_NO_MUTEX_UNLOCK) == -EAGAIN) 1816 1807 goto bail_not_ready; 1817 1808 } 1818 1809 /* At this point slot_mutex is held */ ··· 1929 1920 1930 1921 case VCHIQ_CONNSTATE_PAUSING: 1931 1922 if (queue_message(state, NULL, MAKE_PAUSE, NULL, NULL, 0, 1932 - QMFLAGS_NO_MUTEX_UNLOCK) != VCHIQ_RETRY) { 1923 + QMFLAGS_NO_MUTEX_UNLOCK) != -EAGAIN) { 1933 1924 vchiq_set_conn_state(state, VCHIQ_CONNSTATE_PAUSE_SENT); 1934 1925 } else { 1935 1926 /* Retry later */ ··· 1939 1930 1940 1931 case VCHIQ_CONNSTATE_RESUMING: 1941 1932 if (queue_message(state, NULL, MAKE_RESUME, NULL, NULL, 0, 1942 - QMFLAGS_NO_MUTEX_LOCK) != VCHIQ_RETRY) { 1933 + QMFLAGS_NO_MUTEX_LOCK) != -EAGAIN) { 1943 1934 vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); 1944 1935 } else { 1945 1936 /* ··· 2095 2086 if ((service->remoteport == remoteport) && 2096 2087 (service->srvstate == VCHIQ_SRVSTATE_OPENSYNC)) { 2097 2088 if (make_service_callback(service, VCHIQ_MESSAGE_AVAILABLE, header, 2098 - NULL) == VCHIQ_RETRY) 2089 + NULL) == -EAGAIN) 2099 2090 vchiq_log_error(vchiq_sync_log_level, 2100 - "synchronous callback to service %d returns VCHIQ_RETRY", 2091 + "synchronous callback to service %d returns -EAGAIN", 2101 2092 localport); 2102 2093 } 2103 2094 break; ··· 2495 2486 return service; 2496 2487 } 2497 2488 2498 - enum vchiq_status 2489 + int 2499 2490 vchiq_open_service_internal(struct vchiq_service *service, int client_id) 2500 2491 { 2501 2492 struct vchiq_open_payload payload = { ··· 2504 2495 service->version, 2505 2496 service->version_min 2506 2497 }; 2507 - enum vchiq_status status = VCHIQ_SUCCESS; 2498 + int status = 0; 2508 2499 2509 2500 service->client_id = client_id; 2510 2501 vchiq_use_service_internal(service); ··· 2515 2506 sizeof(payload), 2516 2507 QMFLAGS_IS_BLOCKING); 2517 2508 2518 - if (status != VCHIQ_SUCCESS) 2509 + if (status) 2519 2510 return status; 2520 2511 2521 2512 /* Wait for the ACK/NAK */ 2522 2513 if (wait_for_completion_interruptible(&service->remove_event)) { 2523 - status = VCHIQ_RETRY; 2514 + status = -EAGAIN; 2524 2515 vchiq_release_service_internal(service); 2525 2516 } else if ((service->srvstate != VCHIQ_SRVSTATE_OPEN) && 2526 2517 (service->srvstate != VCHIQ_SRVSTATE_OPENSYNC)) { ··· 2530 2521 service->state->id, 2531 2522 srvstate_names[service->srvstate], 2532 2523 kref_read(&service->ref_count)); 2533 - status = VCHIQ_ERROR; 2524 + status = -EINVAL; 2534 2525 VCHIQ_SERVICE_STATS_INC(service, error_count); 2535 2526 vchiq_release_service_internal(service); 2536 2527 } ··· 2601 2592 static int 2602 2593 do_abort_bulks(struct vchiq_service *service) 2603 2594 { 2604 - enum vchiq_status status; 2595 + int status; 2605 2596 2606 2597 /* Abort any outstanding bulk transfers */ 2607 2598 if (mutex_lock_killable(&service->bulk_mutex)) ··· 2611 2602 mutex_unlock(&service->bulk_mutex); 2612 2603 2613 2604 status = notify_bulks(service, &service->bulk_tx, NO_RETRY_POLL); 2614 - if (status != VCHIQ_SUCCESS) 2605 + if (status) 2615 2606 return 0; 2616 2607 2617 2608 status = notify_bulks(service, &service->bulk_rx, NO_RETRY_POLL); 2618 - return (status == VCHIQ_SUCCESS); 2609 + return !status; 2619 2610 } 2620 2611 2621 - static enum vchiq_status 2612 + static int 2622 2613 close_service_complete(struct vchiq_service *service, int failstate) 2623 2614 { 2624 - enum vchiq_status status; 2615 + int status; 2625 2616 int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); 2626 2617 int newstate; 2627 2618 ··· 2648 2639 vchiq_log_error(vchiq_core_log_level, "%s(%x) called in state %s", __func__, 2649 2640 service->handle, srvstate_names[service->srvstate]); 2650 2641 WARN(1, "%s in unexpected state\n", __func__); 2651 - return VCHIQ_ERROR; 2642 + return -EINVAL; 2652 2643 } 2653 2644 2654 2645 status = make_service_callback(service, VCHIQ_SERVICE_CLOSED, NULL, NULL); 2655 2646 2656 - if (status != VCHIQ_RETRY) { 2647 + if (status != -EAGAIN) { 2657 2648 int uc = service->service_use_count; 2658 2649 int i; 2659 2650 /* Complete the close process */ ··· 2683 2674 } 2684 2675 2685 2676 /* Called by the slot handler */ 2686 - enum vchiq_status 2677 + int 2687 2678 vchiq_close_service_internal(struct vchiq_service *service, int close_recvd) 2688 2679 { 2689 2680 struct vchiq_state *state = service->state; 2690 - enum vchiq_status status = VCHIQ_SUCCESS; 2681 + int status = 0; 2691 2682 int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); 2692 2683 int close_id = MAKE_CLOSE(service->localport, 2693 2684 VCHIQ_MSG_DSTPORT(service->remoteport)); ··· 2705 2696 __func__, srvstate_names[service->srvstate]); 2706 2697 } else if (is_server) { 2707 2698 if (service->srvstate == VCHIQ_SRVSTATE_LISTENING) { 2708 - status = VCHIQ_ERROR; 2699 + status = -EINVAL; 2709 2700 } else { 2710 2701 service->client_id = 0; 2711 2702 service->remoteport = VCHIQ_PORT_FREE; ··· 2734 2725 case VCHIQ_SRVSTATE_OPEN: 2735 2726 if (close_recvd) { 2736 2727 if (!do_abort_bulks(service)) 2737 - status = VCHIQ_RETRY; 2728 + status = -EAGAIN; 2738 2729 } 2739 2730 2740 2731 release_service_messages(service); 2741 2732 2742 - if (status == VCHIQ_SUCCESS) 2733 + if (!status) 2743 2734 status = queue_message(state, service, close_id, NULL, 2744 2735 NULL, 0, QMFLAGS_NO_MUTEX_UNLOCK); 2745 2736 2746 - if (status != VCHIQ_SUCCESS) { 2737 + if (status) { 2747 2738 if (service->srvstate == VCHIQ_SRVSTATE_OPENSYNC) 2748 2739 mutex_unlock(&state->sync_mutex); 2749 2740 break; ··· 2773 2764 break; 2774 2765 2775 2766 if (!do_abort_bulks(service)) { 2776 - status = VCHIQ_RETRY; 2767 + status = -EAGAIN; 2777 2768 break; 2778 2769 } 2779 2770 2780 - if (status == VCHIQ_SUCCESS) 2771 + if (!status) 2781 2772 status = close_service_complete(service, VCHIQ_SRVSTATE_CLOSERECVD); 2782 2773 break; 2783 2774 ··· 2841 2832 vchiq_service_put(service); 2842 2833 } 2843 2834 2844 - enum vchiq_status 2835 + int 2845 2836 vchiq_connect_internal(struct vchiq_state *state, struct vchiq_instance *instance) 2846 2837 { 2847 2838 struct vchiq_service *service; ··· 2857 2848 2858 2849 if (state->conn_state == VCHIQ_CONNSTATE_DISCONNECTED) { 2859 2850 if (queue_message(state, NULL, MAKE_CONNECT, NULL, NULL, 0, 2860 - QMFLAGS_IS_BLOCKING) == VCHIQ_RETRY) 2861 - return VCHIQ_RETRY; 2851 + QMFLAGS_IS_BLOCKING) == -EAGAIN) 2852 + return -EAGAIN; 2862 2853 2863 2854 vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTING); 2864 2855 } 2865 2856 2866 2857 if (state->conn_state == VCHIQ_CONNSTATE_CONNECTING) { 2867 2858 if (wait_for_completion_interruptible(&state->connect)) 2868 - return VCHIQ_RETRY; 2859 + return -EAGAIN; 2869 2860 2870 2861 vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); 2871 2862 complete(&state->connect); 2872 2863 } 2873 2864 2874 - return VCHIQ_SUCCESS; 2865 + return 0; 2875 2866 } 2876 2867 2877 2868 void ··· 2888 2879 } 2889 2880 } 2890 2881 2891 - enum vchiq_status 2882 + int 2892 2883 vchiq_close_service(struct vchiq_instance *instance, unsigned int handle) 2893 2884 { 2894 2885 /* Unregister the service */ 2895 2886 struct vchiq_service *service = find_service_by_handle(instance, handle); 2896 - enum vchiq_status status = VCHIQ_SUCCESS; 2887 + int status = 0; 2897 2888 2898 2889 if (!service) 2899 - return VCHIQ_ERROR; 2890 + return -EINVAL; 2900 2891 2901 2892 vchiq_log_info(vchiq_core_log_level, "%d: close_service:%d", 2902 2893 service->state->id, service->localport); ··· 2905 2896 (service->srvstate == VCHIQ_SRVSTATE_LISTENING) || 2906 2897 (service->srvstate == VCHIQ_SRVSTATE_HIDDEN)) { 2907 2898 vchiq_service_put(service); 2908 - return VCHIQ_ERROR; 2899 + return -EINVAL; 2909 2900 } 2910 2901 2911 2902 mark_service_closing(service); 2912 2903 2913 2904 if (current == service->state->slot_handler_thread) { 2914 2905 status = vchiq_close_service_internal(service, NO_CLOSE_RECVD); 2915 - WARN_ON(status == VCHIQ_RETRY); 2906 + WARN_ON(status == -EAGAIN); 2916 2907 } else { 2917 2908 /* Mark the service for termination by the slot handler */ 2918 2909 request_poll(service->state, service, VCHIQ_POLL_TERMINATE); ··· 2920 2911 2921 2912 while (1) { 2922 2913 if (wait_for_completion_interruptible(&service->remove_event)) { 2923 - status = VCHIQ_RETRY; 2914 + status = -EAGAIN; 2924 2915 break; 2925 2916 } 2926 2917 ··· 2935 2926 srvstate_names[service->srvstate]); 2936 2927 } 2937 2928 2938 - if ((status == VCHIQ_SUCCESS) && 2929 + if (!status && 2939 2930 (service->srvstate != VCHIQ_SRVSTATE_FREE) && 2940 2931 (service->srvstate != VCHIQ_SRVSTATE_LISTENING)) 2941 - status = VCHIQ_ERROR; 2932 + status = -EINVAL; 2942 2933 2943 2934 vchiq_service_put(service); 2944 2935 ··· 2946 2937 } 2947 2938 EXPORT_SYMBOL(vchiq_close_service); 2948 2939 2949 - enum vchiq_status 2940 + int 2950 2941 vchiq_remove_service(struct vchiq_instance *instance, unsigned int handle) 2951 2942 { 2952 2943 /* Unregister the service */ 2953 2944 struct vchiq_service *service = find_service_by_handle(instance, handle); 2954 - enum vchiq_status status = VCHIQ_SUCCESS; 2945 + int status = 0; 2955 2946 2956 2947 if (!service) 2957 - return VCHIQ_ERROR; 2948 + return -EINVAL; 2958 2949 2959 2950 vchiq_log_info(vchiq_core_log_level, "%d: remove_service:%d", 2960 2951 service->state->id, service->localport); 2961 2952 2962 2953 if (service->srvstate == VCHIQ_SRVSTATE_FREE) { 2963 2954 vchiq_service_put(service); 2964 - return VCHIQ_ERROR; 2955 + return -EINVAL; 2965 2956 } 2966 2957 2967 2958 mark_service_closing(service); ··· 2975 2966 service->public_fourcc = VCHIQ_FOURCC_INVALID; 2976 2967 2977 2968 status = vchiq_close_service_internal(service, NO_CLOSE_RECVD); 2978 - WARN_ON(status == VCHIQ_RETRY); 2969 + WARN_ON(status == -EAGAIN); 2979 2970 } else { 2980 2971 /* Mark the service for removal by the slot handler */ 2981 2972 request_poll(service->state, service, VCHIQ_POLL_REMOVE); 2982 2973 } 2983 2974 while (1) { 2984 2975 if (wait_for_completion_interruptible(&service->remove_event)) { 2985 - status = VCHIQ_RETRY; 2976 + status = -EAGAIN; 2986 2977 break; 2987 2978 } 2988 2979 ··· 2996 2987 srvstate_names[service->srvstate]); 2997 2988 } 2998 2989 2999 - if ((status == VCHIQ_SUCCESS) && 3000 - (service->srvstate != VCHIQ_SRVSTATE_FREE)) 3001 - status = VCHIQ_ERROR; 2990 + if (!status && (service->srvstate != VCHIQ_SRVSTATE_FREE)) 2991 + status = -EINVAL; 3002 2992 3003 2993 vchiq_service_put(service); 3004 2994 ··· 3006 2998 3007 2999 /* 3008 3000 * This function may be called by kernel threads or user threads. 3009 - * User threads may receive VCHIQ_RETRY to indicate that a signal has been 3001 + * User threads may receive -EAGAIN to indicate that a signal has been 3010 3002 * received and the call should be retried after being returned to user 3011 3003 * context. 3012 3004 * When called in blocking mode, the userdata field points to a bulk_waiter 3013 3005 * structure. 3014 3006 */ 3015 - enum vchiq_status vchiq_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, 3016 - void *offset, void __user *uoffset, int size, void *userdata, 3017 - enum vchiq_bulk_mode mode, enum vchiq_bulk_dir dir) 3007 + int vchiq_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, 3008 + void *offset, void __user *uoffset, int size, void *userdata, 3009 + enum vchiq_bulk_mode mode, enum vchiq_bulk_dir dir) 3018 3010 { 3019 3011 struct vchiq_service *service = find_service_by_handle(instance, handle); 3020 3012 struct vchiq_bulk_queue *queue; ··· 3024 3016 const char dir_char = (dir == VCHIQ_BULK_TRANSMIT) ? 't' : 'r'; 3025 3017 const int dir_msgtype = (dir == VCHIQ_BULK_TRANSMIT) ? 3026 3018 VCHIQ_MSG_BULK_TX : VCHIQ_MSG_BULK_RX; 3027 - enum vchiq_status status = VCHIQ_ERROR; 3019 + int status = -EINVAL; 3028 3020 int payload[2]; 3029 3021 3030 3022 if (!service) ··· 3036 3028 if (!offset && !uoffset) 3037 3029 goto error_exit; 3038 3030 3039 - if (vchiq_check_service(service) != VCHIQ_SUCCESS) 3031 + if (vchiq_check_service(service)) 3040 3032 goto error_exit; 3041 3033 3042 3034 switch (mode) { ··· 3063 3055 &service->bulk_tx : &service->bulk_rx; 3064 3056 3065 3057 if (mutex_lock_killable(&service->bulk_mutex)) { 3066 - status = VCHIQ_RETRY; 3058 + status = -EAGAIN; 3067 3059 goto error_exit; 3068 3060 } 3069 3061 ··· 3072 3064 do { 3073 3065 mutex_unlock(&service->bulk_mutex); 3074 3066 if (wait_for_completion_interruptible(&service->bulk_remove_event)) { 3075 - status = VCHIQ_RETRY; 3067 + status = -EAGAIN; 3076 3068 goto error_exit; 3077 3069 } 3078 3070 if (mutex_lock_killable(&service->bulk_mutex)) { 3079 - status = VCHIQ_RETRY; 3071 + status = -EAGAIN; 3080 3072 goto error_exit; 3081 3073 } 3082 3074 } while (queue->local_insert == queue->remove + ··· 3109 3101 * claim it here to ensure that isn't happening 3110 3102 */ 3111 3103 if (mutex_lock_killable(&state->slot_mutex)) { 3112 - status = VCHIQ_RETRY; 3104 + status = -EAGAIN; 3113 3105 goto cancel_bulk_error_exit; 3114 3106 } 3115 3107 ··· 3129 3121 QMFLAGS_IS_BLOCKING | 3130 3122 QMFLAGS_NO_MUTEX_LOCK | 3131 3123 QMFLAGS_NO_MUTEX_UNLOCK); 3132 - if (status != VCHIQ_SUCCESS) 3124 + if (status) 3133 3125 goto unlock_both_error_exit; 3134 3126 3135 3127 queue->local_insert++; ··· 3144 3136 waiting: 3145 3137 vchiq_service_put(service); 3146 3138 3147 - status = VCHIQ_SUCCESS; 3139 + status = 0; 3148 3140 3149 3141 if (bulk_waiter) { 3150 3142 bulk_waiter->bulk = bulk; 3151 3143 if (wait_for_completion_interruptible(&bulk_waiter->event)) 3152 - status = VCHIQ_RETRY; 3144 + status = -EAGAIN; 3153 3145 else if (bulk_waiter->actual == VCHIQ_BULK_ACTUAL_ABORTED) 3154 - status = VCHIQ_ERROR; 3146 + status = -EINVAL; 3155 3147 } 3156 3148 3157 3149 return status; ··· 3169 3161 return status; 3170 3162 } 3171 3163 3172 - enum vchiq_status 3164 + int 3173 3165 vchiq_queue_message(struct vchiq_instance *instance, unsigned int handle, 3174 3166 ssize_t (*copy_callback)(void *context, void *dest, 3175 3167 size_t offset, size_t maxsize), ··· 3177 3169 size_t size) 3178 3170 { 3179 3171 struct vchiq_service *service = find_service_by_handle(instance, handle); 3180 - enum vchiq_status status = VCHIQ_ERROR; 3172 + int status = -EINVAL; 3181 3173 int data_id; 3182 3174 3183 3175 if (!service) 3184 3176 goto error_exit; 3185 3177 3186 - if (vchiq_check_service(service) != VCHIQ_SUCCESS) 3178 + if (vchiq_check_service(service)) 3187 3179 goto error_exit; 3188 3180 3189 3181 if (!size) { ··· 3208 3200 copy_callback, context, size, 1); 3209 3201 break; 3210 3202 default: 3211 - status = VCHIQ_ERROR; 3203 + status = -EINVAL; 3212 3204 break; 3213 3205 } 3214 3206 ··· 3222 3214 int vchiq_queue_kernel_message(struct vchiq_instance *instance, unsigned int handle, void *data, 3223 3215 unsigned int size) 3224 3216 { 3225 - enum vchiq_status status; 3217 + int status; 3226 3218 3227 3219 while (1) { 3228 3220 status = vchiq_queue_message(instance, handle, memcpy_copy_callback, 3229 3221 data, size); 3230 3222 3231 3223 /* 3232 - * vchiq_queue_message() may return VCHIQ_RETRY, so we need to 3224 + * vchiq_queue_message() may return -EAGAIN, so we need to 3233 3225 * implement a retry mechanism since this function is supposed 3234 3226 * to block until queued 3235 3227 */ 3236 - if (status != VCHIQ_RETRY) 3228 + if (status != -EAGAIN) 3237 3229 break; 3238 3230 3239 3231 msleep(1); ··· 3285 3277 remote_event_signal(&state->remote->sync_release); 3286 3278 } 3287 3279 3288 - enum vchiq_status 3280 + int 3289 3281 vchiq_get_peer_version(struct vchiq_instance *instance, unsigned int handle, short *peer_version) 3290 3282 { 3291 - enum vchiq_status status = VCHIQ_ERROR; 3283 + int status = -EINVAL; 3292 3284 struct vchiq_service *service = find_service_by_handle(instance, handle); 3293 3285 3294 3286 if (!service) 3295 3287 goto exit; 3296 3288 3297 - if (vchiq_check_service(service) != VCHIQ_SUCCESS) 3289 + if (vchiq_check_service(service)) 3298 3290 goto exit; 3299 3291 3300 3292 if (!peer_version) 3301 3293 goto exit; 3302 3294 3303 3295 *peer_version = service->peer_version; 3304 - status = VCHIQ_SUCCESS; 3296 + status = 0; 3305 3297 3306 3298 exit: 3307 3299 if (service) ··· 3648 3640 "============================================================================"); 3649 3641 } 3650 3642 3651 - enum vchiq_status vchiq_send_remote_use(struct vchiq_state *state) 3643 + int vchiq_send_remote_use(struct vchiq_state *state) 3652 3644 { 3653 3645 if (state->conn_state == VCHIQ_CONNSTATE_DISCONNECTED) 3654 - return VCHIQ_RETRY; 3646 + return -ENOTCONN; 3655 3647 3656 3648 return queue_message(state, NULL, MAKE_REMOTE_USE, NULL, NULL, 0, 0); 3657 3649 } 3658 3650 3659 - enum vchiq_status vchiq_send_remote_use_active(struct vchiq_state *state) 3651 + int vchiq_send_remote_use_active(struct vchiq_state *state) 3660 3652 { 3661 3653 if (state->conn_state == VCHIQ_CONNSTATE_DISCONNECTED) 3662 - return VCHIQ_RETRY; 3654 + return -ENOTCONN; 3663 3655 3664 3656 return queue_message(state, NULL, MAKE_REMOTE_USE_ACTIVE, 3665 3657 NULL, NULL, 0, 0);

+28 -10

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h

··· 10 10 #include <linux/kref.h> 11 11 #include <linux/rcupdate.h> 12 12 #include <linux/wait.h> 13 - #include <linux/raspberrypi/vchiq.h> 14 13 14 + #include "../../include/linux/raspberrypi/vchiq.h" 15 15 #include "vchiq_cfg.h" 16 16 17 17 /* Do this so that we can test-build the code on non-rpi systems */ ··· 166 166 struct vchiq_bulk bulks[VCHIQ_NUM_SERVICE_BULKS]; 167 167 }; 168 168 169 + /* 170 + * Remote events provide a way of presenting several virtual doorbells to a 171 + * peer (ARM host to VPU) using only one physical doorbell. They can be thought 172 + * of as a way for the peer to signal a semaphore, in this case implemented as 173 + * a workqueue. 174 + * 175 + * Remote events remain signalled until acknowledged by the receiver, and they 176 + * are non-counting. They are designed in such a way as to minimise the number 177 + * of interrupts and avoid unnecessary waiting. 178 + * 179 + * A remote_event is as small data structures that live in shared memory. It 180 + * comprises two booleans - armed and fired: 181 + * 182 + * The sender sets fired when they signal the receiver. 183 + * If fired is set, the receiver has been signalled and need not wait. 184 + * The receiver sets the armed field before they begin to wait. 185 + * If armed is set, the receiver is waiting and wishes to be woken by interrupt. 186 + */ 169 187 struct remote_event { 170 188 int armed; 171 189 int fired; ··· 476 458 extern int 477 459 vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero, struct device *dev); 478 460 479 - extern enum vchiq_status 461 + extern int 480 462 vchiq_connect_internal(struct vchiq_state *state, struct vchiq_instance *instance); 481 463 482 464 struct vchiq_service * ··· 485 467 int srvstate, struct vchiq_instance *instance, 486 468 void (*userdata_term)(void *userdata)); 487 469 488 - extern enum vchiq_status 470 + extern int 489 471 vchiq_open_service_internal(struct vchiq_service *service, int client_id); 490 472 491 - extern enum vchiq_status 473 + extern int 492 474 vchiq_close_service_internal(struct vchiq_service *service, int close_recvd); 493 475 494 476 extern void ··· 503 485 extern void 504 486 remote_event_pollall(struct vchiq_state *state); 505 487 506 - extern enum vchiq_status 488 + extern int 507 489 vchiq_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *offset, 508 490 void __user *uoffset, int size, void *userdata, enum vchiq_bulk_mode mode, 509 491 enum vchiq_bulk_dir dir); ··· 554 536 extern void 555 537 vchiq_service_put(struct vchiq_service *service); 556 538 557 - extern enum vchiq_status 539 + extern int 558 540 vchiq_queue_message(struct vchiq_instance *instance, unsigned int handle, 559 541 ssize_t (*copy_callback)(void *context, void *dest, 560 542 size_t offset, size_t maxsize), ··· 586 568 587 569 int vchiq_platform_init_state(struct vchiq_state *state); 588 570 589 - enum vchiq_status vchiq_check_service(struct vchiq_service *service); 571 + int vchiq_check_service(struct vchiq_service *service); 590 572 591 573 void vchiq_on_remote_use_active(struct vchiq_state *state); 592 574 593 - enum vchiq_status vchiq_send_remote_use(struct vchiq_state *state); 575 + int vchiq_send_remote_use(struct vchiq_state *state); 594 576 595 - enum vchiq_status vchiq_send_remote_use_active(struct vchiq_state *state); 577 + int vchiq_send_remote_use_active(struct vchiq_state *state); 596 578 597 579 void vchiq_platform_conn_state_changed(struct vchiq_state *state, 598 580 enum vchiq_connstate oldstate, ··· 602 584 603 585 void vchiq_log_dump_mem(const char *label, u32 addr, const void *void_mem, size_t num_bytes); 604 586 605 - enum vchiq_status vchiq_remove_service(struct vchiq_instance *instance, unsigned int service); 587 + int vchiq_remove_service(struct vchiq_instance *instance, unsigned int service); 606 588 607 589 int vchiq_get_client_id(struct vchiq_instance *instance, unsigned int service); 608 590

+18 -18

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c

··· 112 112 struct vchiq_element *elements, unsigned long count) 113 113 { 114 114 struct vchiq_io_copy_callback_context context; 115 - enum vchiq_status status = VCHIQ_SUCCESS; 115 + int status = 0; 116 116 unsigned long i; 117 117 size_t total_size = 0; 118 118 ··· 130 130 status = vchiq_queue_message(instance, handle, vchiq_ioc_copy_element_data, 131 131 &context, total_size); 132 132 133 - if (status == VCHIQ_ERROR) 133 + if (status == -EINVAL) 134 134 return -EIO; 135 - else if (status == VCHIQ_RETRY) 135 + else if (status == -EAGAIN) 136 136 return -EINTR; 137 137 return 0; 138 138 } ··· 142 142 { 143 143 struct user_service *user_service = NULL; 144 144 struct vchiq_service *service; 145 - enum vchiq_status status = VCHIQ_SUCCESS; 145 + int status = 0; 146 146 struct vchiq_service_params_kernel params; 147 147 int srvstate; 148 148 ··· 190 190 191 191 if (args->is_open) { 192 192 status = vchiq_open_service_internal(service, instance->pid); 193 - if (status != VCHIQ_SUCCESS) { 193 + if (status) { 194 194 vchiq_remove_service(instance, service->handle); 195 - return (status == VCHIQ_RETRY) ? 195 + return (status == -EAGAIN) ? 196 196 -EINTR : -EIO; 197 197 } 198 198 } ··· 338 338 goto out; 339 339 } 340 340 341 - if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || 341 + if ((status != -EAGAIN) || fatal_signal_pending(current) || 342 342 !waiter->bulk_waiter.bulk) { 343 343 if (waiter->bulk_waiter.bulk) { 344 344 /* Cancel the signal when the transfer completes. */ ··· 364 364 vchiq_service_put(service); 365 365 if (ret) 366 366 return ret; 367 - else if (status == VCHIQ_ERROR) 367 + else if (status == -EINVAL) 368 368 return -EIO; 369 - else if (status == VCHIQ_RETRY) 369 + else if (status == -EAGAIN) 370 370 return -EINTR; 371 371 return 0; 372 372 } ··· 577 577 vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 578 578 { 579 579 struct vchiq_instance *instance = file->private_data; 580 - enum vchiq_status status = VCHIQ_SUCCESS; 580 + int status = 0; 581 581 struct vchiq_service *service = NULL; 582 582 long ret = 0; 583 583 int i, rc; ··· 598 598 instance, &i))) { 599 599 status = vchiq_remove_service(instance, service->handle); 600 600 vchiq_service_put(service); 601 - if (status != VCHIQ_SUCCESS) 601 + if (status) 602 602 break; 603 603 } 604 604 service = NULL; 605 605 606 - if (status == VCHIQ_SUCCESS) { 606 + if (!status) { 607 607 /* Wake the completion thread and ask it to exit */ 608 608 instance->closing = 1; 609 609 complete(&instance->insert_event); ··· 627 627 status = vchiq_connect_internal(instance->state, instance); 628 628 mutex_unlock(&instance->state->mutex); 629 629 630 - if (status == VCHIQ_SUCCESS) 630 + if (!status) 631 631 instance->connected = 1; 632 632 else 633 633 vchiq_log_error(vchiq_arm_log_level, ··· 675 675 status = (cmd == VCHIQ_IOC_CLOSE_SERVICE) ? 676 676 vchiq_close_service(instance, service->handle) : 677 677 vchiq_remove_service(instance, service->handle); 678 - if (status != VCHIQ_SUCCESS) 678 + if (status) 679 679 break; 680 680 } 681 681 ··· 686 686 */ 687 687 if (user_service->close_pending && 688 688 wait_for_completion_interruptible(&user_service->close_event)) 689 - status = VCHIQ_RETRY; 689 + status = -EAGAIN; 690 690 break; 691 691 } 692 692 ··· 862 862 vchiq_service_put(service); 863 863 864 864 if (ret == 0) { 865 - if (status == VCHIQ_ERROR) 865 + if (status == -EINVAL) 866 866 ret = -EIO; 867 - else if (status == VCHIQ_RETRY) 867 + else if (status == -EAGAIN) 868 868 ret = -EINTR; 869 869 } 870 870 871 - if ((status == VCHIQ_SUCCESS) && (ret < 0) && (ret != -EINTR) && (ret != -EWOULDBLOCK)) 871 + if (!status && (ret < 0) && (ret != -EINTR) && (ret != -EWOULDBLOCK)) 872 872 vchiq_log_info(vchiq_arm_log_level, 873 873 " ioctl instance %pK, cmd %s -> status %d, %ld", 874 874 instance, (_IOC_NR(cmd) <= VCHIQ_IOC_MAX) ?

+6 -5

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h

··· 5 5 #define VCHIQ_IOCTLS_H 6 6 7 7 #include <linux/ioctl.h> 8 - #include <linux/raspberrypi/vchiq.h> 8 + 9 + #include "../../include/linux/raspberrypi/vchiq.h" 9 10 10 11 #define VCHIQ_IOC_MAGIC 0xc4 11 12 #define VCHIQ_INVALID_HANDLE (~0) 12 13 13 14 struct vchiq_service_params { 14 15 int fourcc; 15 - enum vchiq_status __user (*callback)(enum vchiq_reason reason, 16 - struct vchiq_header *header, 17 - unsigned int handle, 18 - void *bulk_userdata); 16 + int __user (*callback)(enum vchiq_reason reason, 17 + struct vchiq_header *header, 18 + unsigned int handle, 19 + void *bulk_userdata); 19 20 void __user *userdata; 20 21 short version; /* Increment for non-trivial changes */ 21 22 short version_min; /* Update for incompatible changes */

-5

drivers/staging/vc04_services/vchiq-mmal/Makefile

··· 2 2 bcm2835-mmal-vchiq-objs := mmal-vchiq.o 3 3 4 4 obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += bcm2835-mmal-vchiq.o 5 - 6 - ccflags-y += \ 7 - -I$(srctree)/$(src)/.. \ 8 - -I$(srctree)/$(src)/../include \ 9 - -D__VCCOREVER__=0x04000000

+7 -8

drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c

··· 23 23 #include <linux/slab.h> 24 24 #include <linux/completion.h> 25 25 #include <linux/vmalloc.h> 26 - #include <linux/raspberrypi/vchiq.h> 27 26 #include <media/videobuf2-vmalloc.h> 28 27 28 + #include "../include/linux/raspberrypi/vchiq.h" 29 29 #include "mmal-common.h" 30 30 #include "mmal-vchiq.h" 31 31 #include "mmal-msg.h" ··· 245 245 /* workqueue scheduled callback 246 246 * 247 247 * we do this because it is important we do not call any other vchiq 248 - * sync calls from witin the message delivery thread 248 + * sync calls from within the message delivery thread 249 249 */ 250 250 static void buffer_work_cb(struct work_struct *work) 251 251 { ··· 548 548 } 549 549 550 550 /* incoming event service callback */ 551 - static enum vchiq_status service_callback(struct vchiq_instance *vchiq_instance, 552 - enum vchiq_reason reason, 553 - struct vchiq_header *header, 554 - unsigned int handle, void *bulk_ctx) 551 + static int service_callback(struct vchiq_instance *vchiq_instance, 552 + enum vchiq_reason reason, struct vchiq_header *header, 553 + unsigned int handle, void *bulk_ctx) 555 554 { 556 555 struct vchiq_mmal_instance *instance = vchiq_get_service_userdata(vchiq_instance, handle); 557 556 u32 msg_len; ··· 559 560 560 561 if (!instance) { 561 562 pr_err("Message callback passed NULL instance\n"); 562 - return VCHIQ_SUCCESS; 563 + return 0; 563 564 } 564 565 565 566 switch (reason) { ··· 643 644 break; 644 645 } 645 646 646 - return VCHIQ_SUCCESS; 647 + return 0; 647 648 } 648 649 649 650 static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance,

+14 -12

drivers/staging/vme_user/vme.h

··· 2 2 #ifndef _VME_H_ 3 3 #define _VME_H_ 4 4 5 + #include <linux/bitops.h> 6 + 5 7 /* Resource Type */ 6 8 enum vme_resource_type { 7 9 VME_MASTER, ··· 56 54 #define VME_R_ROBIN_MODE 0x1 57 55 #define VME_PRIORITY_MODE 0x2 58 56 59 - #define VME_DMA_PATTERN (1<<0) 60 - #define VME_DMA_PCI (1<<1) 61 - #define VME_DMA_VME (1<<2) 57 + #define VME_DMA_PATTERN BIT(0) 58 + #define VME_DMA_PCI BIT(1) 59 + #define VME_DMA_VME BIT(2) 62 60 63 - #define VME_DMA_PATTERN_BYTE (1<<0) 64 - #define VME_DMA_PATTERN_WORD (1<<1) 65 - #define VME_DMA_PATTERN_INCREMENT (1<<2) 61 + #define VME_DMA_PATTERN_BYTE BIT(0) 62 + #define VME_DMA_PATTERN_WORD BIT(1) 63 + #define VME_DMA_PATTERN_INCREMENT BIT(2) 66 64 67 - #define VME_DMA_VME_TO_MEM (1<<0) 68 - #define VME_DMA_MEM_TO_VME (1<<1) 69 - #define VME_DMA_VME_TO_VME (1<<2) 70 - #define VME_DMA_MEM_TO_MEM (1<<3) 71 - #define VME_DMA_PATTERN_TO_VME (1<<4) 72 - #define VME_DMA_PATTERN_TO_MEM (1<<5) 65 + #define VME_DMA_VME_TO_MEM BIT(0) 66 + #define VME_DMA_MEM_TO_VME BIT(1) 67 + #define VME_DMA_VME_TO_VME BIT(2) 68 + #define VME_DMA_MEM_TO_MEM BIT(3) 69 + #define VME_DMA_PATTERN_TO_VME BIT(4) 70 + #define VME_DMA_PATTERN_TO_MEM BIT(5) 73 71 74 72 struct vme_dma_attr { 75 73 u32 type;

+18 -18

drivers/staging/vme_user/vme_bridge.h

··· 4 4 5 5 #include "vme.h" 6 6 7 - #define VME_CRCSR_BUF_SIZE (508*1024) 7 + #define VME_CRCSR_BUF_SIZE (508 * 1024) 8 8 /* 9 9 * Resource structures 10 10 */ ··· 84 84 unsigned long long end; /* End of error window */ 85 85 unsigned long long first_error; /* Address of the first error */ 86 86 u32 aspace; /* Address space of error window*/ 87 - unsigned num_errors; /* Number of errors */ 87 + unsigned int num_errors; /* Number of errors */ 88 88 }; 89 89 90 90 struct vme_callback { ··· 128 128 struct mutex irq_mtx; 129 129 130 130 /* Slave Functions */ 131 - int (*slave_get) (struct vme_slave_resource *, int *, 131 + int (*slave_get)(struct vme_slave_resource *, int *, 132 132 unsigned long long *, unsigned long long *, dma_addr_t *, 133 133 u32 *, u32 *); 134 - int (*slave_set) (struct vme_slave_resource *, int, unsigned long long, 134 + int (*slave_set)(struct vme_slave_resource *, int, unsigned long long, 135 135 unsigned long long, dma_addr_t, u32, u32); 136 136 137 137 /* Master Functions */ 138 - int (*master_get) (struct vme_master_resource *, int *, 138 + int (*master_get)(struct vme_master_resource *, int *, 139 139 unsigned long long *, unsigned long long *, u32 *, u32 *, 140 140 u32 *); 141 - int (*master_set) (struct vme_master_resource *, int, 141 + int (*master_set)(struct vme_master_resource *, int, 142 142 unsigned long long, unsigned long long, u32, u32, u32); 143 - ssize_t (*master_read) (struct vme_master_resource *, void *, size_t, 143 + ssize_t (*master_read)(struct vme_master_resource *, void *, size_t, 144 144 loff_t); 145 - ssize_t (*master_write) (struct vme_master_resource *, void *, size_t, 145 + ssize_t (*master_write)(struct vme_master_resource *, void *, size_t, 146 146 loff_t); 147 - unsigned int (*master_rmw) (struct vme_master_resource *, unsigned int, 147 + unsigned int (*master_rmw)(struct vme_master_resource *, unsigned int, 148 148 unsigned int, unsigned int, loff_t); 149 149 150 150 /* DMA Functions */ 151 - int (*dma_list_add) (struct vme_dma_list *, struct vme_dma_attr *, 151 + int (*dma_list_add)(struct vme_dma_list *, struct vme_dma_attr *, 152 152 struct vme_dma_attr *, size_t); 153 - int (*dma_list_exec) (struct vme_dma_list *); 154 - int (*dma_list_empty) (struct vme_dma_list *); 153 + int (*dma_list_exec)(struct vme_dma_list *); 154 + int (*dma_list_empty)(struct vme_dma_list *); 155 155 156 156 /* Interrupt Functions */ 157 - void (*irq_set) (struct vme_bridge *, int, int, int); 158 - int (*irq_generate) (struct vme_bridge *, int, int); 157 + void (*irq_set)(struct vme_bridge *, int, int, int); 158 + int (*irq_generate)(struct vme_bridge *, int, int); 159 159 160 160 /* Location monitor functions */ 161 - int (*lm_set) (struct vme_lm_resource *, unsigned long long, u32, u32); 162 - int (*lm_get) (struct vme_lm_resource *, unsigned long long *, u32 *, 161 + int (*lm_set)(struct vme_lm_resource *, unsigned long long, u32, u32); 162 + int (*lm_get)(struct vme_lm_resource *, unsigned long long *, u32 *, 163 163 u32 *); 164 164 int (*lm_attach)(struct vme_lm_resource *, int, 165 165 void (*callback)(void *), void *); 166 - int (*lm_detach) (struct vme_lm_resource *, int); 166 + int (*lm_detach)(struct vme_lm_resource *, int); 167 167 168 168 /* CR/CSR space functions */ 169 - int (*slot_get) (struct vme_bridge *); 169 + int (*slot_get)(struct vme_bridge *); 170 170 171 171 /* Bridge parent interface */ 172 172 void *(*alloc_consistent)(struct device *dev, size_t size,

-171

drivers/staging/wlan-ng/hfa384x.h

··· 904 904 *-------------------------------------------------------------------- 905 905 */ 906 906 907 - struct hfa384x_pdr_pcb_partnum { 908 - u8 num[8]; 909 - } __packed; 910 - 911 - struct hfa384x_pdr_pcb_tracenum { 912 - u8 num[8]; 913 - } __packed; 914 - 915 - struct hfa384x_pdr_nic_serial { 916 - u8 num[12]; 917 - } __packed; 918 - 919 - struct hfa384x_pdr_mkk_measurements { 920 - double carrier_freq; 921 - double occupied_band; 922 - double power_density; 923 - double tx_spur_f1; 924 - double tx_spur_f2; 925 - double tx_spur_f3; 926 - double tx_spur_f4; 927 - double tx_spur_l1; 928 - double tx_spur_l2; 929 - double tx_spur_l3; 930 - double tx_spur_l4; 931 - double rx_spur_f1; 932 - double rx_spur_f2; 933 - double rx_spur_l1; 934 - double rx_spur_l2; 935 - } __packed; 936 - 937 - struct hfa384x_pdr_nic_ramsize { 938 - u8 size[12]; /* units of KB */ 939 - } __packed; 940 - 941 907 struct hfa384x_pdr_mfisuprange { 942 908 u16 id; 943 909 u16 variant; ··· 925 959 u16 minor; 926 960 } __packed; 927 961 928 - struct hfa384x_pdr_refdac_measurements { 929 - u16 value[0]; 930 - } __packed; 931 - 932 - struct hfa384x_pdr_vgdac_measurements { 933 - u16 value[0]; 934 - } __packed; 935 - 936 - struct hfa384x_pdr_level_comp_measurements { 937 - u16 value[0]; 938 - } __packed; 939 - 940 - struct hfa384x_pdr_mac_address { 941 - u8 addr[6]; 942 - } __packed; 943 - 944 - struct hfa384x_pdr_mkk_callname { 945 - u8 callname[8]; 946 - } __packed; 947 - 948 - struct hfa384x_pdr_regdomain { 949 - u16 numdomains; 950 - u16 domain[5]; 951 - } __packed; 952 - 953 - struct hfa384x_pdr_allowed_channel { 954 - u16 ch_bitmap; 955 - } __packed; 956 - 957 - struct hfa384x_pdr_default_channel { 958 - u16 channel; 959 - } __packed; 960 - 961 - struct hfa384x_pdr_privacy_option { 962 - u16 available; 963 - } __packed; 964 - 965 - struct hfa384x_pdr_temptype { 966 - u16 type; 967 - } __packed; 968 - 969 - struct hfa384x_pdr_refdac_setup { 970 - u16 ch_value[14]; 971 - } __packed; 972 - 973 - struct hfa384x_pdr_vgdac_setup { 974 - u16 ch_value[14]; 975 - } __packed; 976 - 977 - struct hfa384x_pdr_level_comp_setup { 978 - u16 ch_value[14]; 979 - } __packed; 980 - 981 - struct hfa384x_pdr_trimdac_setup { 982 - u16 trimidac; 983 - u16 trimqdac; 984 - } __packed; 985 - 986 - struct hfa384x_pdr_ifr_setting { 987 - u16 value[3]; 988 - } __packed; 989 - 990 - struct hfa384x_pdr_rfr_setting { 991 - u16 value[3]; 992 - } __packed; 993 - 994 - struct hfa384x_pdr_hfa3861_baseline { 995 - u16 value[50]; 996 - } __packed; 997 - 998 - struct hfa384x_pdr_hfa3861_shadow { 999 - u32 value[32]; 1000 - } __packed; 1001 - 1002 - struct hfa384x_pdr_hfa3861_ifrf { 1003 - u32 value[20]; 1004 - } __packed; 1005 - 1006 - struct hfa384x_pdr_hfa3861_chcalsp { 1007 - u16 value[14]; 1008 - } __packed; 1009 - 1010 - struct hfa384x_pdr_hfa3861_chcali { 1011 - u16 value[17]; 1012 - } __packed; 1013 - 1014 - struct hfa384x_pdr_hfa3861_nic_config { 1015 - u16 config_bitmap; 1016 - } __packed; 1017 - 1018 - struct hfa384x_pdr_hfo_delay { 1019 - u8 hfo_delay; 1020 - } __packed; 1021 - 1022 - struct hfa384x_pdr_hfa3861_manf_testsp { 1023 - u16 value[30]; 1024 - } __packed; 1025 - 1026 - struct hfa384x_pdr_hfa3861_manf_testi { 1027 - u16 value[30]; 1028 - } __packed; 1029 - 1030 - struct hfa384x_pdr_end_of_pda { 1031 - u16 crc; 1032 - } __packed; 1033 - 1034 962 struct hfa384x_pdrec { 1035 963 __le16 len; /* in words */ 1036 964 __le16 code; 1037 965 union pdr { 1038 - struct hfa384x_pdr_pcb_partnum pcb_partnum; 1039 - struct hfa384x_pdr_pcb_tracenum pcb_tracenum; 1040 - struct hfa384x_pdr_nic_serial nic_serial; 1041 - struct hfa384x_pdr_mkk_measurements mkk_measurements; 1042 - struct hfa384x_pdr_nic_ramsize nic_ramsize; 1043 966 struct hfa384x_pdr_mfisuprange mfisuprange; 1044 967 struct hfa384x_pdr_cfisuprange cfisuprange; 1045 968 struct hfa384x_pdr_nicid nicid; 1046 - struct hfa384x_pdr_refdac_measurements refdac_measurements; 1047 - struct hfa384x_pdr_vgdac_measurements vgdac_measurements; 1048 - struct hfa384x_pdr_level_comp_measurements level_compc_measurements; 1049 - struct hfa384x_pdr_mac_address mac_address; 1050 - struct hfa384x_pdr_mkk_callname mkk_callname; 1051 - struct hfa384x_pdr_regdomain regdomain; 1052 - struct hfa384x_pdr_allowed_channel allowed_channel; 1053 - struct hfa384x_pdr_default_channel default_channel; 1054 - struct hfa384x_pdr_privacy_option privacy_option; 1055 - struct hfa384x_pdr_temptype temptype; 1056 - struct hfa384x_pdr_refdac_setup refdac_setup; 1057 - struct hfa384x_pdr_vgdac_setup vgdac_setup; 1058 - struct hfa384x_pdr_level_comp_setup level_comp_setup; 1059 - struct hfa384x_pdr_trimdac_setup trimdac_setup; 1060 - struct hfa384x_pdr_ifr_setting ifr_setting; 1061 - struct hfa384x_pdr_rfr_setting rfr_setting; 1062 - struct hfa384x_pdr_hfa3861_baseline hfa3861_baseline; 1063 - struct hfa384x_pdr_hfa3861_shadow hfa3861_shadow; 1064 - struct hfa384x_pdr_hfa3861_ifrf hfa3861_ifrf; 1065 - struct hfa384x_pdr_hfa3861_chcalsp hfa3861_chcalsp; 1066 - struct hfa384x_pdr_hfa3861_chcali hfa3861_chcali; 1067 - struct hfa384x_pdr_hfa3861_nic_config nic_config; 1068 - struct hfa384x_pdr_hfo_delay hfo_delay; 1069 - struct hfa384x_pdr_hfa3861_manf_testsp hfa3861_manf_testsp; 1070 - struct hfa384x_pdr_hfa3861_manf_testi hfa3861_manf_testi; 1071 - struct hfa384x_pdr_end_of_pda end_of_pda; 1072 969 1073 970 } data; 1074 971 } __packed;

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