Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
s390/pci: externalize the SIC operation controls and routine
A subsequent patch will be issuing SIC from KVM -- export the necessary
routine and make the operation control definitions available from a header.
Because the routine will now be exported, let's rename __zpci_set_irq_ctrl
to zpci_set_irq_ctrl and get rid of the zero'd iib wrapper function of
the same name.
Reviewed-by: Niklas Schnelle <schnelle@linux.ibm.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>
Link: https://lore.kernel.org/r/20220606203325.110625-8-mjrosato@linux.ibm.com
Signed-off-by: Christian Borntraeger <borntraeger@linux.ibm.com>
authored by
Matthew Rosato
and committed by
Christian Borntraeger
062f0024
932b6467
+23
-23
+9
-8
arch/s390/include/asm/pci_insn.h
+9
-8
arch/s390/include/asm/pci_insn.h
···
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u32 gd;
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} __packed __aligned(8);
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+
/* Set Interruption Controls Operation Controls */
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+
#define SIC_IRQ_MODE_ALL 0
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+
#define SIC_IRQ_MODE_SINGLE 1
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+
#define SIC_IRQ_MODE_DIRECT 4
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+
#define SIC_IRQ_MODE_D_ALL 16
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+
#define SIC_IRQ_MODE_D_SINGLE 17
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+
#define SIC_IRQ_MODE_SET_CPU 18
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+
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/* directed interruption information block */
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struct zpci_diib {
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u32 : 1;
···
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int zpci_store(const volatile void __iomem *addr, u64 data, unsigned long len);
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int __zpci_store_block(const u64 *data, u64 req, u64 offset);
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void zpci_barrier(void);
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-
int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
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-
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-
static inline int zpci_set_irq_ctrl(u16 ctl, u8 isc)
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-
{
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-
union zpci_sic_iib iib = {{0}};
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-
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-
return __zpci_set_irq_ctrl(ctl, isc, &iib);
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-
}
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+
int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
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#endif
+2
-1
arch/s390/pci/pci_insn.c
+2
-1
arch/s390/pci/pci_insn.c
···
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}
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/* Set Interruption Controls */
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-
int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
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+
int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
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{
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if (!test_facility(72))
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return -EIO;
···
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return 0;
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}
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+
EXPORT_SYMBOL_GPL(zpci_set_irq_ctrl);
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/* PCI Load */
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static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
+12
-14
arch/s390/pci/pci_irq.c
+12
-14
arch/s390/pci/pci_irq.c
···
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static enum {FLOATING, DIRECTED} irq_delivery;
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-
#define SIC_IRQ_MODE_ALL 0
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#define SIC_IRQ_MODE_SINGLE 1
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-
#define SIC_IRQ_MODE_DIRECT 4
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-
#define SIC_IRQ_MODE_D_ALL 16
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-
#define SIC_IRQ_MODE_D_SINGLE 17
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-
#define SIC_IRQ_MODE_SET_CPU 18
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-
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/*
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* summary bit vector
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* FLOATING - summary bit per function
···
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static void zpci_handle_cpu_local_irq(bool rescan)
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{
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struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
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+
union zpci_sic_iib iib = {{0}};
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unsigned long bit;
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int irqs_on = 0;
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···
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/* End of second scan with interrupts on. */
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break;
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/* First scan complete, reenable interrupts. */
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-
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC))
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+
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &iib))
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break;
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bit = 0;
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continue;
···
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static void zpci_handle_fallback_irq(void)
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{
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struct cpu_irq_data *cpu_data;
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+
union zpci_sic_iib iib = {{0}};
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unsigned long cpu;
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int irqs_on = 0;
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···
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/* End of second scan with interrupts on. */
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break;
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/* First scan complete, reenable interrupts. */
201
-
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
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+
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
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break;
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cpu = 0;
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continue;
···
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static void zpci_floating_irq_handler(struct airq_struct *airq,
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struct tpi_info *tpi_info)
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{
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+
union zpci_sic_iib iib = {{0}};
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unsigned long si, ai;
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struct airq_iv *aibv;
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int irqs_on = 0;
···
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/* End of second scan with interrupts on. */
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break;
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/* First scan complete, reenable interrupts. */
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-
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
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+
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
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break;
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si = 0;
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continue;
···
403
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static void __init cpu_enable_directed_irq(void *unused)
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{
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union zpci_sic_iib iib = {{0}};
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+
union zpci_sic_iib ziib = {{0}};
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iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector;
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-
__zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
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-
zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC);
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+
zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
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+
zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &ziib);
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}
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static int __init zpci_directed_irq_init(void)
···
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iib.diib.isc = PCI_ISC;
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iib.diib.nr_cpus = num_possible_cpus();
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iib.diib.disb_addr = virt_to_phys(zpci_sbv->vector);
426
-
__zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
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+
zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
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zpci_ibv = kcalloc(num_possible_cpus(), sizeof(*zpci_ibv),
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GFP_KERNEL);
···
468
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int __init zpci_irq_init(void)
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{
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+
union zpci_sic_iib iib = {{0}};
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int rc;
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irq_delivery = sclp.has_dirq ? DIRECTED : FLOATING;
···
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* Enable floating IRQs (with suppression after one IRQ). When using
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* directed IRQs this enables the fallback path.
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*/
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-
zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC);
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+
zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib);
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return 0;
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out_airq: