tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

- SPsel register initialisation on reset as the architecture defines
its state as unknown

- Use READ_ONCE when dereferencing pmd_t pointers to avoid race
conditions in page_vma_mapped_walk() (or fast GUP) with concurrent
modifications of the page table

- Avoid invoking the mm fault handling code for kernel addresses (check
against TASK_SIZE) which would otherwise result in calling
might_sleep() in atomic context

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: fault: Route pte translation faults via do_translation_fault
arm64: mm: Use READ_ONCE when dereferencing pointer to pte table
arm64: Make sure SPsel is always set

Linus Torvalds 06482600 9f2a5128

+3 -2
+1 -1
arch/arm64/include/asm/pgtable.h
··· 401 401 /* Find an entry in the third-level page table. */ 402 402 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 403 403 404 - #define pte_offset_phys(dir,addr) (pmd_page_paddr(*(dir)) + pte_index(addr) * sizeof(pte_t)) 404 + #define pte_offset_phys(dir,addr) (pmd_page_paddr(READ_ONCE(*(dir))) + pte_index(addr) * sizeof(pte_t)) 405 405 #define pte_offset_kernel(dir,addr) ((pte_t *)__va(pte_offset_phys((dir), (addr)))) 406 406 407 407 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
+1
arch/arm64/kernel/head.S
··· 384 384 * booted in EL1 or EL2 respectively. 385 385 */ 386 386 ENTRY(el2_setup) 387 + msr SPsel, #1 // We want to use SP_EL{1,2} 387 388 mrs x0, CurrentEL 388 389 cmp x0, #CurrentEL_EL2 389 390 b.eq 1f
+1 -1
arch/arm64/mm/fault.c
··· 651 651 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 652 652 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 653 653 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 654 - { do_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 654 + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 655 655 { do_bad, SIGBUS, 0, "unknown 8" }, 656 656 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 657 657 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },