tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'fbdev-for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/linux-fbdev

Pull fbdev updates from Helge Deller:
"Beside the usual bunch of smaller bug fixes, the majority of changes
were by Zsolt Kajtar to improve the s3fb driver.

Bug fixes:
- Bounds checking to fix vmalloc-out-of-bounds (Albin Babu Varghese)
- Fix logic error in "offb" name match (Finn Thain)
- simplefb: Fix use after free in (Janne Grunau)
- s3fb: Various fixes and powersave improvements (Zsolt Kajtar)

Enhancements & code cleanups:
- Various fixes in the documentation (Bagas Sanjaya)
- Use string choices helpers (Chelsy Ratnawat)
- xenfb: Use vmalloc_array to simplify code (Qianfeng Rong)
- mb862xxfb: use signed type for error codes (Qianfeng Rong)
- Make drivers depend on LCD_CLASS_DEVICE (Thomas Zimmermann)
- radeonfb: Remove stale product link in Kconfig (Sukrut Heroorkar)"

* tag 'fbdev-for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/linux-fbdev:
fbdev: Fix logic error in "offb" name match
fbdev: Add bounds checking in bit_putcs to fix vmalloc-out-of-bounds
fbdev: Make drivers depend on LCD_CLASS_DEVICE
fbdev: radeonfb: Remove stale product link in Kconfig
Documentation: fb: Retitle driver docs
Documentation: fb: ep93xx: Demote section headings
Documentation: fb: Split toctree
fbdev: simplefb: Fix use after free in simplefb_detach_genpds()
fbdev: s3fb: Revert mclk stop in suspend
fbdev: mb862xxfb: Use int type to store negative error codes
fbdev: Use string choices helpers
fbdev: core: Fix ubsan warning in pixel_to_pat
fbdev: s3fb: Implement 1 and 2 BPP modes, improve 4 BPP
fbdev: s3fb: Implement powersave for S3 FB
fbdev: xenfb: Use vmalloc_array to simplify code

Linus Torvalds 06a88f47 9976831f

+259 -165
+3 -5
Documentation/fb/aty128fb.rst
··· 1 - ================= 2 - What is aty128fb? 3 - ================= 4 - 5 - .. [This file is cloned from VesaFB/matroxfb] 1 + ========================================= 2 + aty128fb - ATI Rage128 framebuffer driver 3 + ========================================= 6 4 7 5 This is a driver for a graphic framebuffer for ATI Rage128 based devices 8 6 on Intel and PPC boxes.
+3 -3
Documentation/fb/efifb.rst
··· 1 - ============== 2 - What is efifb? 3 - ============== 1 + =================================== 2 + efifb - Generic EFI platform driver 3 + =================================== 4 4 5 5 This is a generic EFI platform driver for systems with UEFI firmware. The 6 6 system must be booted via the EFI stub for this to be usable. efifb supports
-4
Documentation/fb/ep93xx-fb.rst
··· 41 41 42 42 ep93xx_register_fb(&some_board_fb_info); 43 43 44 - ===================== 45 44 Video Attribute Flags 46 45 ===================== 47 46 ··· 78 79 EP93XXFB_USE_SDCSN3 Use SDCSn[3] for the framebuffer. 79 80 =============================== ====================================== 80 81 81 - ================== 82 82 Platform callbacks 83 83 ================== 84 84 ··· 99 101 /* Board specific framebuffer setup */ 100 102 } 101 103 102 - ====================== 103 104 Setting the video mode 104 105 ====================== 105 106 ··· 116 119 117 120 modprobe ep93xx-fb video=320x240 118 121 119 - ============== 120 122 Screenpage bug 121 123 ============== 122 124
+3 -5
Documentation/fb/gxfb.rst
··· 1 - ============= 2 - What is gxfb? 3 - ============= 4 - 5 - .. [This file is cloned from VesaFB/aty128fb] 1 + ======================================= 2 + gxfb - AMD Geode GX2 framebuffer driver 3 + ======================================= 6 4 7 5 This is a graphics framebuffer driver for AMD Geode GX2 based processors. 8 6
+45 -35
Documentation/fb/index.rst
··· 4 4 Frame Buffer 5 5 ============ 6 6 7 - .. toctree:: 8 - :maxdepth: 1 7 + General information 8 + =================== 9 9 10 - api 11 - arkfb 12 - aty128fb 13 - cirrusfb 14 - cmap_xfbdev 15 - deferred_io 16 - efifb 17 - ep93xx-fb 18 - fbcon 19 - framebuffer 20 - gxfb 21 - intel810 22 - internals 23 - lxfb 24 - matroxfb 25 - metronomefb 26 - modedb 27 - pvr2fb 28 - pxafb 29 - s3fb 30 - sa1100fb 31 - sh7760fb 32 - sisfb 33 - sm501 34 - sm712fb 35 - sstfb 36 - tgafb 37 - tridentfb 38 - udlfb 39 - uvesafb 40 - vesafb 41 - viafb 42 - vt8623fb 10 + .. toctree:: 11 + :maxdepth: 1 12 + 13 + api 14 + cmap_xfbdev 15 + deferred_io 16 + fbcon 17 + framebuffer 18 + internals 19 + modedb 20 + 21 + Driver documentation 22 + ==================== 23 + 24 + .. toctree:: 25 + :maxdepth: 1 26 + 27 + arkfb 28 + aty128fb 29 + cirrusfb 30 + efifb 31 + ep93xx-fb 32 + gxfb 33 + intel810 34 + lxfb 35 + matroxfb 36 + metronomefb 37 + pvr2fb 38 + pxafb 39 + s3fb 40 + sa1100fb 41 + sh7760fb 42 + sisfb 43 + sm501 44 + sm712fb 45 + sstfb 46 + tgafb 47 + tridentfb 48 + udlfb 49 + uvesafb 50 + vesafb 51 + viafb 52 + vt8623fb 43 53 44 54 .. only:: subproject and html 45 55
+3 -6
Documentation/fb/lxfb.rst
··· 1 - ============= 2 - What is lxfb? 3 - ============= 4 - 5 - .. [This file is cloned from VesaFB/aty128fb] 6 - 1 + ====================================== 2 + lxfb - AMD Geode LX framebuffer driver 3 + ====================================== 7 4 8 5 This is a graphics framebuffer driver for AMD Geode LX based processors. 9 6
+3 -6
Documentation/fb/matroxfb.rst
··· 1 - ================= 2 - What is matroxfb? 3 - ================= 4 - 5 - .. [This file is cloned from VesaFB. Thanks go to Gerd Knorr] 6 - 1 + ================================================ 2 + matroxfb - Framebuffer driver for Matrox devices 3 + ================================================ 7 4 8 5 This is a driver for a graphic framebuffer for Matrox devices on 9 6 Alpha, Intel and PPC boxes.
+3 -3
Documentation/fb/pvr2fb.rst
··· 1 - =============== 2 - What is pvr2fb? 3 - =============== 1 + =============================================== 2 + pvr2fb - PowerVR 2 graphics frame buffer driver 3 + =============================================== 4 4 5 5 This is a driver for PowerVR 2 based graphics frame buffers, such as the 6 6 one found in the Dreamcast.
+3 -6
Documentation/fb/sa1100fb.rst
··· 1 - ================= 2 - What is sa1100fb? 3 - ================= 4 - 5 - .. [This file is cloned from VesaFB/matroxfb] 6 - 1 + ================================================= 2 + sa1100fb - SA-1100 LCD graphic framebuffer driver 3 + ================================================= 7 4 8 5 This is a driver for a graphic framebuffer for the SA-1100 LCD 9 6 controller.
+3 -3
Documentation/fb/sisfb.rst
··· 1 - ============== 2 - What is sisfb? 3 - ============== 1 + ===================================== 2 + sisfb - SiS framebuffer device driver 3 + ===================================== 4 4 5 5 sisfb is a framebuffer device driver for SiS (Silicon Integrated Systems) 6 6 graphics chips. Supported are:
+3 -3
Documentation/fb/sm712fb.rst
··· 1 - ================ 2 - What is sm712fb? 3 - ================ 1 + ========================================================== 2 + sm712fb - Silicon Motion SM712 graphics framebuffer driver 3 + ========================================================== 4 4 5 5 This is a graphics framebuffer driver for Silicon Motion SM712 based processors. 6 6
+3 -3
Documentation/fb/tgafb.rst
··· 1 - ============== 2 - What is tgafb? 3 - ============== 1 + ======================================= 2 + tgafb - TGA graphics framebuffer driver 3 + ======================================= 4 4 5 5 This is a driver for DECChip 21030 based graphics framebuffers, a.k.a. TGA 6 6 cards, which are usually found in older Digital Alpha systems. The
+3 -3
Documentation/fb/udlfb.rst
··· 1 - ============== 2 - What is udlfb? 3 - ============== 1 + ================================== 2 + udlfb - DisplayLink USB 2.0 driver 3 + ================================== 4 4 5 5 This is a driver for DisplayLink USB 2.0 era graphics chips. 6 6
+3 -3
Documentation/fb/vesafb.rst
··· 1 - =============== 2 - What is vesafb? 3 - =============== 1 + =========================================== 2 + vesafb - Generic graphic framebuffer driver 3 + =========================================== 4 4 5 5 This is a generic driver for a graphic framebuffer on intel boxes. 6 6
+3 -5
drivers/video/fbdev/Kconfig
··· 126 126 config FB_CLPS711X 127 127 tristate "CLPS711X LCD support" 128 128 depends on FB && (ARCH_CLPS711X || COMPILE_TEST) 129 + depends on LCD_CLASS_DEVICE 129 130 select FB_IOMEM_HELPERS 130 131 select FB_MODE_HELPERS 131 - select LCD_CLASS_DEVICE 132 132 select VIDEOMODE_HELPERS 133 133 help 134 134 Say Y to enable the Framebuffer driver for the Cirrus Logic ··· 150 150 tristate "Freescale i.MX1/21/25/27 LCD support" 151 151 depends on FB && HAVE_CLK && HAS_IOMEM 152 152 depends on ARCH_MXC || COMPILE_TEST 153 - select LCD_CLASS_DEVICE 153 + depends on LCD_CLASS_DEVICE 154 154 select FB_IOMEM_HELPERS 155 155 select FB_MODE_HELPERS 156 156 select VIDEOMODE_HELPERS ··· 948 948 a framebuffer device. There are both PCI and AGP versions. You 949 949 don't need to choose this to run the Radeon in plain VGA mode. 950 950 951 - There is a product page at 952 - https://products.amd.com/en-us/GraphicCardResult.aspx 953 - 954 951 config FB_RADEON_I2C 955 952 bool "DDC/I2C for ATI Radeon support" 956 953 depends on FB_RADEON ··· 1057 1060 select FB_TILEBLITTING 1058 1061 select FB_SVGALIB 1059 1062 select VGASTATE 1063 + select FB_CFB_REV_PIXELS_IN_BYTE 1060 1064 select FONT_8x16 if FRAMEBUFFER_CONSOLE 1061 1065 help 1062 1066 Driver for graphics boards with S3 Trio / S3 Virge chip.
+17
drivers/video/fbdev/core/bitblit.c
··· 160 160 image.height = vc->vc_font.height; 161 161 image.depth = 1; 162 162 163 + if (image.dy >= info->var.yres) 164 + return; 165 + 166 + image.height = min(image.height, info->var.yres - image.dy); 167 + 163 168 if (attribute) { 164 169 buf = kmalloc(cellsize, GFP_ATOMIC); 165 170 if (!buf) ··· 178 173 cnt = count; 179 174 180 175 image.width = vc->vc_font.width * cnt; 176 + 177 + if (image.dx >= info->var.xres) 178 + break; 179 + 180 + if (image.dx + image.width > info->var.xres) { 181 + image.width = info->var.xres - image.dx; 182 + cnt = image.width / vc->vc_font.width; 183 + if (cnt == 0) 184 + break; 185 + image.width = cnt * vc->vc_font.width; 186 + } 187 + 181 188 pitch = DIV_ROUND_UP(image.width, 8) + scan_align; 182 189 pitch &= ~scan_align; 183 190 size = pitch * image.height + buf_align;
+1 -1
drivers/video/fbdev/core/fb_cmdline.c
··· 40 40 bool enabled; 41 41 42 42 if (name) 43 - is_of = strncmp(name, "offb", 4); 43 + is_of = !strncmp(name, "offb", 4); 44 44 45 45 enabled = __video_get_options(name, &options, is_of); 46 46
+1 -2
drivers/video/fbdev/core/fb_fillrect.h
··· 92 92 pattern = pattern | pattern << bpp; 93 93 break; 94 94 default: 95 - pattern = color; 96 - break; 95 + return color; 97 96 } 98 97 #ifndef __LITTLE_ENDIAN 99 98 pattern <<= (BITS_PER_LONG % bpp);
+4 -3
drivers/video/fbdev/core/fbmon.c
··· 36 36 #include <video/of_videomode.h> 37 37 #include <video/videomode.h> 38 38 #include "../edid.h" 39 + #include <linux/string_choices.h> 39 40 40 41 /* 41 42 * EDID parser ··· 321 320 if (flags & DPMS_STANDBY) 322 321 specs->dpms |= FB_DPMS_STANDBY; 323 322 DPRINTK(" DPMS: Active %s, Suspend %s, Standby %s\n", 324 - (flags & DPMS_ACTIVE_OFF) ? "yes" : "no", 325 - (flags & DPMS_SUSPEND) ? "yes" : "no", 326 - (flags & DPMS_STANDBY) ? "yes" : "no"); 323 + str_yes_no(flags & DPMS_ACTIVE_OFF), 324 + str_yes_no(flags & DPMS_SUSPEND), 325 + str_yes_no(flags & DPMS_STANDBY)); 327 326 } 328 327 329 328 static void get_chroma(unsigned char *block, struct fb_monspecs *specs)
+1 -1
drivers/video/fbdev/mb862xx/mb862xxfbdrv.c
··· 674 674 struct fb_info *info; 675 675 struct resource res; 676 676 resource_size_t res_size; 677 - unsigned long ret = -ENODEV; 677 + int ret = -ENODEV; 678 678 679 679 if (of_address_to_resource(np, 0, &res)) { 680 680 dev_err(dev, "Invalid address\n");
+2 -1
drivers/video/fbdev/nvidia/nvidia.c
··· 22 22 #include <linux/pci.h> 23 23 #include <linux/console.h> 24 24 #include <linux/backlight.h> 25 + #include <linux/string_choices.h> 25 26 #ifdef CONFIG_BOOTX_TEXT 26 27 #include <asm/btext.h> 27 28 #endif ··· 623 622 else 624 623 par->FPDither = !!(NV_RD32(par->PRAMDAC, 0x083C) & 1); 625 624 printk(KERN_INFO PFX "Flat panel dithering %s\n", 626 - par->FPDither ? "enabled" : "disabled"); 625 + str_enabled_disabled(par->FPDither)); 627 626 } 628 627 629 628 info->fix.visual = (info->var.bits_per_pixel == 8) ?
+2 -1
drivers/video/fbdev/pxafb.c
··· 60 60 #include <linux/soc/pxa/cpu.h> 61 61 #include <video/of_display_timing.h> 62 62 #include <video/videomode.h> 63 + #include <linux/string_choices.h> 63 64 64 65 #include <asm/io.h> 65 66 #include <asm/irq.h> ··· 1420 1419 1421 1420 if (ret < 0) 1422 1421 pr_warn("Unable to %s LCD supply regulator: %d\n", 1423 - on ? "enable" : "disable", ret); 1422 + str_enable_disable(on), ret); 1424 1423 else 1425 1424 fbi->lcd_supply_enabled = on; 1426 1425 }
+123 -54
drivers/video/fbdev/s3fb.c
··· 50 50 static const struct svga_fb_format s3fb_formats[] = { 51 51 { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 52 52 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP4, FB_VISUAL_PSEUDOCOLOR, 8, 16}, 53 - { 4, {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0}, 0, 54 - FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, 53 + { 1, {0, 1, 0}, {0, 1, 0}, {0, 1, 0}, {0, 0, 0}, 2, 54 + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 32, 64}, 55 + { 2, {0, 2, 0}, {0, 2, 0}, {0, 2, 0}, {0, 0, 0}, 2, 56 + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 32}, 55 57 { 4, {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0}, 1, 56 58 FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 8, 16}, 59 + { 4, {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0}, 2, 60 + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, 57 61 { 8, {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 58 62 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 4, 8}, 59 63 {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, ··· 561 557 562 558 /* 32bpp mode is not supported on VIRGE VX, 563 559 24bpp is not supported on others */ 564 - if ((par->chip == CHIP_988_VIRGE_VX) ? (rv == 7) : (rv == 6)) 560 + if ((par->chip == CHIP_988_VIRGE_VX) ? (rv == 9) : (rv == 8)) 565 561 rv = -EINVAL; 566 562 567 563 if (rv < 0) { ··· 611 607 struct s3fb_info *par = info->par; 612 608 u32 value, mode, hmul, offset_value, screen_size, multiplex, dbytes; 613 609 u32 bpp = info->var.bits_per_pixel; 614 - u32 htotal, hsstart; 610 + u32 htotal, hsstart, pel_msk; 615 611 616 612 if (bpp != 0) { 617 613 info->fix.ypanstep = 1; ··· 621 617 info->tileops = NULL; 622 618 623 619 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ 624 - if (bpp == 4) { 620 + if (bpp == 4 && (info->var.nonstd & 1) != 0) { 621 + int i; 625 622 bitmap_zero(info->pixmap.blit_x, FB_MAX_BLIT_WIDTH); 626 - set_bit(8 - 1, info->pixmap.blit_x); 623 + for (i = 8; i <= FB_MAX_BLIT_WIDTH; i += 8) 624 + set_bit(i - 1, info->pixmap.blit_x); 627 625 } else { 628 626 bitmap_fill(info->pixmap.blit_x, FB_MAX_BLIT_WIDTH); 629 627 } ··· 736 730 vga_wcrt(par->state.vgabase, 0x50, 0x00); 737 731 vga_wcrt(par->state.vgabase, 0x67, 0x50); 738 732 msleep(10); /* screen remains blank sometimes without this */ 739 - vga_wcrt(par->state.vgabase, 0x63, (mode <= 2) ? 0x90 : 0x09); 733 + vga_wcrt(par->state.vgabase, 0x63, (mode <= 4) ? 0x90 : 0x09); 740 734 vga_wcrt(par->state.vgabase, 0x66, 0x90); 741 735 } 742 736 ··· 769 763 svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40); 770 764 multiplex = 0; 771 765 hmul = 1; 766 + pel_msk = 0xff; 767 + 768 + svga_wcrt_mask(par->state.vgabase, 0x08, 0x00, 0x60); 769 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); 772 770 773 771 /* Set mode-specific register values */ 774 772 switch (mode) { 775 773 case 0: 776 774 fb_dbg(info, "text mode\n"); 777 775 svga_set_textmode_vga_regs(par->state.vgabase); 776 + pel_msk = 0x0f; 778 777 779 778 /* Set additional registers like in 8-bit mode */ 780 779 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); ··· 794 783 } 795 784 break; 796 785 case 1: 797 - fb_dbg(info, "4 bit pseudocolor\n"); 798 - vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); 786 + fb_dbg(info, "1 bit pseudocolor\n"); 787 + svga_wseq_mask(par->state.vgabase, 0x01, 0x10, 0x14); 788 + svga_wcrt_mask(par->state.vgabase, 0x08, 0x60, 0x60); 789 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x40, 0x60); 790 + pel_msk = 0x01; 799 791 800 792 /* Set additional registers like in 8-bit mode */ 801 793 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); ··· 808 794 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); 809 795 break; 810 796 case 2: 811 - fb_dbg(info, "4 bit pseudocolor, planar\n"); 797 + fb_dbg(info, "2 bit pseudocolor\n"); 798 + svga_wseq_mask(par->state.vgabase, 0x01, 0x04, 0x14); 799 + svga_wseq_mask(par->state.vgabase, 0x04, 0x08, 0x08); 800 + vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x20); 801 + svga_wcrt_mask(par->state.vgabase, 0x08, 0x20, 0x60); 802 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x40, 0x60); 803 + pel_msk = 0x03; 812 804 813 805 /* Set additional registers like in 8-bit mode */ 814 806 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); ··· 824 804 svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); 825 805 break; 826 806 case 3: 807 + fb_dbg(info, "4 bit pseudocolor, planar\n"); 808 + pel_msk = 0x0f; 809 + 810 + /* Set additional registers like in 8-bit mode */ 811 + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); 812 + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); 813 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x40, 0x60); 814 + 815 + /* disable enhanced mode */ 816 + svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); 817 + break; 818 + case 4: 819 + fb_dbg(info, "4 bit pseudocolor\n"); 820 + vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); 821 + svga_wattr(par->state.vgabase, 0x33, 0x01); 822 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x40, 0x60); 823 + pel_msk = 0xf0; 824 + 825 + /* Set additional registers like in 8-bit mode */ 826 + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); 827 + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); 828 + 829 + /* disable enhanced mode */ 830 + svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); 831 + break; 832 + case 5: 827 833 fb_dbg(info, "8 bit pseudocolor\n"); 828 834 svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); 835 + svga_wcrt_mask(par->state.vgabase, 0x05, 0x20, 0x60); 829 836 if (info->var.pixclock > 20000 || 830 837 par->chip == CHIP_357_VIRGE_GX2 || 831 838 par->chip == CHIP_359_VIRGE_GX2P || ··· 866 819 multiplex = 1; 867 820 } 868 821 break; 869 - case 4: 822 + case 6: 870 823 fb_dbg(info, "5/5/5 truecolor\n"); 871 824 if (par->chip == CHIP_988_VIRGE_VX) { 872 825 if (info->var.pixclock > 20000) ··· 894 847 hmul = 2; 895 848 } 896 849 break; 897 - case 5: 850 + case 7: 898 851 fb_dbg(info, "5/6/5 truecolor\n"); 899 852 if (par->chip == CHIP_988_VIRGE_VX) { 900 853 if (info->var.pixclock > 20000) ··· 922 875 hmul = 2; 923 876 } 924 877 break; 925 - case 6: 878 + case 8: 926 879 /* VIRGE VX case */ 927 880 fb_dbg(info, "8/8/8 truecolor\n"); 928 881 svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); 929 882 break; 930 - case 7: 883 + case 9: 931 884 fb_dbg(info, "8/8/8/8 truecolor\n"); 932 885 svga_wcrt_mask(par->state.vgabase, 0x50, 0x30, 0x30); 933 886 svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); ··· 936 889 fb_err(info, "unsupported mode - bug\n"); 937 890 return -EINVAL; 938 891 } 892 + vga_w(par->state.vgabase, VGA_PEL_MSK, pel_msk); 939 893 940 894 if (par->chip != CHIP_988_VIRGE_VX) { 941 895 svga_wseq_mask(par->state.vgabase, 0x15, multiplex ? 0x10 : 0x00, 0x10); ··· 975 927 static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 976 928 u_int transp, struct fb_info *fb) 977 929 { 930 + struct s3fb_info *par = fb->par; 931 + int cols; 932 + 978 933 switch (fb->var.bits_per_pixel) { 979 934 case 0: 935 + case 1: 936 + case 2: 980 937 case 4: 981 - if (regno >= 16) 982 - return -EINVAL; 983 - 984 - if ((fb->var.bits_per_pixel == 4) && 985 - (fb->var.nonstd == 0)) { 986 - outb(0xF0, VGA_PEL_MSK); 987 - outb(regno*16, VGA_PEL_IW); 988 - } else { 989 - outb(0x0F, VGA_PEL_MSK); 990 - outb(regno, VGA_PEL_IW); 991 - } 992 - outb(red >> 10, VGA_PEL_D); 993 - outb(green >> 10, VGA_PEL_D); 994 - outb(blue >> 10, VGA_PEL_D); 995 - break; 996 938 case 8: 997 - if (regno >= 256) 939 + cols = 1 << (fb->var.bits_per_pixel ? fb->var.bits_per_pixel : 4); 940 + if (regno >= cols) 998 941 return -EINVAL; 999 942 1000 - outb(0xFF, VGA_PEL_MSK); 1001 - outb(regno, VGA_PEL_IW); 1002 - outb(red >> 10, VGA_PEL_D); 1003 - outb(green >> 10, VGA_PEL_D); 1004 - outb(blue >> 10, VGA_PEL_D); 943 + if ((fb->var.bits_per_pixel == 4) && ((fb->var.nonstd & 1) == 0)) 944 + regno <<= 4; 945 + 946 + vga_w(par->state.vgabase, VGA_PEL_IW, regno); 947 + vga_w(par->state.vgabase, VGA_PEL_D, red >> 10); 948 + vga_w(par->state.vgabase, VGA_PEL_D, green >> 10); 949 + vga_w(par->state.vgabase, VGA_PEL_D, blue >> 10); 1005 950 break; 1006 951 case 16: 1007 952 if (regno >= 16) ··· 1029 988 static int s3fb_blank(int blank_mode, struct fb_info *info) 1030 989 { 1031 990 struct s3fb_info *par = info->par; 991 + u8 data; 992 + 993 + data = (blank_mode == FB_BLANK_UNBLANK) ? 0x00 : 0x20; 994 + svga_wseq_mask(par->state.vgabase, 0x01, data, 0x20); 995 + svga_wseq_mask(par->state.vgabase, 0x18, data, 0x20); 1032 996 1033 997 switch (blank_mode) { 1034 - case FB_BLANK_UNBLANK: 1035 - fb_dbg(info, "unblank\n"); 1036 - svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); 1037 - svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 1038 - break; 1039 - case FB_BLANK_NORMAL: 1040 - fb_dbg(info, "blank\n"); 1041 - svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); 1042 - svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 998 + default: 999 + data = 0x00; 1043 1000 break; 1044 1001 case FB_BLANK_HSYNC_SUSPEND: 1045 - fb_dbg(info, "hsync\n"); 1046 - svga_wcrt_mask(par->state.vgabase, 0x56, 0x02, 0x06); 1047 - svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 1002 + data = 0x02; 1048 1003 break; 1049 1004 case FB_BLANK_VSYNC_SUSPEND: 1050 - fb_dbg(info, "vsync\n"); 1051 - svga_wcrt_mask(par->state.vgabase, 0x56, 0x04, 0x06); 1052 - svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 1005 + data = 0x04; 1053 1006 break; 1054 1007 case FB_BLANK_POWERDOWN: 1055 - fb_dbg(info, "sync down\n"); 1056 - svga_wcrt_mask(par->state.vgabase, 0x56, 0x06, 0x06); 1057 - svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 1008 + data = 0x06; 1058 1009 break; 1059 1010 } 1011 + svga_wcrt_mask(par->state.vgabase, 0x56, data, 0x06); 1012 + 1013 + data = (blank_mode == FB_BLANK_POWERDOWN) ? 0x01 : 0x00; 1014 + svga_wseq_mask(par->state.vgabase, 0x14, data, 0x01); 1060 1015 1061 1016 return 0; 1062 1017 } ··· 1082 1045 return 0; 1083 1046 } 1084 1047 1048 + /* Get capabilities of accelerator based on the mode */ 1049 + 1050 + static void s3fb_get_caps(struct fb_info *info, struct fb_blit_caps *caps, 1051 + struct fb_var_screeninfo *var) 1052 + { 1053 + int i; 1054 + 1055 + if (var->bits_per_pixel == 0) { 1056 + /* can only support 256 8x16 bitmap */ 1057 + bitmap_zero(caps->x, FB_MAX_BLIT_WIDTH); 1058 + set_bit(8 - 1, caps->x); 1059 + bitmap_zero(caps->y, FB_MAX_BLIT_HEIGHT); 1060 + set_bit(16 - 1, caps->y); 1061 + caps->len = 256; 1062 + } else { 1063 + if (var->bits_per_pixel == 4 && (var->nonstd & 1) != 0) { 1064 + bitmap_zero(caps->x, FB_MAX_BLIT_WIDTH); 1065 + for (i = 8; i <= FB_MAX_BLIT_WIDTH; i += 8) 1066 + set_bit(i - 1, caps->x); 1067 + } else { 1068 + bitmap_fill(caps->x, FB_MAX_BLIT_WIDTH); 1069 + } 1070 + bitmap_fill(caps->y, FB_MAX_BLIT_HEIGHT); 1071 + caps->len = ~(u32)0; 1072 + } 1073 + } 1074 + 1085 1075 /* ------------------------------------------------------------------------- */ 1086 1076 1087 1077 /* Frame buffer operations */ ··· 1127 1063 .fb_copyarea = cfb_copyarea, 1128 1064 .fb_imageblit = s3fb_imageblit, 1129 1065 __FB_DEFAULT_IOMEM_OPS_MMAP, 1130 - .fb_get_caps = svga_get_caps, 1066 + .fb_get_caps = s3fb_get_caps, 1131 1067 }; 1132 1068 1133 1069 /* ------------------------------------------------------------------------- */ ··· 1509 1445 } 1510 1446 1511 1447 fb_set_suspend(info, 1); 1448 + svga_wseq_mask(par->state.vgabase, 0x18, 0x20, 0x20); 1449 + svga_wseq_mask(par->state.vgabase, 0x14, 0x01, 0x01); 1512 1450 1513 1451 mutex_unlock(&(par->open_lock)); 1514 1452 console_unlock(); ··· 1537 1471 return 0; 1538 1472 } 1539 1473 1474 + vga_wseq(par->state.vgabase, 0x08, 0x06); 1475 + svga_wseq_mask(par->state.vgabase, 0x18, 0x00, 0x20); 1476 + svga_wseq_mask(par->state.vgabase, 0x14, 0x00, 0x01); 1540 1477 s3fb_set_par(info); 1541 1478 fb_set_suspend(info, 0); 1542 1479
+23 -8
drivers/video/fbdev/simplefb.c
··· 93 93 94 94 static void simplefb_clocks_destroy(struct simplefb_par *par); 95 95 static void simplefb_regulators_destroy(struct simplefb_par *par); 96 + static void simplefb_detach_genpds(void *res); 96 97 97 98 /* 98 99 * fb_ops.fb_destroy is called by the last put_fb_info() call at the end ··· 106 105 107 106 simplefb_regulators_destroy(info->par); 108 107 simplefb_clocks_destroy(info->par); 108 + simplefb_detach_genpds(info->par); 109 109 if (info->screen_base) 110 110 iounmap(info->screen_base); 111 111 ··· 447 445 if (!IS_ERR_OR_NULL(par->genpds[i])) 448 446 dev_pm_domain_detach(par->genpds[i], true); 449 447 } 448 + par->num_genpds = 0; 450 449 } 451 450 452 451 static int simplefb_attach_genpds(struct simplefb_par *par, 453 452 struct platform_device *pdev) 454 453 { 455 454 struct device *dev = &pdev->dev; 456 - unsigned int i; 455 + unsigned int i, num_genpds; 457 456 int err; 458 457 459 458 err = of_count_phandle_with_args(dev->of_node, "power-domains", ··· 468 465 return err; 469 466 } 470 467 471 - par->num_genpds = err; 468 + num_genpds = err; 472 469 473 470 /* 474 471 * Single power-domain devices are handled by the driver core, so 475 472 * nothing to do here. 476 473 */ 477 - if (par->num_genpds <= 1) 474 + if (num_genpds <= 1) { 475 + par->num_genpds = num_genpds; 478 476 return 0; 477 + } 479 478 480 - par->genpds = devm_kcalloc(dev, par->num_genpds, sizeof(*par->genpds), 479 + par->genpds = devm_kcalloc(dev, num_genpds, sizeof(*par->genpds), 481 480 GFP_KERNEL); 482 481 if (!par->genpds) 483 482 return -ENOMEM; 484 483 485 - par->genpd_links = devm_kcalloc(dev, par->num_genpds, 484 + par->genpd_links = devm_kcalloc(dev, num_genpds, 486 485 sizeof(*par->genpd_links), 487 486 GFP_KERNEL); 488 487 if (!par->genpd_links) 489 488 return -ENOMEM; 489 + 490 + /* 491 + * Set par->num_genpds only after genpds and genpd_links are allocated 492 + * to exit early from simplefb_detach_genpds() without full 493 + * initialisation. 494 + */ 495 + par->num_genpds = num_genpds; 490 496 491 497 for (i = 0; i < par->num_genpds; i++) { 492 498 par->genpds[i] = dev_pm_domain_attach_by_id(dev, i); ··· 518 506 dev_warn(dev, "failed to link power-domain %u\n", i); 519 507 } 520 508 521 - return devm_add_action_or_reset(dev, simplefb_detach_genpds, par); 509 + return 0; 522 510 } 523 511 #else 512 + static void simplefb_detach_genpds(void *res) { } 524 513 static int simplefb_attach_genpds(struct simplefb_par *par, 525 514 struct platform_device *pdev) 526 515 { ··· 635 622 ret = devm_aperture_acquire_for_platform_device(pdev, par->base, par->size); 636 623 if (ret) { 637 624 dev_err(&pdev->dev, "Unable to acquire aperture: %d\n", ret); 638 - goto error_regulators; 625 + goto error_genpds; 639 626 } 640 627 ret = register_framebuffer(info); 641 628 if (ret < 0) { 642 629 dev_err(&pdev->dev, "Unable to register simplefb: %d\n", ret); 643 - goto error_regulators; 630 + goto error_genpds; 644 631 } 645 632 646 633 dev_info(&pdev->dev, "fb%d: simplefb registered!\n", info->node); 647 634 648 635 return 0; 649 636 637 + error_genpds: 638 + simplefb_detach_genpds(par); 650 639 error_regulators: 651 640 simplefb_regulators_destroy(par); 652 641 error_clocks:
+1 -1
drivers/video/fbdev/xen-fbfront.c
··· 390 390 391 391 info->nr_pages = (fb_size + PAGE_SIZE - 1) >> PAGE_SHIFT; 392 392 393 - info->gfns = vmalloc(array_size(sizeof(unsigned long), info->nr_pages)); 393 + info->gfns = vmalloc_array(info->nr_pages, sizeof(unsigned long)); 394 394 if (!info->gfns) 395 395 goto error_nomem; 396 396