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iommu: Drop sw_msi from iommu_domain

There are only two sw_msi implementations in the entire system, thus it's
not very necessary to have an sw_msi pointer.

Instead, check domain->cookie_type to call the two sw_msi implementations
directly from the core code.

Link: https://patch.msgid.link/r/7ded87c871afcbaac665b71354de0a335087bf0f.1742871535.git.nicolinc@nvidia.com
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

authored by

Nicolin Chen and committed by
Jason Gunthorpe
06d54f00 ec031e1b

+27 -32
+2 -12
drivers/iommu/dma-iommu.c
··· 94 94 } 95 95 early_param("iommu.forcedac", iommu_dma_forcedac_setup); 96 96 97 - static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, 98 - phys_addr_t msi_addr); 99 - 100 97 /* Number of entries per flush queue */ 101 98 #define IOVA_DEFAULT_FQ_SIZE 256 102 99 #define IOVA_SINGLE_FQ_SIZE 32768 ··· 374 377 375 378 mutex_init(&cookie->mutex); 376 379 INIT_LIST_HEAD(&cookie->msi_page_list); 377 - iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); 378 380 domain->cookie_type = IOMMU_COOKIE_DMA_IOVA; 379 381 domain->iova_cookie = cookie; 380 382 return 0; ··· 407 411 408 412 cookie->msi_iova = base; 409 413 INIT_LIST_HEAD(&cookie->msi_page_list); 410 - iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); 411 414 domain->cookie_type = IOMMU_COOKIE_DMA_MSI; 412 415 domain->msi_cookie = cookie; 413 416 return 0; ··· 421 426 { 422 427 struct iommu_dma_cookie *cookie = domain->iova_cookie; 423 428 struct iommu_dma_msi_page *msi, *tmp; 424 - 425 - #if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) 426 - if (domain->sw_msi != iommu_dma_sw_msi) 427 - return; 428 - #endif 429 429 430 430 if (cookie->iovad.granule) { 431 431 iommu_dma_free_fq(cookie); ··· 1816 1826 return NULL; 1817 1827 } 1818 1828 1819 - static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, 1820 - phys_addr_t msi_addr) 1829 + int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, 1830 + phys_addr_t msi_addr) 1821 1831 { 1822 1832 struct device *dev = msi_desc_to_dev(desc); 1823 1833 const struct iommu_dma_msi_page *msi_page;
+9
drivers/iommu/dma-iommu.h
··· 19 19 20 20 void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); 21 21 22 + int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, 23 + phys_addr_t msi_addr); 24 + 22 25 extern bool iommu_dma_forcedac; 23 26 24 27 #else /* CONFIG_IOMMU_DMA */ ··· 50 47 51 48 static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) 52 49 { 50 + } 51 + 52 + static inline int iommu_dma_sw_msi(struct iommu_domain *domain, 53 + struct msi_desc *desc, phys_addr_t msi_addr) 54 + { 55 + return -ENODEV; 53 56 } 54 57 55 58 #endif /* CONFIG_IOMMU_DMA */
+16 -2
drivers/iommu/iommu.c
··· 18 18 #include <linux/errno.h> 19 19 #include <linux/host1x_context_bus.h> 20 20 #include <linux/iommu.h> 21 + #include <linux/iommufd.h> 21 22 #include <linux/idr.h> 22 23 #include <linux/err.h> 23 24 #include <linux/pci.h> ··· 3651 3650 return 0; 3652 3651 3653 3652 mutex_lock(&group->mutex); 3654 - if (group->domain && group->domain->sw_msi) 3655 - ret = group->domain->sw_msi(group->domain, desc, msi_addr); 3653 + /* An IDENTITY domain must pass through */ 3654 + if (group->domain && group->domain->type != IOMMU_DOMAIN_IDENTITY) { 3655 + switch (group->domain->cookie_type) { 3656 + case IOMMU_COOKIE_DMA_MSI: 3657 + case IOMMU_COOKIE_DMA_IOVA: 3658 + ret = iommu_dma_sw_msi(group->domain, desc, msi_addr); 3659 + break; 3660 + case IOMMU_COOKIE_IOMMUFD: 3661 + ret = iommufd_sw_msi(group->domain, desc, msi_addr); 3662 + break; 3663 + default: 3664 + ret = -EOPNOTSUPP; 3665 + break; 3666 + } 3667 + } 3656 3668 mutex_unlock(&group->mutex); 3657 3669 return ret; 3658 3670 }
-3
drivers/iommu/iommufd/hw_pagetable.c
··· 161 161 } 162 162 hwpt->domain->iommufd_hwpt = hwpt; 163 163 hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD; 164 - iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi); 165 164 166 165 /* 167 166 * Set the coherency mode before we do iopt_table_add_domain() as some ··· 258 259 hwpt->domain->owner = ops; 259 260 hwpt->domain->iommufd_hwpt = hwpt; 260 261 hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD; 261 - iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi); 262 262 263 263 if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED)) { 264 264 rc = -EINVAL; ··· 316 318 hwpt->domain->iommufd_hwpt = hwpt; 317 319 hwpt->domain->owner = viommu->iommu_dev->ops; 318 320 hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD; 319 - iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi); 320 321 321 322 if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED)) { 322 323 rc = -EINVAL;
-15
include/linux/iommu.h
··· 229 229 struct iommu_domain_geometry geometry; 230 230 int (*iopf_handler)(struct iopf_group *group); 231 231 232 - #if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) 233 - int (*sw_msi)(struct iommu_domain *domain, struct msi_desc *desc, 234 - phys_addr_t msi_addr); 235 - #endif 236 - 237 232 union { /* cookie */ 238 233 struct iommu_dma_cookie *iova_cookie; 239 234 struct iommu_dma_msi_cookie *msi_cookie; ··· 248 253 }; 249 254 }; 250 255 }; 251 - 252 - static inline void iommu_domain_set_sw_msi( 253 - struct iommu_domain *domain, 254 - int (*sw_msi)(struct iommu_domain *domain, struct msi_desc *desc, 255 - phys_addr_t msi_addr)) 256 - { 257 - #if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) 258 - domain->sw_msi = sw_msi; 259 - #endif 260 - } 261 256 262 257 static inline bool iommu_is_dma_domain(struct iommu_domain *domain) 263 258 {