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dt-bindings: clock: lan966x: Add LAN966X Clock Controller

This adds the DT bindings documentation for lan966x SoC
generic clock controller.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-3-kavyasree.kotagiri@microchip.com

authored by

Kavyasree Kotagiri and committed by
Nicolas Ferre 07300ef4 265d27ca

+57
+57
Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/clock/microchip,lan966x-gck.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Microchip LAN966X Generic Clock Controller 8 + 9 + maintainers: 10 + - Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> 11 + 12 + description: | 13 + The LAN966X Generic clock controller contains 3 PLLs - cpu_clk, 14 + ddr_clk and sys_clk. This clock controller generates and supplies 15 + clock to various peripherals within the SoC. 16 + 17 + properties: 18 + compatible: 19 + const: microchip,lan966x-gck 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + clocks: 25 + items: 26 + - description: CPU clock source 27 + - description: DDR clock source 28 + - description: System clock source 29 + 30 + clock-names: 31 + items: 32 + - const: cpu 33 + - const: ddr 34 + - const: sys 35 + 36 + '#clock-cells': 37 + const: 1 38 + 39 + required: 40 + - compatible 41 + - reg 42 + - clocks 43 + - clock-names 44 + - '#clock-cells' 45 + 46 + additionalProperties: false 47 + 48 + examples: 49 + - | 50 + clks: clock-controller@e00c00a8 { 51 + compatible = "microchip,lan966x-gck"; 52 + #clock-cells = <1>; 53 + clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; 54 + clock-names = "cpu", "ddr", "sys"; 55 + reg = <0xe00c00a8 0x38>; 56 + }; 57 + ...