Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'iommu-fixes-v5.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel:
- Intel VT-d fixes:
- Remove unused PASID_DISABLED
- Fix RCU locking
- Fix for the unmap_pages call-back
- Rockchip RK3568 address mask fix
- AMD IOMMUv2 log message clarification
* tag 'iommu-fixes-v5.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/vt-d: Fix unmap_pages support
iommu/vt-d: Fix an unbalanced rcu_read_lock/rcu_read_unlock()
iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568
iommu/amd: Clarify AMD IOMMUv2 initialization messages
iommu/vt-d: Remove unused PASID_DISABLED
+10
-17
-6
arch/x86/include/asm/fpu/api.h
-6
arch/x86/include/asm/fpu/api.h
···
102
102
*/
103
103
extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);
104
104
105
-
/*
106
-
* Tasks that are not using SVA have mm->pasid set to zero to note that they
107
-
* will not have the valid bit set in MSR_IA32_PASID while they are running.
108
-
*/
109
-
#define PASID_DISABLED 0
110
-
111
105
/* Trap handling */
112
106
extern int fpu__exception_code(struct fpu *fpu, int trap_nr);
113
107
extern void fpu_sync_fpstate(struct fpu *fpu);
+3
-3
drivers/iommu/amd/iommu_v2.c
+3
-3
drivers/iommu/amd/iommu_v2.c
···
929
929
{
930
930
int ret;
931
931
932
-
pr_info("AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>\n");
933
-
934
932
if (!amd_iommu_v2_supported()) {
935
-
pr_info("AMD IOMMUv2 functionality not available on this system\n");
933
+
pr_info("AMD IOMMUv2 functionality not available on this system - This is not a bug.\n");
936
934
/*
937
935
* Load anyway to provide the symbols to other modules
938
936
* which may use AMD IOMMUv2 optionally.
···
944
946
goto out;
945
947
946
948
amd_iommu_register_ppr_notifier(&ppr_nb);
949
+
950
+
pr_info("AMD IOMMUv2 loaded and initialized\n");
947
951
948
952
return 0;
949
953
+3
-2
drivers/iommu/intel/cap_audit.c
+3
-2
drivers/iommu/intel/cap_audit.c
···
144
144
{
145
145
struct dmar_drhd_unit *d;
146
146
struct intel_iommu *i;
147
+
int rc = 0;
147
148
148
149
rcu_read_lock();
149
150
if (list_empty(&dmar_drhd_units))
···
170
169
*/
171
170
if (intel_cap_smts_sanity() &&
172
171
!intel_cap_flts_sanity() && !intel_cap_slts_sanity())
173
-
return -EOPNOTSUPP;
172
+
rc = -EOPNOTSUPP;
174
173
175
174
out:
176
175
rcu_read_unlock();
177
-
return 0;
176
+
return rc;
178
177
}
179
178
180
179
int intel_cap_audit(enum cap_audit_type type, struct intel_iommu *iommu)
+2
-4
drivers/iommu/intel/iommu.c
+2
-4
drivers/iommu/intel/iommu.c
···
1339
1339
pte = &pte[pfn_level_offset(pfn, level)];
1340
1340
1341
1341
do {
1342
-
unsigned long level_pfn;
1342
+
unsigned long level_pfn = pfn & level_mask(level);
1343
1343
1344
1344
if (!dma_pte_present(pte))
1345
1345
goto next;
1346
-
1347
-
level_pfn = pfn & level_mask(level);
1348
1346
1349
1347
/* If range covers entire pagetable, free it */
1350
1348
if (start_pfn <= level_pfn &&
···
1364
1366
freelist);
1365
1367
}
1366
1368
next:
1367
-
pfn += level_size(level);
1369
+
pfn = level_pfn + level_size(level);
1368
1370
} while (!first_pte_in_page(++pte) && pfn <= last_pfn);
1369
1371
1370
1372
if (first_pte)
+2
-2
drivers/iommu/rockchip-iommu.c
+2
-2
drivers/iommu/rockchip-iommu.c
···
200
200
#define DTE_HI_MASK2 GENMASK(7, 4)
201
201
#define DTE_HI_SHIFT1 24 /* shift bit 8 to bit 32 */
202
202
#define DTE_HI_SHIFT2 32 /* shift bit 4 to bit 36 */
203
-
#define PAGE_DESC_HI_MASK1 GENMASK_ULL(39, 36)
204
-
#define PAGE_DESC_HI_MASK2 GENMASK_ULL(35, 32)
203
+
#define PAGE_DESC_HI_MASK1 GENMASK_ULL(35, 32)
204
+
#define PAGE_DESC_HI_MASK2 GENMASK_ULL(39, 36)
205
205
206
206
static inline phys_addr_t rk_dte_pt_address_v2(u32 dte)
207
207
{