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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
arm64: dts: qcom: sa8775p: add the QUPv3 #0 and #3 node
Add zeroth and third instance of the QUPv3 engine to the sa8775p.dtsi.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-2-quic_shazhuss@quicinc.com
authored by
Shazad Hussain
and committed by
Bjorn Andersson
07e3e172
c77612a0
+26
+26
arch/arm64/boot/dts/qcom/sa8775p.dtsi
+26
arch/arm64/boot/dts/qcom/sa8775p.dtsi
···
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};
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};
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+
qupv3_id_0: geniqup@9c0000 {
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compatible = "qcom,geni-se-qup";
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reg = <0x0 0x9c0000 0x0 0x6000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clock-names = "m-ahb", "s-ahb";
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clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
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<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
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iommus = <&apps_smmu 0x403 0x0>;
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status = "disabled";
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};
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+
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qupv3_id_1: geniqup@ac0000 {
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compatible = "qcom,geni-se-qup";
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reg = <0x0 0x00ac0000 0x0 0x6000>;
···
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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+
};
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+
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qupv3_id_3: geniqup@bc0000 {
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compatible = "qcom,geni-se-qup";
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reg = <0x0 0xbc0000 0x0 0x6000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clock-names = "m-ahb", "s-ahb";
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clocks = <&gcc GCC_QUPV3_WRAP_3_M_AHB_CLK>,
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<&gcc GCC_QUPV3_WRAP_3_S_AHB_CLK>;
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+
iommus = <&apps_smmu 0x43 0x0>;
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status = "disabled";
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};
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ufs_mem_hc: ufs@1d84000 {