drm/msm: dpu: Remove empty/useless labels

+2 -3

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

··· 68 68 bool intf_connected = false; 69 69 70 70 if (!crtc) 71 - goto end; 71 + return intf_connected; 72 72 73 73 drm_for_each_crtc(tmp_crtc, crtc->dev) { 74 74 if ((dpu_crtc_get_intf_mode(tmp_crtc) == INTF_MODE_VIDEO) && ··· 76 76 DPU_DEBUG("video interface connected crtc:%d\n", 77 77 tmp_crtc->base.id); 78 78 intf_connected = true; 79 - goto end; 79 + return intf_connected; 80 80 } 81 81 } 82 82 83 - end: 84 83 return intf_connected; 85 84 } 86 85

+2 -6

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

··· 496 496 _dpu_encoder_phys_cmd_pingpong_config(phys_enc); 497 497 498 498 if (!dpu_encoder_phys_cmd_is_master(phys_enc)) 499 - goto skip_flush; 499 + return; 500 500 501 501 ctl = phys_enc->hw_ctl; 502 502 ctl->ops.get_bitmask_intf(ctl, &flush_mask, phys_enc->intf_idx); 503 503 ctl->ops.update_pending_flush(ctl, flush_mask); 504 - 505 - skip_flush: 506 - return; 507 504 } 508 505 509 506 static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc) ··· 794 797 if (!cmd_enc) { 795 798 ret = -ENOMEM; 796 799 DPU_ERROR("failed to allocate\n"); 797 - goto fail; 800 + return ERR_PTR(ret); 798 801 } 799 802 phys_enc = &cmd_enc->base; 800 803 phys_enc->hw_mdptop = p->dpu_kms->hw_mdp; ··· 852 855 853 856 return phys_enc; 854 857 855 - fail: 856 858 return ERR_PTR(ret); 857 859 }

+2 -3

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

··· 921 921 + layout->plane_size[2] + layout->plane_size[3]; 922 922 923 923 if (!meta) 924 - goto done; 924 + return 0; 925 925 926 926 /* configure Y metadata plane */ 927 927 layout->plane_addr[2] = base_addr; ··· 952 952 layout->plane_addr[1] = 0; 953 953 954 954 if (!meta) 955 - goto done; 955 + return 0; 956 956 957 957 layout->plane_addr[2] = base_addr; 958 958 layout->plane_addr[3] = 0; 959 959 } 960 - done: 961 960 return 0; 962 961 } 963 962

+1 -2

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

··· 177 177 height = DPU_REG_READ(c, PP_SYNC_CONFIG_HEIGHT) & 0xFFFF; 178 178 179 179 if (height < init) 180 - goto line_count_exit; 180 + return line; 181 181 182 182 line = DPU_REG_READ(c, PP_INT_COUNT_VAL) & 0xFFFF; 183 183 ··· 186 186 else 187 187 line -= init; 188 188 189 - line_count_exit: 190 189 return line; 191 190 } 192 191

+6 -9

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

··· 856 856 857 857 if (!kms) { 858 858 DPU_ERROR("invalid kms\n"); 859 - goto end; 859 + return rc; 860 860 } 861 861 862 862 dpu_kms = to_dpu_kms(kms); 863 863 dev = dpu_kms->dev; 864 864 if (!dev) { 865 865 DPU_ERROR("invalid device\n"); 866 - goto end; 866 + return rc; 867 867 } 868 868 869 869 rc = dpu_dbg_init(&dpu_kms->pdev->dev); 870 870 if (rc) { 871 871 DRM_ERROR("failed to init dpu dbg: %d\n", rc); 872 - goto end; 872 + return rc; 873 873 } 874 874 875 875 priv = dev->dev_private; ··· 1050 1050 _dpu_kms_hw_destroy(dpu_kms); 1051 1051 dbg_destroy: 1052 1052 dpu_dbg_destroy(); 1053 - end: 1054 1053 return rc; 1055 1054 } 1056 1055 ··· 1154 1155 ddev = dpu_kms->dev; 1155 1156 if (!ddev) { 1156 1157 DPU_ERROR("invalid drm_device\n"); 1157 - goto exit; 1158 + return rc; 1158 1159 } 1159 1160 1160 1161 rc = dpu_power_resource_enable(&dpu_kms->phandle, ··· 1166 1167 if (rc) 1167 1168 DPU_ERROR("clock disable failed rc:%d\n", rc); 1168 1169 1169 - exit: 1170 1170 return rc; 1171 1171 } 1172 1172 ··· 1180 1182 ddev = dpu_kms->dev; 1181 1183 if (!ddev) { 1182 1184 DPU_ERROR("invalid drm_device\n"); 1183 - goto exit; 1185 + return rc; 1184 1186 } 1185 1187 1186 1188 rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, true); 1187 1189 if (rc) { 1188 1190 DPU_ERROR("clock enable failed rc:%d\n", rc); 1189 - goto exit; 1191 + return rc; 1190 1192 } 1191 1193 1192 1194 rc = dpu_power_resource_enable(&dpu_kms->phandle, ··· 1194 1196 if (rc) 1195 1197 DPU_ERROR("resource enable failed: %d\n", rc); 1196 1198 1197 - exit: 1198 1199 return rc; 1199 1200 } 1200 1201

+1 -2

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

··· 1537 1537 if (!pdpu) { 1538 1538 DPU_ERROR("[%u]failed to allocate local plane struct\n", pipe); 1539 1539 ret = -ENOMEM; 1540 - goto exit; 1540 + return ERR_PTR(ret); 1541 1541 } 1542 1542 1543 1543 /* cache local stuff for later */ ··· 1623 1623 dpu_hw_sspp_destroy(pdpu->pipe_hw); 1624 1624 clean_plane: 1625 1625 kfree(pdpu); 1626 - exit: 1627 1626 return ERR_PTR(ret); 1628 1627 }

+1 -3

drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c

··· 191 191 ot_lim = _dpu_vbif_get_ot_limit(vbif, params) & 0xFF; 192 192 193 193 if (ot_lim == 0) 194 - goto exit; 194 + return; 195 195 196 196 trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim, 197 197 params->vbif_idx); ··· 210 210 211 211 if (forced_on) 212 212 mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, false); 213 - exit: 214 - return; 215 213 } 216 214 217 215 void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,

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