Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY
Glymur platform has two Gen4 2-lanes controllers, the fourth and
sixth instances. Add support for their PHYs.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20251224-phy-qcom-pcie-add-glymur-v3-2-57396145bc22@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Abel Vesa
and committed by
Vinod Koul
085ba7c9
25671c37
+19
+19
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+19
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
···
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.phy_status = PHYSTATUS_4_20,
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};
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+
static const struct qmp_phy_cfg glymur_qmp_gen4x2_pciephy_cfg = {
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+
.lanes = 2,
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+
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+
.offsets = &qmp_pcie_offsets_v8_0,
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+
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+
.reset_list = sdm845_pciephy_reset_l,
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+
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
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+
.vreg_list = qmp_phy_vreg_l,
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+
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
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+
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+
.regs = pciephy_v8_regs_layout,
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+
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+
.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
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+
.phy_status = PHYSTATUS_4_20,
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+
};
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+
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static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
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{
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const struct qmp_phy_cfg *cfg = qmp->cfg;
···
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static const struct of_device_id qmp_pcie_of_match_table[] = {
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{
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+
.compatible = "qcom,glymur-qmp-gen4x2-pcie-phy",
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+
.data = &glymur_qmp_gen4x2_pciephy_cfg,
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+
}, {
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.compatible = "qcom,glymur-qmp-gen5x4-pcie-phy",
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.data = &glymur_qmp_gen5x4_pciephy_cfg,
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}, {