Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- fix EFI stub cache maintenance causing aborts during boot on certain
platforms
- handle byte stores in __clear_user without panicking
- fix race condition in aarch64_insn_patch_text_sync() (instruction
patching)
- Couple of type fixes
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: ARCH_PFN_OFFSET should be unsigned long
Correct the race condition in aarch64_insn_patch_text_sync()
arm64: __clear_user: handle exceptions on strb
arm64: Fix data type for physical address
arm64: efi: Fix stub cache maintenance
+27
-11
+1
-1
arch/arm64/include/asm/memory.h
+1
-1
arch/arm64/include/asm/memory.h
···
142
142
* virt_to_page(k) convert a _valid_ virtual address to struct page *
143
143
* virt_addr_valid(k) indicates whether a virtual address is valid
144
144
*/
145
-
#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
145
+
#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
146
146
147
147
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
148
148
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+21
-6
arch/arm64/kernel/efi-entry.S
+21
-6
arch/arm64/kernel/efi-entry.S
···
54
54
b.eq efi_load_fail
55
55
56
56
/*
57
-
* efi_entry() will have relocated the kernel image if necessary
58
-
* and we return here with device tree address in x0 and the kernel
59
-
* entry point stored at *image_addr. Save those values in registers
60
-
* which are callee preserved.
57
+
* efi_entry() will have copied the kernel image if necessary and we
58
+
* return here with device tree address in x0 and the kernel entry
59
+
* point stored at *image_addr. Save those values in registers which
60
+
* are callee preserved.
61
61
*/
62
62
mov x20, x0 // DTB address
63
63
ldr x0, [sp, #16] // relocated _text address
64
64
mov x21, x0
65
65
66
66
/*
67
-
* Flush dcache covering current runtime addresses
68
-
* of kernel text/data. Then flush all of icache.
67
+
* Calculate size of the kernel Image (same for original and copy).
69
68
*/
70
69
adrp x1, _text
71
70
add x1, x1, #:lo12:_text
···
72
73
add x2, x2, #:lo12:_edata
73
74
sub x1, x2, x1
74
75
76
+
/*
77
+
* Flush the copied Image to the PoC, and ensure it is not shadowed by
78
+
* stale icache entries from before relocation.
79
+
*/
75
80
bl __flush_dcache_area
76
81
ic ialluis
82
+
83
+
/*
84
+
* Ensure that the rest of this function (in the original Image) is
85
+
* visible when the caches are disabled. The I-cache can't have stale
86
+
* entries for the VA range of the current image, so no maintenance is
87
+
* necessary.
88
+
*/
89
+
adr x0, efi_stub_entry
90
+
adr x1, efi_stub_entry_end
91
+
sub x1, x1, x0
92
+
bl __flush_dcache_area
77
93
78
94
/* Turn off Dcache and MMU */
79
95
mrs x0, CurrentEL
···
119
105
ldp x29, x30, [sp], #32
120
106
ret
121
107
108
+
efi_stub_entry_end:
122
109
ENDPROC(efi_stub_entry)
+3
-2
arch/arm64/kernel/insn.c
+3
-2
arch/arm64/kernel/insn.c
···
163
163
* which ends with "dsb; isb" pair guaranteeing global
164
164
* visibility.
165
165
*/
166
-
atomic_set(&pp->cpu_count, -1);
166
+
/* Notify other processors with an additional increment. */
167
+
atomic_inc(&pp->cpu_count);
167
168
} else {
168
-
while (atomic_read(&pp->cpu_count) != -1)
169
+
while (atomic_read(&pp->cpu_count) <= num_online_cpus())
169
170
cpu_relax();
170
171
isb();
171
172
}
+1
-1
arch/arm64/lib/clear_user.S
+1
-1
arch/arm64/lib/clear_user.S