Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Some final few intel fixes, all regressions, all stable cc, and one
exynos oops fixer.
The biggest is probably the intel display error irqs one, but it seems
to fix a few crashes on startup, and one use after free in drm core"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/exynos: Fix (more) freeing issues in exynos_drm_drv.c
drm/i915: Disable stolen memory when DMAR is active
Revert "drm/i915: don't touch the VDD when disabling the panel"
drm: Fix use-after-free in the shadow-attache exit code
drm/i915: Don't enable display error interrupts from the start
drm/i915: Fix scanline counter fixup on BDW
drm/i915: Add a workaround for HSW scanline counter weirdness
drm/i915: Fix PSR programming
+66
-35
+1
-1
drivers/gpu/drm/drm_pci.c
+1
-1
drivers/gpu/drm/drm_pci.c
+7
-3
drivers/gpu/drm/exynos/exynos_drm_drv.c
+7
-3
drivers/gpu/drm/exynos/exynos_drm_drv.c
···
172
172
173
173
ret = exynos_drm_subdrv_open(dev, file);
174
174
if (ret)
175
-
goto out;
175
+
goto err_file_priv_free;
176
176
177
177
anon_filp = anon_inode_getfile("exynos_gem", &exynos_drm_gem_fops,
178
178
NULL, 0);
179
179
if (IS_ERR(anon_filp)) {
180
180
ret = PTR_ERR(anon_filp);
181
-
goto out;
181
+
goto err_subdrv_close;
182
182
}
183
183
184
184
anon_filp->f_mode = FMODE_READ | FMODE_WRITE;
185
185
file_priv->anon_filp = anon_filp;
186
186
187
187
return ret;
188
-
out:
188
+
189
+
err_subdrv_close:
190
+
exynos_drm_subdrv_close(dev, file);
191
+
192
+
err_file_priv_free:
189
193
kfree(file_priv);
190
194
file->driver_priv = NULL;
191
195
return ret;
+7
drivers/gpu/drm/i915/i915_gem_stolen.c
+7
drivers/gpu/drm/i915/i915_gem_stolen.c
···
214
214
struct drm_i915_private *dev_priv = dev->dev_private;
215
215
int bios_reserved = 0;
216
216
217
+
#ifdef CONFIG_INTEL_IOMMU
218
+
if (intel_iommu_gfx_mapped) {
219
+
DRM_INFO("DMAR active, disabling use of stolen memory\n");
220
+
return 0;
221
+
}
222
+
#endif
223
+
217
224
if (dev_priv->gtt.stolen_size == 0)
218
225
return 0;
219
226
+40
-29
drivers/gpu/drm/i915/i915_irq.c
+40
-29
drivers/gpu/drm/i915/i915_irq.c
···
618
618
619
619
/* raw reads, only for fast reads of display block, no need for forcewake etc. */
620
620
#define __raw_i915_read32(dev_priv__, reg__) readl((dev_priv__)->regs + (reg__))
621
-
#define __raw_i915_read16(dev_priv__, reg__) readw((dev_priv__)->regs + (reg__))
622
621
623
622
static bool ilk_pipe_in_vblank_locked(struct drm_device *dev, enum pipe pipe)
624
623
{
625
624
struct drm_i915_private *dev_priv = dev->dev_private;
626
625
uint32_t status;
626
+
int reg;
627
627
628
-
if (INTEL_INFO(dev)->gen < 7) {
629
-
status = pipe == PIPE_A ?
630
-
DE_PIPEA_VBLANK :
631
-
DE_PIPEB_VBLANK;
628
+
if (INTEL_INFO(dev)->gen >= 8) {
629
+
status = GEN8_PIPE_VBLANK;
630
+
reg = GEN8_DE_PIPE_ISR(pipe);
631
+
} else if (INTEL_INFO(dev)->gen >= 7) {
632
+
status = DE_PIPE_VBLANK_IVB(pipe);
633
+
reg = DEISR;
632
634
} else {
633
-
switch (pipe) {
634
-
default:
635
-
case PIPE_A:
636
-
status = DE_PIPEA_VBLANK_IVB;
637
-
break;
638
-
case PIPE_B:
639
-
status = DE_PIPEB_VBLANK_IVB;
640
-
break;
641
-
case PIPE_C:
642
-
status = DE_PIPEC_VBLANK_IVB;
643
-
break;
644
-
}
635
+
status = DE_PIPE_VBLANK(pipe);
636
+
reg = DEISR;
645
637
}
646
638
647
-
return __raw_i915_read32(dev_priv, DEISR) & status;
639
+
return __raw_i915_read32(dev_priv, reg) & status;
648
640
}
649
641
650
642
static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
···
694
702
else
695
703
position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;
696
704
697
-
if (HAS_PCH_SPLIT(dev)) {
705
+
if (HAS_DDI(dev)) {
706
+
/*
707
+
* On HSW HDMI outputs there seems to be a 2 line
708
+
* difference, whereas eDP has the normal 1 line
709
+
* difference that earlier platforms have. External
710
+
* DP is unknown. For now just check for the 2 line
711
+
* difference case on all output types on HSW+.
712
+
*
713
+
* This might misinterpret the scanline counter being
714
+
* one line too far along on eDP, but that's less
715
+
* dangerous than the alternative since that would lead
716
+
* the vblank timestamp code astray when it sees a
717
+
* scanline count before vblank_start during a vblank
718
+
* interrupt.
719
+
*/
720
+
in_vbl = ilk_pipe_in_vblank_locked(dev, pipe);
721
+
if ((in_vbl && (position == vbl_start - 2 ||
722
+
position == vbl_start - 1)) ||
723
+
(!in_vbl && (position == vbl_end - 2 ||
724
+
position == vbl_end - 1)))
725
+
position = (position + 2) % vtotal;
726
+
} else if (HAS_PCH_SPLIT(dev)) {
698
727
/*
699
728
* The scanline counter increments at the leading edge
700
729
* of hsync, ie. it completely misses the active portion
···
2782
2769
return;
2783
2770
2784
2771
if (HAS_PCH_IBX(dev)) {
2785
-
mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
2786
-
SDE_TRANSA_FIFO_UNDER | SDE_POISON;
2772
+
mask = SDE_GMBUS | SDE_AUX_MASK | SDE_POISON;
2787
2773
} else {
2788
-
mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT;
2774
+
mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
2789
2775
2790
2776
I915_WRITE(SERR_INT, I915_READ(SERR_INT));
2791
2777
}
···
2844
2832
display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
2845
2833
DE_PCH_EVENT_IVB | DE_PLANEC_FLIP_DONE_IVB |
2846
2834
DE_PLANEB_FLIP_DONE_IVB |
2847
-
DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB |
2848
-
DE_ERR_INT_IVB);
2835
+
DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB);
2849
2836
extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
2850
-
DE_PIPEA_VBLANK_IVB);
2837
+
DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB);
2851
2838
2852
2839
I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
2853
2840
} else {
2854
2841
display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
2855
2842
DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
2856
2843
DE_AUX_CHANNEL_A |
2857
-
DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN |
2858
2844
DE_PIPEB_CRC_DONE | DE_PIPEA_CRC_DONE |
2859
2845
DE_POISON);
2860
-
extra_mask = DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT;
2846
+
extra_mask = DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT |
2847
+
DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN;
2861
2848
}
2862
2849
2863
2850
dev_priv->irq_mask = ~display_mask;
···
2972
2961
struct drm_device *dev = dev_priv->dev;
2973
2962
uint32_t de_pipe_masked = GEN8_PIPE_FLIP_DONE |
2974
2963
GEN8_PIPE_CDCLK_CRC_DONE |
2975
-
GEN8_PIPE_FIFO_UNDERRUN |
2976
2964
GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
2977
-
uint32_t de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK;
2965
+
uint32_t de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
2966
+
GEN8_PIPE_FIFO_UNDERRUN;
2978
2967
int pipe;
2979
2968
dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
2980
2969
dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;
+1
drivers/gpu/drm/i915/intel_ddi.c
+1
drivers/gpu/drm/i915/intel_ddi.c
···
1244
1244
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
1245
1245
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1246
1246
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
1247
+
ironlake_edp_panel_vdd_on(intel_dp);
1247
1248
ironlake_edp_panel_off(intel_dp);
1248
1249
}
1249
1250
+10
-2
drivers/gpu/drm/i915/intel_dp.c
+10
-2
drivers/gpu/drm/i915/intel_dp.c
···
1249
1249
1250
1250
DRM_DEBUG_KMS("Turn eDP power off\n");
1251
1251
1252
+
WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n");
1253
+
1252
1254
pp = ironlake_get_pp_control(intel_dp);
1253
1255
/* We need to switch off panel power _and_ force vdd, for otherwise some
1254
1256
* panels get very unhappy and cease to work. */
1255
-
pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_BLC_ENABLE);
1257
+
pp &= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE);
1256
1258
1257
1259
pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
1258
1260
1259
1261
I915_WRITE(pp_ctrl_reg, pp);
1260
1262
POSTING_READ(pp_ctrl_reg);
1261
1263
1264
+
intel_dp->want_panel_vdd = false;
1265
+
1262
1266
ironlake_wait_panel_off(intel_dp);
1267
+
1268
+
/* We got a reference when we enabled the VDD. */
1269
+
intel_runtime_pm_put(dev_priv);
1263
1270
}
1264
1271
1265
1272
void ironlake_edp_backlight_on(struct intel_dp *intel_dp)
···
1646
1639
val |= EDP_PSR_LINK_DISABLE;
1647
1640
1648
1641
I915_WRITE(EDP_PSR_CTL(dev), val |
1649
-
IS_BROADWELL(dev) ? 0 : link_entry_time |
1642
+
(IS_BROADWELL(dev) ? 0 : link_entry_time) |
1650
1643
max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT |
1651
1644
idle_frames << EDP_PSR_IDLE_FRAME_SHIFT |
1652
1645
EDP_PSR_ENABLE);
···
1791
1784
1792
1785
/* Make sure the panel is off before trying to change the mode. But also
1793
1786
* ensure that we have vdd while we switch off the panel. */
1787
+
ironlake_edp_panel_vdd_on(intel_dp);
1794
1788
ironlake_edp_backlight_off(intel_dp);
1795
1789
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
1796
1790
ironlake_edp_panel_off(intel_dp);