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intel_th: msu: Preserve pre-existing buffer configuration

The MSU configuration registers may contain buffer address/size set by
the BIOS or an external hardware debugger, which may want to take over
tracing from the driver when the driver is not actively tracing.

Preserve these settings when not actively tracing.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190705141425.19894-6-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Alexander Shishkin and committed by
Greg Kroah-Hartman 092f47c3 ed5207af

+7 -2
+7 -2
drivers/hwtracing/intel_th/msu.c
··· 143 143 unsigned int single_wrap : 1; 144 144 void *base; 145 145 dma_addr_t base_addr; 146 + u32 orig_addr; 147 + u32 orig_sz; 146 148 147 149 /* <0: no buffer, 0: no users, >0: active users */ 148 150 atomic_t user_count; ··· 769 767 msc_buffer_clear_hw_header(msc); 770 768 } 771 769 770 + msc->orig_addr = ioread32(msc->reg_base + REG_MSU_MSC0BAR); 771 + msc->orig_sz = ioread32(msc->reg_base + REG_MSU_MSC0SIZE); 772 + 772 773 reg = msc->base_addr >> PAGE_SHIFT; 773 774 iowrite32(reg, msc->reg_base + REG_MSU_MSC0BAR); 774 775 ··· 846 841 847 842 msc->enabled = 0; 848 843 849 - iowrite32(0, msc->reg_base + REG_MSU_MSC0BAR); 850 - iowrite32(0, msc->reg_base + REG_MSU_MSC0SIZE); 844 + iowrite32(msc->orig_addr, msc->reg_base + REG_MSU_MSC0BAR); 845 + iowrite32(msc->orig_sz, msc->reg_base + REG_MSU_MSC0SIZE); 851 846 852 847 dev_dbg(msc_dev(msc), "MSCnNWSA: %08x\n", 853 848 ioread32(msc->reg_base + REG_MSU_MSC0NWSA));