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drm/xe/guc: Drop redundant register read

The xe_mmio_wait32() already returns the last value of the register
for which we were waiting, there is no need read it again.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260127193727.601-5-michal.wajdeczko@intel.com

+4 -5
+4 -5
drivers/gpu/drm/xe/xe_guc.c
··· 1405 1405 struct xe_device *xe = guc_to_xe(guc); 1406 1406 struct xe_gt *gt = guc_to_gt(guc); 1407 1407 struct xe_mmio *mmio = &gt->mmio; 1408 - u32 header, reply; 1409 1408 struct xe_reg reply_reg = xe_gt_is_media_type(gt) ? 1410 1409 MED_VF_SW_FLAG(0) : VF_SW_FLAG(0); 1411 1410 const u32 LAST_INDEX = VF_SW_FLAG_COUNT - 1; 1412 1411 bool lost = false; 1412 + u32 header; 1413 1413 int ret; 1414 1414 int i; 1415 1415 ··· 1441 1441 1442 1442 ret = xe_mmio_wait32(mmio, reply_reg, GUC_HXG_MSG_0_ORIGIN, 1443 1443 FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC), 1444 - 50000, &reply, false); 1444 + 50000, &header, false); 1445 1445 if (ret) { 1446 1446 /* scratch registers might be cleared during FLR, try once more */ 1447 - if (!reply && !lost) { 1447 + if (!header && !lost) { 1448 1448 xe_gt_dbg(gt, "GuC mmio request %#x: lost, trying again\n", request[0]); 1449 1449 lost = true; 1450 1450 goto retry; 1451 1451 } 1452 1452 timeout: 1453 1453 xe_gt_err(gt, "GuC mmio request %#x: no reply %#x\n", 1454 - request[0], reply); 1454 + request[0], header); 1455 1455 return ret; 1456 1456 } 1457 1457 1458 - header = xe_mmio_read32(mmio, reply_reg); 1459 1458 if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) == 1460 1459 GUC_HXG_TYPE_NO_RESPONSE_BUSY) { 1461 1460 /*