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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon:
"Two KVM/arm fixes for MMIO emulation and UBSAN.

Unusually, we're routing them via the arm64 tree as per Paolo's
request on the list:

https://lore.kernel.org/kvm/21ae69a2-2546-29d0-bff6-2ea825e3d968@redhat.com/

We don't actually have any other arm64 fixes pending at the moment
(touch wood), so I've pulled from Marc, written a merge commit, tagged
the result and run it through my build/boot/bisect scripts"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
KVM: arm/arm64: VGIC: Properly initialise private IRQ affinity
KVM: arm/arm64: Only skip MMIO insn once

+27 -10
+7
virt/kvm/arm/mmio.c
··· 86 86 unsigned int len; 87 87 int mask; 88 88 89 + /* Detect an already handled MMIO return */ 90 + if (unlikely(!vcpu->mmio_needed)) 91 + return 0; 92 + 93 + vcpu->mmio_needed = 0; 94 + 89 95 if (!run->mmio.is_write) { 90 96 len = run->mmio.len; 91 97 if (len > sizeof(unsigned long)) ··· 194 188 run->mmio.is_write = is_write; 195 189 run->mmio.phys_addr = fault_ipa; 196 190 run->mmio.len = len; 191 + vcpu->mmio_needed = 1; 197 192 198 193 if (!ret) { 199 194 /* We handled the access successfully in the kernel. */
+20 -10
virt/kvm/arm/vgic/vgic-init.c
··· 8 8 #include <linux/cpu.h> 9 9 #include <linux/kvm_host.h> 10 10 #include <kvm/arm_vgic.h> 11 + #include <asm/kvm_emulate.h> 11 12 #include <asm/kvm_mmu.h> 12 13 #include "vgic.h" 13 14 ··· 165 164 irq->vcpu = NULL; 166 165 irq->target_vcpu = vcpu0; 167 166 kref_init(&irq->refcount); 168 - if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) { 167 + switch (dist->vgic_model) { 168 + case KVM_DEV_TYPE_ARM_VGIC_V2: 169 169 irq->targets = 0; 170 170 irq->group = 0; 171 - } else { 171 + break; 172 + case KVM_DEV_TYPE_ARM_VGIC_V3: 172 173 irq->mpidr = 0; 173 174 irq->group = 1; 175 + break; 176 + default: 177 + kfree(dist->spis); 178 + return -EINVAL; 174 179 } 175 180 } 176 181 return 0; ··· 216 209 irq->intid = i; 217 210 irq->vcpu = NULL; 218 211 irq->target_vcpu = vcpu; 219 - irq->targets = 1U << vcpu->vcpu_id; 220 212 kref_init(&irq->refcount); 221 213 if (vgic_irq_is_sgi(i)) { 222 214 /* SGIs */ ··· 225 219 /* PPIs */ 226 220 irq->config = VGIC_CONFIG_LEVEL; 227 221 } 228 - 229 - if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) 230 - irq->group = 1; 231 - else 232 - irq->group = 0; 233 222 } 234 223 235 224 if (!irqchip_in_kernel(vcpu->kvm)) ··· 287 286 288 287 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { 289 288 struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; 290 - if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) 289 + switch (dist->vgic_model) { 290 + case KVM_DEV_TYPE_ARM_VGIC_V3: 291 291 irq->group = 1; 292 - else 292 + irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu); 293 + break; 294 + case KVM_DEV_TYPE_ARM_VGIC_V2: 293 295 irq->group = 0; 296 + irq->targets = 1U << idx; 297 + break; 298 + default: 299 + ret = -EINVAL; 300 + goto out; 301 + } 294 302 } 295 303 } 296 304