Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

dt-bindings: display: bridge: Add ITE IT6263 LVDS to HDMI converter

Document ITE IT6263 LVDS to HDMI converter.

Product link:
https://www.ite.com.tw/en/product/cate1/IT6263

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-10-victor.liu@nxp.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

authored by

Liu Ying and committed by
Dmitry Baryshkov
0a86a4d1 8cd4937e

+250
+250
Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ITE IT6263 LVDS to HDMI converter 8 + 9 + maintainers: 10 + - Liu Ying <victor.liu@nxp.com> 11 + 12 + description: | 13 + The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS 14 + to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitter, 15 + the IT6263 supports LVDS input and HDMI 1.4 output by conversion function. 16 + The built-in LVDS receiver can support single-link and dual-link LVDS inputs, 17 + and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP 18 + 1.2 and backward compatible with DVI 1.0 specification. 19 + 20 + The IT6263 also encodes and transmits up to 8 channels of I2S digital audio, 21 + with sampling rate up to 192KHz and sample size up to 24 bits. In addition, 22 + an S/PDIF input port takes in compressed audio of up to 192KHz frame rate. 23 + 24 + The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is 25 + provided by the IT6263 in two interfaces: the four I2S input ports or the 26 + S/PDIF input port. With both interfaces the highest possible HBR frame rate 27 + is supported at up to 768KHz. 28 + 29 + allOf: 30 + - $ref: /schemas/display/lvds-dual-ports.yaml# 31 + 32 + properties: 33 + compatible: 34 + const: ite,it6263 35 + 36 + reg: 37 + maxItems: 1 38 + 39 + clocks: 40 + maxItems: 1 41 + description: audio master clock 42 + 43 + clock-names: 44 + const: mclk 45 + 46 + data-mapping: 47 + enum: 48 + - jeida-18 49 + - jeida-24 50 + - jeida-30 51 + - vesa-24 52 + - vesa-30 53 + 54 + reset-gpios: 55 + maxItems: 1 56 + 57 + ivdd-supply: 58 + description: 1.8V digital logic power 59 + 60 + ovdd-supply: 61 + description: 3.3V I/O pin power 62 + 63 + txavcc18-supply: 64 + description: 1.8V HDMI analog frontend power 65 + 66 + txavcc33-supply: 67 + description: 3.3V HDMI analog frontend power 68 + 69 + pvcc1-supply: 70 + description: 1.8V HDMI frontend core PLL power 71 + 72 + pvcc2-supply: 73 + description: 1.8V HDMI frontend filter PLL power 74 + 75 + avcc-supply: 76 + description: 3.3V LVDS frontend power 77 + 78 + anvdd-supply: 79 + description: 1.8V LVDS frontend analog power 80 + 81 + apvdd-supply: 82 + description: 1.8V LVDS frontend PLL power 83 + 84 + "#sound-dai-cells": 85 + const: 0 86 + 87 + ite,i2s-audio-fifo-sources: 88 + $ref: /schemas/types.yaml#/definitions/uint32-array 89 + minItems: 1 90 + maxItems: 4 91 + items: 92 + enum: [0, 1, 2, 3] 93 + description: 94 + Each array element indicates the pin number of an I2S serial data input 95 + line which is connected to an audio FIFO, from audio FIFO0 to FIFO3. 96 + 97 + ite,rl-channel-swap-audio-sources: 98 + $ref: /schemas/types.yaml#/definitions/uint32-array 99 + minItems: 1 100 + maxItems: 4 101 + uniqueItems: true 102 + items: 103 + enum: [0, 1, 2, 3] 104 + description: 105 + Each array element indicates an audio source whose right channel and left 106 + channel are swapped by this converter. For I2S, the element is the pin 107 + number of an I2S serial data input line. For S/PDIF, the element is always 108 + 0. 109 + 110 + ports: 111 + $ref: /schemas/graph.yaml#/properties/ports 112 + 113 + properties: 114 + port@0: true 115 + 116 + port@1: 117 + oneOf: 118 + - required: [dual-lvds-odd-pixels] 119 + - required: [dual-lvds-even-pixels] 120 + 121 + port@2: 122 + $ref: /schemas/graph.yaml#/properties/port 123 + description: video port for the HDMI output 124 + 125 + port@3: 126 + $ref: /schemas/graph.yaml#/properties/port 127 + description: sound input port 128 + 129 + required: 130 + - port@0 131 + - port@2 132 + 133 + required: 134 + - compatible 135 + - reg 136 + - data-mapping 137 + - ivdd-supply 138 + - ovdd-supply 139 + - txavcc18-supply 140 + - txavcc33-supply 141 + - pvcc1-supply 142 + - pvcc2-supply 143 + - avcc-supply 144 + - anvdd-supply 145 + - apvdd-supply 146 + 147 + unevaluatedProperties: false 148 + 149 + examples: 150 + - | 151 + /* single-link LVDS input */ 152 + #include <dt-bindings/gpio/gpio.h> 153 + 154 + i2c { 155 + #address-cells = <1>; 156 + #size-cells = <0>; 157 + 158 + hdmi@4c { 159 + compatible = "ite,it6263"; 160 + reg = <0x4c>; 161 + data-mapping = "jeida-24"; 162 + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 163 + ivdd-supply = <&reg_buck5>; 164 + ovdd-supply = <&reg_vext_3v3>; 165 + txavcc18-supply = <&reg_buck5>; 166 + txavcc33-supply = <&reg_vext_3v3>; 167 + pvcc1-supply = <&reg_buck5>; 168 + pvcc2-supply = <&reg_buck5>; 169 + avcc-supply = <&reg_vext_3v3>; 170 + anvdd-supply = <&reg_buck5>; 171 + apvdd-supply = <&reg_buck5>; 172 + 173 + ports { 174 + #address-cells = <1>; 175 + #size-cells = <0>; 176 + 177 + port@0 { 178 + reg = <0>; 179 + 180 + it6263_lvds_link1: endpoint { 181 + remote-endpoint = <&ldb_lvds_ch0>; 182 + }; 183 + }; 184 + 185 + port@2 { 186 + reg = <2>; 187 + 188 + it6263_out: endpoint { 189 + remote-endpoint = <&hdmi_in>; 190 + }; 191 + }; 192 + }; 193 + }; 194 + }; 195 + 196 + - | 197 + /* dual-link LVDS input */ 198 + #include <dt-bindings/gpio/gpio.h> 199 + 200 + i2c { 201 + #address-cells = <1>; 202 + #size-cells = <0>; 203 + 204 + hdmi@4c { 205 + compatible = "ite,it6263"; 206 + reg = <0x4c>; 207 + data-mapping = "jeida-24"; 208 + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 209 + ivdd-supply = <&reg_buck5>; 210 + ovdd-supply = <&reg_vext_3v3>; 211 + txavcc18-supply = <&reg_buck5>; 212 + txavcc33-supply = <&reg_vext_3v3>; 213 + pvcc1-supply = <&reg_buck5>; 214 + pvcc2-supply = <&reg_buck5>; 215 + avcc-supply = <&reg_vext_3v3>; 216 + anvdd-supply = <&reg_buck5>; 217 + apvdd-supply = <&reg_buck5>; 218 + 219 + ports { 220 + #address-cells = <1>; 221 + #size-cells = <0>; 222 + 223 + port@0 { 224 + reg = <0>; 225 + dual-lvds-odd-pixels; 226 + 227 + it6263_lvds_link1_dual: endpoint { 228 + remote-endpoint = <&ldb_lvds_ch0>; 229 + }; 230 + }; 231 + 232 + port@1 { 233 + reg = <1>; 234 + dual-lvds-even-pixels; 235 + 236 + it6263_lvds_link2_dual: endpoint { 237 + remote-endpoint = <&ldb_lvds_ch1>; 238 + }; 239 + }; 240 + 241 + port@2 { 242 + reg = <2>; 243 + 244 + it6263_out_dual: endpoint { 245 + remote-endpoint = <&hdmi_in>; 246 + }; 247 + }; 248 + }; 249 + }; 250 + };