Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue
Tony Nguyen says:
====================
Intel Wired LAN Driver Updates 2025-07-18 (idpf, ice, igc, igbvf, ixgbevf)
For idpf:
Ahmed and Sudheer add support for flow steering via ntuple filters.
Current support is for IPv4 and TCP/UDP only.
Milena adds support for cross timestamping.
Ahmed preserves coalesce settings across resets.
For ice:
Alex adds reporting of 40GbE speed in devlink port split.
Dawid adds support for E835 devices.
Jesse refactors profile ptype processing for cleaner, more readable,
code.
Dave adds a couple of helper functions for LAG to reduce code
duplication.
For igc:
Siang adds support to configure "Default Queue" during runtime using
ethtool's Network Flow Classification (NFC) wildcard rule approach.
For igbvf:
Yuto Ohnuki removes unused fields from igbvf_adapter.
For ixgbevf:
Yuto Ohnuki removes unused fields from ixgbevf_adapter.
* '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue:
ixgbevf: remove unused fields from struct ixgbevf_adapter
igbvf: remove unused fields from struct igbvf_adapter
igc: Add wildcard rule support to ethtool NFC using Default Queue
igc: Relocate RSS field definitions to igc_defines.h
ice: breakout common LAG code into helpers
ice: convert ice_add_prof() to bitmap
ice: add E835 device IDs
ice: add 40G speed to Admin Command GET PORT OPTION
idpf: preserve coalescing settings across resets
idpf: add cross timestamping
idpf: add flow steering support
virtchnl2: add flow steering support
virtchnl2: rename enum virtchnl2_cap_rss
====================
Link: https://patch.msgid.link/20250718185118.2042772-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+1122
-195
+2
drivers/net/ethernet/intel/ice/devlink/port.c
+2
drivers/net/ethernet/intel/ice/devlink/port.c
+1
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
+1
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
+10
-1
drivers/net/ethernet/intel/ice/ice_common.c
+10
-1
drivers/net/ethernet/intel/ice/ice_common.c
···
171
171
case ICE_DEV_ID_E830_XXV_QSFP:
172
172
case ICE_DEV_ID_E830C_SFP:
173
173
case ICE_DEV_ID_E830_XXV_SFP:
174
+
case ICE_DEV_ID_E835CC_BACKPLANE:
175
+
case ICE_DEV_ID_E835CC_QSFP56:
176
+
case ICE_DEV_ID_E835CC_SFP:
177
+
case ICE_DEV_ID_E835C_BACKPLANE:
178
+
case ICE_DEV_ID_E835C_QSFP:
179
+
case ICE_DEV_ID_E835C_SFP:
180
+
case ICE_DEV_ID_E835_L_BACKPLANE:
181
+
case ICE_DEV_ID_E835_L_QSFP:
182
+
case ICE_DEV_ID_E835_L_SFP:
174
183
hw->mac_type = ICE_MAC_E830;
175
184
break;
176
185
default:
···
4316
4307
4317
4308
speed = options[active_idx].max_lane_speed;
4318
4309
/* If we don't get speed for this lane, it's unoccupied */
4319
-
if (speed > ICE_AQC_PORT_OPT_MAX_LANE_200G)
4310
+
if (speed > ICE_AQC_PORT_OPT_MAX_LANE_40G)
4320
4311
continue;
4321
4312
4322
4313
if (hw->pf_id == lport) {
+18
drivers/net/ethernet/intel/ice/ice_devids.h
+18
drivers/net/ethernet/intel/ice/ice_devids.h
···
6
6
7
7
/* Device IDs */
8
8
#define ICE_DEV_ID_E822_SI_DFLT 0x1888
9
+
/* Intel(R) Ethernet Controller E835-CC for backplane */
10
+
#define ICE_DEV_ID_E835CC_BACKPLANE 0x1248
11
+
/* Intel(R) Ethernet Controller E835-CC for QSFP */
12
+
#define ICE_DEV_ID_E835CC_QSFP56 0x1249
13
+
/* Intel(R) Ethernet Controller E835-CC for SFP */
14
+
#define ICE_DEV_ID_E835CC_SFP 0x124A
15
+
/* Intel(R) Ethernet Controller E835-C for backplane */
16
+
#define ICE_DEV_ID_E835C_BACKPLANE 0x1261
17
+
/* Intel(R) Ethernet Controller E835-C for QSFP */
18
+
#define ICE_DEV_ID_E835C_QSFP 0x1262
19
+
/* Intel(R) Ethernet Controller E835-C for SFP */
20
+
#define ICE_DEV_ID_E835C_SFP 0x1263
21
+
/* Intel(R) Ethernet Controller E835-L for backplane */
22
+
#define ICE_DEV_ID_E835_L_BACKPLANE 0x1265
23
+
/* Intel(R) Ethernet Controller E835-L for QSFP */
24
+
#define ICE_DEV_ID_E835_L_QSFP 0x1266
25
+
/* Intel(R) Ethernet Controller E835-L for SFP */
26
+
#define ICE_DEV_ID_E835_L_SFP 0x1267
9
27
/* Intel(R) Ethernet Connection E823-L for backplane */
10
28
#define ICE_DEV_ID_E823L_BACKPLANE 0x124C
11
29
/* Intel(R) Ethernet Connection E823-L for SFP */
+2
-1
drivers/net/ethernet/intel/ice/ice_ethtool.c
+2
-1
drivers/net/ethernet/intel/ice/ice_ethtool.c
···
667
667
668
668
if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_100G)
669
669
port_topology->serdes_lane_count = 4;
670
-
else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G)
670
+
else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G ||
671
+
max_speed == ICE_AQC_PORT_OPT_MAX_LANE_40G)
671
672
port_topology->serdes_lane_count = 2;
672
673
else
673
674
port_topology->serdes_lane_count = 1;
+28
-50
drivers/net/ethernet/intel/ice/ice_flex_pipe.c
+28
-50
drivers/net/ethernet/intel/ice/ice_flex_pipe.c
···
3043
3043
* the ID value used here.
3044
3044
*/
3045
3045
int
3046
-
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
3047
-
const struct ice_ptype_attributes *attr, u16 attr_cnt,
3048
-
struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap)
3046
+
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,
3047
+
unsigned long *ptypes, const struct ice_ptype_attributes *attr,
3048
+
u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool symm,
3049
+
bool fd_swap)
3049
3050
{
3050
-
u32 bytes = DIV_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
3051
3051
DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
3052
3052
struct ice_prof_map *prof;
3053
-
u8 byte = 0;
3054
-
u8 prof_id;
3055
3053
int status;
3054
+
u8 prof_id;
3055
+
u16 ptype;
3056
3056
3057
3057
bitmap_zero(ptgs_used, ICE_XLT1_CNT);
3058
3058
···
3102
3102
prof->context = 0;
3103
3103
3104
3104
/* build list of ptgs */
3105
-
while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {
3106
-
u8 bit;
3105
+
for_each_set_bit(ptype, ptypes, ICE_FLOW_PTYPE_MAX) {
3106
+
u8 ptg;
3107
3107
3108
-
if (!ptypes[byte]) {
3109
-
bytes--;
3110
-
byte++;
3108
+
/* The package should place all ptypes in a non-zero
3109
+
* PTG, so the following call should never fail.
3110
+
*/
3111
+
if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
3111
3112
continue;
3112
-
}
3113
3113
3114
-
/* Examine 8 bits per byte */
3115
-
for_each_set_bit(bit, (unsigned long *)&ptypes[byte],
3116
-
BITS_PER_BYTE) {
3117
-
u16 ptype;
3118
-
u8 ptg;
3114
+
/* If PTG is already added, skip and continue */
3115
+
if (test_bit(ptg, ptgs_used))
3116
+
continue;
3119
3117
3120
-
ptype = byte * BITS_PER_BYTE + bit;
3118
+
set_bit(ptg, ptgs_used);
3119
+
/* Check to see there are any attributes for this ptype, and
3120
+
* add them if found.
3121
+
*/
3122
+
status = ice_add_prof_attrib(prof, ptg, ptype, attr, attr_cnt);
3123
+
if (status == -ENOSPC)
3124
+
break;
3125
+
if (status) {
3126
+
/* This is simple a ptype/PTG with no attribute */
3127
+
prof->ptg[prof->ptg_cnt] = ptg;
3128
+
prof->attr[prof->ptg_cnt].flags = 0;
3129
+
prof->attr[prof->ptg_cnt].mask = 0;
3121
3130
3122
-
/* The package should place all ptypes in a non-zero
3123
-
* PTG, so the following call should never fail.
3124
-
*/
3125
-
if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
3126
-
continue;
3127
-
3128
-
/* If PTG is already added, skip and continue */
3129
-
if (test_bit(ptg, ptgs_used))
3130
-
continue;
3131
-
3132
-
__set_bit(ptg, ptgs_used);
3133
-
/* Check to see there are any attributes for
3134
-
* this PTYPE, and add them if found.
3135
-
*/
3136
-
status = ice_add_prof_attrib(prof, ptg, ptype,
3137
-
attr, attr_cnt);
3138
-
if (status == -ENOSPC)
3131
+
if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
3139
3132
break;
3140
-
if (status) {
3141
-
/* This is simple a PTYPE/PTG with no
3142
-
* attribute
3143
-
*/
3144
-
prof->ptg[prof->ptg_cnt] = ptg;
3145
-
prof->attr[prof->ptg_cnt].flags = 0;
3146
-
prof->attr[prof->ptg_cnt].mask = 0;
3147
-
3148
-
if (++prof->ptg_cnt >=
3149
-
ICE_MAX_PTG_PER_PROFILE)
3150
-
break;
3151
-
}
3152
3133
}
3153
-
3154
-
bytes--;
3155
-
byte++;
3156
3134
}
3157
3135
3158
3136
list_add(&prof->list, &hw->blk[blk].es.prof_map);
+4
-3
drivers/net/ethernet/intel/ice/ice_flex_pipe.h
+4
-3
drivers/net/ethernet/intel/ice/ice_flex_pipe.h
···
39
39
40
40
/* XLT2/VSI group functions */
41
41
int
42
-
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
43
-
const struct ice_ptype_attributes *attr, u16 attr_cnt,
44
-
struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap);
42
+
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,
43
+
unsigned long *ptypes, const struct ice_ptype_attributes *attr,
44
+
u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool symm,
45
+
bool fd_swap);
45
46
struct ice_prof_map *
46
47
ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);
47
48
int
+2
-2
drivers/net/ethernet/intel/ice/ice_flow.c
+2
-2
drivers/net/ethernet/intel/ice/ice_flow.c
···
1421
1421
}
1422
1422
1423
1423
/* Add a HW profile for this flow profile */
1424
-
status = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,
1424
+
status = ice_add_prof(hw, blk, prof_id, params->ptypes,
1425
1425
params->attr, params->attr_cnt, params->es,
1426
1426
params->mask, symm, true);
1427
1427
if (status) {
···
1617
1617
break;
1618
1618
}
1619
1619
1620
-
status = ice_add_prof(hw, blk, id, (u8 *)prof->ptypes,
1620
+
status = ice_add_prof(hw, blk, id, prof->ptypes,
1621
1621
params->attr, params->attr_cnt,
1622
1622
params->es, params->mask, false, false);
1623
1623
if (status)
+42
drivers/net/ethernet/intel/ice/ice_lag.c
+42
drivers/net/ethernet/intel/ice/ice_lag.c
···
823
823
}
824
824
825
825
/**
826
+
* ice_lag_prepare_vf_reset - helper to adjust vf lag for reset
827
+
* @lag: lag struct for interface that owns VF
828
+
*
829
+
* Context: must be called with the lag_mutex lock held.
830
+
*
831
+
* Return: active lport value or ICE_LAG_INVALID_PORT if nothing moved.
832
+
*/
833
+
u8 ice_lag_prepare_vf_reset(struct ice_lag *lag)
834
+
{
835
+
u8 pri_prt, act_prt;
836
+
837
+
if (lag && lag->bonded && lag->primary && lag->upper_netdev) {
838
+
pri_prt = lag->pf->hw.port_info->lport;
839
+
act_prt = lag->active_port;
840
+
if (act_prt != pri_prt && act_prt != ICE_LAG_INVALID_PORT) {
841
+
ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);
842
+
return act_prt;
843
+
}
844
+
}
845
+
846
+
return ICE_LAG_INVALID_PORT;
847
+
}
848
+
849
+
/**
850
+
* ice_lag_complete_vf_reset - helper for lag after reset
851
+
* @lag: lag struct for primary interface
852
+
* @act_prt: which port should be active for lag
853
+
*
854
+
* Context: must be called while holding the lag_mutex.
855
+
*/
856
+
void ice_lag_complete_vf_reset(struct ice_lag *lag, u8 act_prt)
857
+
{
858
+
u8 pri_prt;
859
+
860
+
if (lag && lag->bonded && lag->primary &&
861
+
act_prt != ICE_LAG_INVALID_PORT) {
862
+
pri_prt = lag->pf->hw.port_info->lport;
863
+
ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
864
+
}
865
+
}
866
+
867
+
/**
826
868
* ice_lag_info_event - handle NETDEV_BONDING_INFO event
827
869
* @lag: LAG info struct
828
870
* @ptr: opaque data pointer
+2
drivers/net/ethernet/intel/ice/ice_lag.h
+2
drivers/net/ethernet/intel/ice/ice_lag.h
···
70
70
void ice_lag_rebuild(struct ice_pf *pf);
71
71
bool ice_lag_is_switchdev_running(struct ice_pf *pf);
72
72
void ice_lag_move_vf_nodes_cfg(struct ice_lag *lag, u8 src_prt, u8 dst_prt);
73
+
u8 ice_lag_prepare_vf_reset(struct ice_lag *lag);
74
+
void ice_lag_complete_vf_reset(struct ice_lag *lag, u8 act_prt);
73
75
#endif /* _ICE_LAG_H_ */
+9
drivers/net/ethernet/intel/ice/ice_main.c
+9
drivers/net/ethernet/intel/ice/ice_main.c
···
5897
5897
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830_XXV_QSFP), },
5898
5898
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830C_SFP), },
5899
5899
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830_XXV_SFP), },
5900
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_BACKPLANE), },
5901
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_QSFP56), },
5902
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_SFP), },
5903
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_BACKPLANE), },
5904
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_QSFP), },
5905
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_SFP), },
5906
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_BACKPLANE), },
5907
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_QSFP), },
5908
+
{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_SFP), },
5900
5909
/* required last entry */
5901
5910
{}
5902
5911
};
+3
-16
drivers/net/ethernet/intel/ice/ice_vf_lib.c
+3
-16
drivers/net/ethernet/intel/ice/ice_vf_lib.c
···
859
859
int ice_reset_vf(struct ice_vf *vf, u32 flags)
860
860
{
861
861
struct ice_pf *pf = vf->pf;
862
-
struct ice_lag *lag;
863
862
struct ice_vsi *vsi;
864
-
u8 act_prt, pri_prt;
865
863
struct device *dev;
866
864
int err = 0;
865
+
u8 act_prt;
867
866
bool rsd;
868
867
869
868
dev = ice_pf_to_dev(pf);
870
-
act_prt = ICE_LAG_INVALID_PORT;
871
-
pri_prt = pf->hw.port_info->lport;
872
869
873
870
if (flags & ICE_VF_RESET_NOTIFY)
874
871
ice_notify_vf_reset(vf);
···
881
884
else
882
885
lockdep_assert_held(&vf->cfg_lock);
883
886
884
-
lag = pf->lag;
885
887
mutex_lock(&pf->lag_mutex);
886
-
if (lag && lag->bonded && lag->primary) {
887
-
act_prt = lag->active_port;
888
-
if (act_prt != pri_prt && act_prt != ICE_LAG_INVALID_PORT &&
889
-
lag->upper_netdev)
890
-
ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);
891
-
else
892
-
act_prt = ICE_LAG_INVALID_PORT;
893
-
}
888
+
act_prt = ice_lag_prepare_vf_reset(pf->lag);
894
889
895
890
if (ice_is_vf_disabled(vf)) {
896
891
vsi = ice_get_vf_vsi(vf);
···
968
979
ice_reset_vf_mbx_cnt(vf);
969
980
970
981
out_unlock:
971
-
if (lag && lag->bonded && lag->primary &&
972
-
act_prt != ICE_LAG_INVALID_PORT)
973
-
ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
982
+
ice_lag_complete_vf_reset(pf->lag, act_prt);
974
983
mutex_unlock(&pf->lag_mutex);
975
984
976
985
if (flags & ICE_VF_RESET_LOCK)
+4
-19
drivers/net/ethernet/intel/ice/ice_virtchnl.c
+4
-19
drivers/net/ethernet/intel/ice/ice_virtchnl.c
···
1996
1996
(struct virtchnl_vsi_queue_config_info *)msg;
1997
1997
struct virtchnl_queue_pair_info *qpi;
1998
1998
struct ice_pf *pf = vf->pf;
1999
-
struct ice_lag *lag;
2000
1999
struct ice_vsi *vsi;
2001
-
u8 act_prt, pri_prt;
2002
2000
int i = -1, q_idx;
2003
2001
bool ena_ts;
2002
+
u8 act_prt;
2004
2003
2005
-
lag = pf->lag;
2006
2004
mutex_lock(&pf->lag_mutex);
2007
-
act_prt = ICE_LAG_INVALID_PORT;
2008
-
pri_prt = pf->hw.port_info->lport;
2009
-
if (lag && lag->bonded && lag->primary) {
2010
-
act_prt = lag->active_port;
2011
-
if (act_prt != pri_prt && act_prt != ICE_LAG_INVALID_PORT &&
2012
-
lag->upper_netdev)
2013
-
ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);
2014
-
else
2015
-
act_prt = ICE_LAG_INVALID_PORT;
2016
-
}
2005
+
act_prt = ice_lag_prepare_vf_reset(pf->lag);
2017
2006
2018
2007
if (!test_bit(ICE_VF_STATE_ACTIVE, vf->vf_states))
2019
2008
goto error_param;
···
2130
2141
}
2131
2142
}
2132
2143
2133
-
if (lag && lag->bonded && lag->primary &&
2134
-
act_prt != ICE_LAG_INVALID_PORT)
2135
-
ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
2144
+
ice_lag_complete_vf_reset(pf->lag, act_prt);
2136
2145
mutex_unlock(&pf->lag_mutex);
2137
2146
2138
2147
/* send the response to the VF */
···
2147
2160
vf->vf_id, i);
2148
2161
}
2149
2162
2150
-
if (lag && lag->bonded && lag->primary &&
2151
-
act_prt != ICE_LAG_INVALID_PORT)
2152
-
ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
2163
+
ice_lag_complete_vf_reset(pf->lag, act_prt);
2153
2164
mutex_unlock(&pf->lag_mutex);
2154
2165
2155
2166
ice_lag_move_new_vf_nodes(vf);
+42
-10
drivers/net/ethernet/intel/idpf/idpf.h
+42
-10
drivers/net/ethernet/intel/idpf/idpf.h
···
269
269
struct virtchnl2_vport_stats vport_stats;
270
270
};
271
271
272
+
struct idpf_fsteer_fltr {
273
+
struct list_head list;
274
+
u32 loc;
275
+
u32 q_index;
276
+
};
277
+
272
278
/**
273
279
* struct idpf_vport - Handle for netdevices and queue resources
274
280
* @num_txq: Number of allocated TX queues
···
406
400
};
407
401
408
402
/**
403
+
* struct idpf_q_coalesce - User defined coalescing configuration values for
404
+
* a single queue.
405
+
* @tx_intr_mode: Dynamic TX ITR or not
406
+
* @rx_intr_mode: Dynamic RX ITR or not
407
+
* @tx_coalesce_usecs: TX interrupt throttling rate
408
+
* @rx_coalesce_usecs: RX interrupt throttling rate
409
+
*
410
+
* Used to restore user coalescing configuration after a reset.
411
+
*/
412
+
struct idpf_q_coalesce {
413
+
u32 tx_intr_mode;
414
+
u32 rx_intr_mode;
415
+
u32 tx_coalesce_usecs;
416
+
u32 rx_coalesce_usecs;
417
+
};
418
+
419
+
/**
409
420
* struct idpf_vport_user_config_data - User defined configuration values for
410
421
* each vport.
411
422
* @rss_data: See struct idpf_rss_data
423
+
* @q_coalesce: Array of per queue coalescing data
412
424
* @num_req_tx_qs: Number of user requested TX queues through ethtool
413
425
* @num_req_rx_qs: Number of user requested RX queues through ethtool
414
426
* @num_req_txq_desc: Number of user requested TX queue descriptors through
···
435
411
* ethtool
436
412
* @user_flags: User toggled config flags
437
413
* @mac_filter_list: List of MAC filters
414
+
* @num_fsteer_fltrs: number of flow steering filters
415
+
* @flow_steer_list: list of flow steering filters
438
416
*
439
417
* Used to restore configuration after a reset as the vport will get wiped.
440
418
*/
441
419
struct idpf_vport_user_config_data {
442
420
struct idpf_rss_data rss_data;
421
+
struct idpf_q_coalesce *q_coalesce;
443
422
u16 num_req_tx_qs;
444
423
u16 num_req_rx_qs;
445
424
u32 num_req_txq_desc;
446
425
u32 num_req_rxq_desc;
447
426
DECLARE_BITMAP(user_flags, __IDPF_USER_FLAGS_NBITS);
448
427
struct list_head mac_filter_list;
428
+
u32 num_fsteer_fltrs;
429
+
struct list_head flow_steer_list;
449
430
};
450
431
451
432
/**
···
696
667
}
697
668
698
669
#define IDPF_CAP_RSS (\
699
-
VIRTCHNL2_CAP_RSS_IPV4_TCP |\
700
-
VIRTCHNL2_CAP_RSS_IPV4_TCP |\
701
-
VIRTCHNL2_CAP_RSS_IPV4_UDP |\
702
-
VIRTCHNL2_CAP_RSS_IPV4_SCTP |\
703
-
VIRTCHNL2_CAP_RSS_IPV4_OTHER |\
704
-
VIRTCHNL2_CAP_RSS_IPV6_TCP |\
705
-
VIRTCHNL2_CAP_RSS_IPV6_TCP |\
706
-
VIRTCHNL2_CAP_RSS_IPV6_UDP |\
707
-
VIRTCHNL2_CAP_RSS_IPV6_SCTP |\
708
-
VIRTCHNL2_CAP_RSS_IPV6_OTHER)
670
+
VIRTCHNL2_FLOW_IPV4_TCP |\
671
+
VIRTCHNL2_FLOW_IPV4_TCP |\
672
+
VIRTCHNL2_FLOW_IPV4_UDP |\
673
+
VIRTCHNL2_FLOW_IPV4_SCTP |\
674
+
VIRTCHNL2_FLOW_IPV4_OTHER |\
675
+
VIRTCHNL2_FLOW_IPV6_TCP |\
676
+
VIRTCHNL2_FLOW_IPV6_TCP |\
677
+
VIRTCHNL2_FLOW_IPV6_UDP |\
678
+
VIRTCHNL2_FLOW_IPV6_SCTP |\
679
+
VIRTCHNL2_FLOW_IPV6_OTHER)
709
680
710
681
#define IDPF_CAP_RSC (\
711
682
VIRTCHNL2_CAP_RSC_IPV4_TCP |\
···
989
960
void idpf_idc_vdev_mtu_event(struct iidc_rdma_vport_dev_info *vdev_info,
990
961
enum iidc_rdma_event_type event_type);
991
962
963
+
int idpf_add_del_fsteer_filters(struct idpf_adapter *adapter,
964
+
struct virtchnl2_flow_rule_add_del *rule,
965
+
enum virtchnl2_op opcode);
992
966
#endif /* !_IDPF_H_ */
+321
-13
drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+321
-13
drivers/net/ethernet/intel/idpf/idpf_ethtool.c
···
3
3
4
4
#include "idpf.h"
5
5
#include "idpf_ptp.h"
6
+
#include "idpf_virtchnl.h"
6
7
7
8
/**
8
9
* idpf_get_rxnfc - command to get RX flow classification rules
···
14
13
* Returns Success if the command is supported.
15
14
*/
16
15
static int idpf_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
17
-
u32 __always_unused *rule_locs)
16
+
u32 *rule_locs)
18
17
{
18
+
struct idpf_netdev_priv *np = netdev_priv(netdev);
19
+
struct idpf_vport_user_config_data *user_config;
20
+
struct idpf_fsteer_fltr *f;
19
21
struct idpf_vport *vport;
22
+
unsigned int cnt = 0;
23
+
int err = 0;
20
24
21
25
idpf_vport_ctrl_lock(netdev);
22
26
vport = idpf_netdev_to_vport(netdev);
27
+
user_config = &np->adapter->vport_config[np->vport_idx]->user_config;
23
28
24
29
switch (cmd->cmd) {
25
30
case ETHTOOL_GRXRINGS:
26
31
cmd->data = vport->num_rxq;
27
-
idpf_vport_ctrl_unlock(netdev);
28
-
29
-
return 0;
32
+
break;
33
+
case ETHTOOL_GRXCLSRLCNT:
34
+
cmd->rule_cnt = user_config->num_fsteer_fltrs;
35
+
cmd->data = idpf_fsteer_max_rules(vport);
36
+
break;
37
+
case ETHTOOL_GRXCLSRULE:
38
+
err = -EINVAL;
39
+
list_for_each_entry(f, &user_config->flow_steer_list, list)
40
+
if (f->loc == cmd->fs.location) {
41
+
cmd->fs.ring_cookie = f->q_index;
42
+
err = 0;
43
+
break;
44
+
}
45
+
break;
46
+
case ETHTOOL_GRXCLSRLALL:
47
+
cmd->data = idpf_fsteer_max_rules(vport);
48
+
list_for_each_entry(f, &user_config->flow_steer_list, list) {
49
+
if (cnt == cmd->rule_cnt) {
50
+
err = -EMSGSIZE;
51
+
break;
52
+
}
53
+
rule_locs[cnt] = f->loc;
54
+
cnt++;
55
+
}
56
+
if (!err)
57
+
cmd->rule_cnt = user_config->num_fsteer_fltrs;
58
+
break;
30
59
default:
31
60
break;
32
61
}
33
62
34
63
idpf_vport_ctrl_unlock(netdev);
35
64
36
-
return -EOPNOTSUPP;
65
+
return err;
66
+
}
67
+
68
+
static void idpf_fsteer_fill_ipv4(struct virtchnl2_proto_hdrs *hdrs,
69
+
struct ethtool_rx_flow_spec *fsp)
70
+
{
71
+
struct iphdr *iph;
72
+
73
+
hdrs->proto_hdr[0].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_IPV4);
74
+
75
+
iph = (struct iphdr *)hdrs->proto_hdr[0].buffer_spec;
76
+
iph->saddr = fsp->h_u.tcp_ip4_spec.ip4src;
77
+
iph->daddr = fsp->h_u.tcp_ip4_spec.ip4dst;
78
+
79
+
iph = (struct iphdr *)hdrs->proto_hdr[0].buffer_mask;
80
+
iph->saddr = fsp->m_u.tcp_ip4_spec.ip4src;
81
+
iph->daddr = fsp->m_u.tcp_ip4_spec.ip4dst;
82
+
}
83
+
84
+
static void idpf_fsteer_fill_udp(struct virtchnl2_proto_hdrs *hdrs,
85
+
struct ethtool_rx_flow_spec *fsp,
86
+
bool v4)
87
+
{
88
+
struct udphdr *udph, *udpm;
89
+
90
+
hdrs->proto_hdr[1].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_UDP);
91
+
92
+
udph = (struct udphdr *)hdrs->proto_hdr[1].buffer_spec;
93
+
udpm = (struct udphdr *)hdrs->proto_hdr[1].buffer_mask;
94
+
95
+
if (v4) {
96
+
udph->source = fsp->h_u.udp_ip4_spec.psrc;
97
+
udph->dest = fsp->h_u.udp_ip4_spec.pdst;
98
+
udpm->source = fsp->m_u.udp_ip4_spec.psrc;
99
+
udpm->dest = fsp->m_u.udp_ip4_spec.pdst;
100
+
} else {
101
+
udph->source = fsp->h_u.udp_ip6_spec.psrc;
102
+
udph->dest = fsp->h_u.udp_ip6_spec.pdst;
103
+
udpm->source = fsp->m_u.udp_ip6_spec.psrc;
104
+
udpm->dest = fsp->m_u.udp_ip6_spec.pdst;
105
+
}
106
+
}
107
+
108
+
static void idpf_fsteer_fill_tcp(struct virtchnl2_proto_hdrs *hdrs,
109
+
struct ethtool_rx_flow_spec *fsp,
110
+
bool v4)
111
+
{
112
+
struct tcphdr *tcph, *tcpm;
113
+
114
+
hdrs->proto_hdr[1].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_TCP);
115
+
116
+
tcph = (struct tcphdr *)hdrs->proto_hdr[1].buffer_spec;
117
+
tcpm = (struct tcphdr *)hdrs->proto_hdr[1].buffer_mask;
118
+
119
+
if (v4) {
120
+
tcph->source = fsp->h_u.tcp_ip4_spec.psrc;
121
+
tcph->dest = fsp->h_u.tcp_ip4_spec.pdst;
122
+
tcpm->source = fsp->m_u.tcp_ip4_spec.psrc;
123
+
tcpm->dest = fsp->m_u.tcp_ip4_spec.pdst;
124
+
} else {
125
+
tcph->source = fsp->h_u.tcp_ip6_spec.psrc;
126
+
tcph->dest = fsp->h_u.tcp_ip6_spec.pdst;
127
+
tcpm->source = fsp->m_u.tcp_ip6_spec.psrc;
128
+
tcpm->dest = fsp->m_u.tcp_ip6_spec.pdst;
129
+
}
130
+
}
131
+
132
+
/**
133
+
* idpf_add_flow_steer - add a Flow Steering filter
134
+
* @netdev: network interface device structure
135
+
* @cmd: command to add Flow Steering filter
136
+
*
137
+
* Return: 0 on success and negative values for failure
138
+
*/
139
+
static int idpf_add_flow_steer(struct net_device *netdev,
140
+
struct ethtool_rxnfc *cmd)
141
+
{
142
+
struct idpf_fsteer_fltr *fltr, *parent = NULL, *f;
143
+
struct idpf_netdev_priv *np = netdev_priv(netdev);
144
+
struct idpf_vport_user_config_data *user_config;
145
+
struct ethtool_rx_flow_spec *fsp = &cmd->fs;
146
+
struct virtchnl2_flow_rule_add_del *rule;
147
+
struct idpf_vport_config *vport_config;
148
+
struct virtchnl2_rule_action_set *acts;
149
+
struct virtchnl2_flow_rule_info *info;
150
+
struct virtchnl2_proto_hdrs *hdrs;
151
+
struct idpf_vport *vport;
152
+
u32 flow_type, q_index;
153
+
u16 num_rxq;
154
+
int err;
155
+
156
+
vport = idpf_netdev_to_vport(netdev);
157
+
vport_config = vport->adapter->vport_config[np->vport_idx];
158
+
user_config = &vport_config->user_config;
159
+
num_rxq = user_config->num_req_rx_qs;
160
+
161
+
flow_type = fsp->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS);
162
+
if (flow_type != fsp->flow_type)
163
+
return -EINVAL;
164
+
165
+
if (!idpf_sideband_action_ena(vport, fsp) ||
166
+
!idpf_sideband_flow_type_ena(vport, flow_type))
167
+
return -EOPNOTSUPP;
168
+
169
+
if (user_config->num_fsteer_fltrs > idpf_fsteer_max_rules(vport))
170
+
return -ENOSPC;
171
+
172
+
q_index = fsp->ring_cookie;
173
+
if (q_index >= num_rxq)
174
+
return -EINVAL;
175
+
176
+
rule = kzalloc(struct_size(rule, rule_info, 1), GFP_KERNEL);
177
+
if (!rule)
178
+
return -ENOMEM;
179
+
180
+
rule->vport_id = cpu_to_le32(vport->vport_id);
181
+
rule->count = cpu_to_le32(1);
182
+
info = &rule->rule_info[0];
183
+
info->rule_id = cpu_to_le32(fsp->location);
184
+
185
+
hdrs = &info->rule_cfg.proto_hdrs;
186
+
hdrs->tunnel_level = 0;
187
+
hdrs->count = cpu_to_le32(2);
188
+
189
+
acts = &info->rule_cfg.action_set;
190
+
acts->count = cpu_to_le32(1);
191
+
acts->actions[0].action_type = cpu_to_le32(VIRTCHNL2_ACTION_QUEUE);
192
+
acts->actions[0].act_conf.q_id = cpu_to_le32(q_index);
193
+
194
+
switch (flow_type) {
195
+
case UDP_V4_FLOW:
196
+
idpf_fsteer_fill_ipv4(hdrs, fsp);
197
+
idpf_fsteer_fill_udp(hdrs, fsp, true);
198
+
break;
199
+
case TCP_V4_FLOW:
200
+
idpf_fsteer_fill_ipv4(hdrs, fsp);
201
+
idpf_fsteer_fill_tcp(hdrs, fsp, true);
202
+
break;
203
+
default:
204
+
err = -EINVAL;
205
+
goto out;
206
+
}
207
+
208
+
err = idpf_add_del_fsteer_filters(vport->adapter, rule,
209
+
VIRTCHNL2_OP_ADD_FLOW_RULE);
210
+
if (err)
211
+
goto out;
212
+
213
+
if (info->status != cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) {
214
+
err = -EIO;
215
+
goto out;
216
+
}
217
+
218
+
fltr = kzalloc(sizeof(*fltr), GFP_KERNEL);
219
+
if (!fltr) {
220
+
err = -ENOMEM;
221
+
goto out;
222
+
}
223
+
224
+
fltr->loc = fsp->location;
225
+
fltr->q_index = q_index;
226
+
list_for_each_entry(f, &user_config->flow_steer_list, list) {
227
+
if (f->loc >= fltr->loc)
228
+
break;
229
+
parent = f;
230
+
}
231
+
232
+
parent ? list_add(&fltr->list, &parent->list) :
233
+
list_add(&fltr->list, &user_config->flow_steer_list);
234
+
235
+
user_config->num_fsteer_fltrs++;
236
+
237
+
out:
238
+
kfree(rule);
239
+
return err;
240
+
}
241
+
242
+
/**
243
+
* idpf_del_flow_steer - delete a Flow Steering filter
244
+
* @netdev: network interface device structure
245
+
* @cmd: command to add Flow Steering filter
246
+
*
247
+
* Return: 0 on success and negative values for failure
248
+
*/
249
+
static int idpf_del_flow_steer(struct net_device *netdev,
250
+
struct ethtool_rxnfc *cmd)
251
+
{
252
+
struct idpf_netdev_priv *np = netdev_priv(netdev);
253
+
struct idpf_vport_user_config_data *user_config;
254
+
struct ethtool_rx_flow_spec *fsp = &cmd->fs;
255
+
struct virtchnl2_flow_rule_add_del *rule;
256
+
struct idpf_vport_config *vport_config;
257
+
struct virtchnl2_flow_rule_info *info;
258
+
struct idpf_fsteer_fltr *f, *iter;
259
+
struct idpf_vport *vport;
260
+
int err;
261
+
262
+
vport = idpf_netdev_to_vport(netdev);
263
+
vport_config = vport->adapter->vport_config[np->vport_idx];
264
+
user_config = &vport_config->user_config;
265
+
266
+
if (!idpf_sideband_action_ena(vport, fsp))
267
+
return -EOPNOTSUPP;
268
+
269
+
rule = kzalloc(struct_size(rule, rule_info, 1), GFP_KERNEL);
270
+
if (!rule)
271
+
return -ENOMEM;
272
+
273
+
rule->vport_id = cpu_to_le32(vport->vport_id);
274
+
rule->count = cpu_to_le32(1);
275
+
info = &rule->rule_info[0];
276
+
info->rule_id = cpu_to_le32(fsp->location);
277
+
278
+
err = idpf_add_del_fsteer_filters(vport->adapter, rule,
279
+
VIRTCHNL2_OP_DEL_FLOW_RULE);
280
+
if (err)
281
+
goto out;
282
+
283
+
if (info->status != cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) {
284
+
err = -EIO;
285
+
goto out;
286
+
}
287
+
288
+
list_for_each_entry_safe(f, iter,
289
+
&user_config->flow_steer_list, list) {
290
+
if (f->loc == fsp->location) {
291
+
list_del(&f->list);
292
+
kfree(f);
293
+
user_config->num_fsteer_fltrs--;
294
+
goto out;
295
+
}
296
+
}
297
+
err = -EINVAL;
298
+
299
+
out:
300
+
kfree(rule);
301
+
return err;
302
+
}
303
+
304
+
static int idpf_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
305
+
{
306
+
int ret = -EOPNOTSUPP;
307
+
308
+
idpf_vport_ctrl_lock(netdev);
309
+
switch (cmd->cmd) {
310
+
case ETHTOOL_SRXCLSRLINS:
311
+
ret = idpf_add_flow_steer(netdev, cmd);
312
+
break;
313
+
case ETHTOOL_SRXCLSRLDEL:
314
+
ret = idpf_del_flow_steer(netdev, cmd);
315
+
break;
316
+
default:
317
+
break;
318
+
}
319
+
320
+
idpf_vport_ctrl_unlock(netdev);
321
+
return ret;
37
322
}
38
323
39
324
/**
···
1377
1090
/**
1378
1091
* __idpf_set_q_coalesce - set ITR values for specific queue
1379
1092
* @ec: ethtool structure from user to update ITR settings
1093
+
* @q_coal: per queue coalesce settings
1380
1094
* @qv: queue vector for which itr values has to be set
1381
1095
* @is_rxq: is queue type rx
1382
1096
*
1383
1097
* Returns 0 on success, negative otherwise.
1384
1098
*/
1385
1099
static int __idpf_set_q_coalesce(const struct ethtool_coalesce *ec,
1100
+
struct idpf_q_coalesce *q_coal,
1386
1101
struct idpf_q_vector *qv, bool is_rxq)
1387
1102
{
1388
1103
u32 use_adaptive_coalesce, coalesce_usecs;
···
1428
1139
1429
1140
if (is_rxq) {
1430
1141
qv->rx_itr_value = coalesce_usecs;
1142
+
q_coal->rx_coalesce_usecs = coalesce_usecs;
1431
1143
if (use_adaptive_coalesce) {
1432
1144
qv->rx_intr_mode = IDPF_ITR_DYNAMIC;
1145
+
q_coal->rx_intr_mode = IDPF_ITR_DYNAMIC;
1433
1146
} else {
1434
1147
qv->rx_intr_mode = !IDPF_ITR_DYNAMIC;
1435
-
idpf_vport_intr_write_itr(qv, qv->rx_itr_value,
1436
-
false);
1148
+
q_coal->rx_intr_mode = !IDPF_ITR_DYNAMIC;
1149
+
idpf_vport_intr_write_itr(qv, coalesce_usecs, false);
1437
1150
}
1438
1151
} else {
1439
1152
qv->tx_itr_value = coalesce_usecs;
1153
+
q_coal->tx_coalesce_usecs = coalesce_usecs;
1440
1154
if (use_adaptive_coalesce) {
1441
1155
qv->tx_intr_mode = IDPF_ITR_DYNAMIC;
1156
+
q_coal->tx_intr_mode = IDPF_ITR_DYNAMIC;
1442
1157
} else {
1443
1158
qv->tx_intr_mode = !IDPF_ITR_DYNAMIC;
1444
-
idpf_vport_intr_write_itr(qv, qv->tx_itr_value, true);
1159
+
q_coal->tx_intr_mode = !IDPF_ITR_DYNAMIC;
1160
+
idpf_vport_intr_write_itr(qv, coalesce_usecs, true);
1445
1161
}
1446
1162
}
1447
1163
···
1459
1165
/**
1460
1166
* idpf_set_q_coalesce - set ITR values for specific queue
1461
1167
* @vport: vport associated to the queue that need updating
1168
+
* @q_coal: per queue coalesce settings
1462
1169
* @ec: coalesce settings to program the device with
1463
1170
* @q_num: update ITR/INTRL (coalesce) settings for this queue number/index
1464
1171
* @is_rxq: is queue type rx
···
1467
1172
* Return 0 on success, and negative on failure
1468
1173
*/
1469
1174
static int idpf_set_q_coalesce(const struct idpf_vport *vport,
1175
+
struct idpf_q_coalesce *q_coal,
1470
1176
const struct ethtool_coalesce *ec,
1471
1177
int q_num, bool is_rxq)
1472
1178
{
···
1476
1180
qv = is_rxq ? idpf_find_rxq_vec(vport, q_num) :
1477
1181
idpf_find_txq_vec(vport, q_num);
1478
1182
1479
-
if (qv && __idpf_set_q_coalesce(ec, qv, is_rxq))
1183
+
if (qv && __idpf_set_q_coalesce(ec, q_coal, qv, is_rxq))
1480
1184
return -EINVAL;
1481
1185
1482
1186
return 0;
···
1497
1201
struct netlink_ext_ack *extack)
1498
1202
{
1499
1203
struct idpf_netdev_priv *np = netdev_priv(netdev);
1204
+
struct idpf_vport_user_config_data *user_config;
1205
+
struct idpf_q_coalesce *q_coal;
1500
1206
struct idpf_vport *vport;
1501
1207
int i, err = 0;
1208
+
1209
+
user_config = &np->adapter->vport_config[np->vport_idx]->user_config;
1502
1210
1503
1211
idpf_vport_ctrl_lock(netdev);
1504
1212
vport = idpf_netdev_to_vport(netdev);
···
1511
1211
goto unlock_mutex;
1512
1212
1513
1213
for (i = 0; i < vport->num_txq; i++) {
1514
-
err = idpf_set_q_coalesce(vport, ec, i, false);
1214
+
q_coal = &user_config->q_coalesce[i];
1215
+
err = idpf_set_q_coalesce(vport, q_coal, ec, i, false);
1515
1216
if (err)
1516
1217
goto unlock_mutex;
1517
1218
}
1518
1219
1519
1220
for (i = 0; i < vport->num_rxq; i++) {
1520
-
err = idpf_set_q_coalesce(vport, ec, i, true);
1221
+
q_coal = &user_config->q_coalesce[i];
1222
+
err = idpf_set_q_coalesce(vport, q_coal, ec, i, true);
1521
1223
if (err)
1522
1224
goto unlock_mutex;
1523
1225
}
···
1541
1239
static int idpf_set_per_q_coalesce(struct net_device *netdev, u32 q_num,
1542
1240
struct ethtool_coalesce *ec)
1543
1241
{
1242
+
struct idpf_netdev_priv *np = netdev_priv(netdev);
1243
+
struct idpf_vport_user_config_data *user_config;
1244
+
struct idpf_q_coalesce *q_coal;
1544
1245
struct idpf_vport *vport;
1545
1246
int err;
1546
1247
1547
1248
idpf_vport_ctrl_lock(netdev);
1548
1249
vport = idpf_netdev_to_vport(netdev);
1250
+
user_config = &np->adapter->vport_config[np->vport_idx]->user_config;
1251
+
q_coal = &user_config->q_coalesce[q_num];
1549
1252
1550
-
err = idpf_set_q_coalesce(vport, ec, q_num, false);
1253
+
err = idpf_set_q_coalesce(vport, q_coal, ec, q_num, false);
1551
1254
if (err) {
1552
1255
idpf_vport_ctrl_unlock(netdev);
1553
1256
1554
1257
return err;
1555
1258
}
1556
1259
1557
-
err = idpf_set_q_coalesce(vport, ec, q_num, true);
1260
+
err = idpf_set_q_coalesce(vport, q_coal, ec, q_num, true);
1558
1261
1559
1262
idpf_vport_ctrl_unlock(netdev);
1560
1263
···
1701
1394
.get_sset_count = idpf_get_sset_count,
1702
1395
.get_channels = idpf_get_channels,
1703
1396
.get_rxnfc = idpf_get_rxnfc,
1397
+
.set_rxnfc = idpf_set_rxnfc,
1704
1398
.get_rxfh_key_size = idpf_get_rxfh_key_size,
1705
1399
.get_rxfh_indir_size = idpf_get_rxfh_indir_size,
1706
1400
.get_rxfh = idpf_get_rxfh,
+22
-1
drivers/net/ethernet/intel/idpf/idpf_lib.c
+22
-1
drivers/net/ethernet/intel/idpf/idpf_lib.c
···
804
804
805
805
if (idpf_is_cap_ena_all(adapter, IDPF_RSS_CAPS, IDPF_CAP_RSS))
806
806
dflt_features |= NETIF_F_RXHASH;
807
+
if (idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS,
808
+
VIRTCHNL2_CAP_FLOW_STEER) &&
809
+
idpf_vport_is_cap_ena(vport, VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER))
810
+
dflt_features |= NETIF_F_NTUPLE;
807
811
if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_TX_CSUM_L4V4))
808
812
csum_offloads |= NETIF_F_IP_CSUM;
809
813
if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_TX_CSUM_L4V6))
···
1134
1130
if (!vport)
1135
1131
return vport;
1136
1132
1133
+
num_max_q = max(max_q->max_txq, max_q->max_rxq);
1137
1134
if (!adapter->vport_config[idx]) {
1138
1135
struct idpf_vport_config *vport_config;
1136
+
struct idpf_q_coalesce *q_coal;
1139
1137
1140
1138
vport_config = kzalloc(sizeof(*vport_config), GFP_KERNEL);
1141
1139
if (!vport_config) {
···
1145
1139
1146
1140
return NULL;
1147
1141
}
1142
+
1143
+
q_coal = kcalloc(num_max_q, sizeof(*q_coal), GFP_KERNEL);
1144
+
if (!q_coal) {
1145
+
kfree(vport_config);
1146
+
kfree(vport);
1147
+
1148
+
return NULL;
1149
+
}
1150
+
for (int i = 0; i < num_max_q; i++) {
1151
+
q_coal[i].tx_intr_mode = IDPF_ITR_DYNAMIC;
1152
+
q_coal[i].tx_coalesce_usecs = IDPF_ITR_TX_DEF;
1153
+
q_coal[i].rx_intr_mode = IDPF_ITR_DYNAMIC;
1154
+
q_coal[i].rx_coalesce_usecs = IDPF_ITR_RX_DEF;
1155
+
}
1156
+
vport_config->user_config.q_coalesce = q_coal;
1148
1157
1149
1158
adapter->vport_config[idx] = vport_config;
1150
1159
}
···
1170
1149
vport->default_vport = adapter->num_alloc_vports <
1171
1150
idpf_get_default_vports(adapter);
1172
1151
1173
-
num_max_q = max(max_q->max_txq, max_q->max_rxq);
1174
1152
vport->q_vector_idxs = kcalloc(num_max_q, sizeof(u16), GFP_KERNEL);
1175
1153
if (!vport->q_vector_idxs)
1176
1154
goto free_vport;
···
1552
1532
spin_lock_init(&vport_config->mac_filter_list_lock);
1553
1533
1554
1534
INIT_LIST_HEAD(&vport_config->user_config.mac_filter_list);
1535
+
INIT_LIST_HEAD(&vport_config->user_config.flow_steer_list);
1555
1536
1556
1537
err = idpf_check_supported_desc_ids(vport);
1557
1538
if (err) {
+1
drivers/net/ethernet/intel/idpf/idpf_main.c
+1
drivers/net/ethernet/intel/idpf/idpf_main.c
+136
drivers/net/ethernet/intel/idpf/idpf_ptp.c
+136
drivers/net/ethernet/intel/idpf/idpf_ptp.c
···
42
42
direct,
43
43
mailbox);
44
44
45
+
/* Get the cross timestamp */
46
+
direct = VIRTCHNL2_CAP_PTP_GET_CROSS_TIME;
47
+
mailbox = VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB;
48
+
ptp->get_cross_tstamp_access = idpf_ptp_get_access(adapter,
49
+
direct,
50
+
mailbox);
51
+
45
52
/* Set the device clock time */
46
53
direct = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
47
54
mailbox = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
···
177
170
178
171
return 0;
179
172
}
173
+
174
+
#if IS_ENABLED(CONFIG_ARM_ARCH_TIMER) || IS_ENABLED(CONFIG_X86)
175
+
/**
176
+
* idpf_ptp_get_sync_device_time_direct - Get the cross time stamp values
177
+
* directly
178
+
* @adapter: Driver specific private structure
179
+
* @dev_time: 64bit main timer value
180
+
* @sys_time: 64bit system time value
181
+
*/
182
+
static void idpf_ptp_get_sync_device_time_direct(struct idpf_adapter *adapter,
183
+
u64 *dev_time, u64 *sys_time)
184
+
{
185
+
u32 dev_time_lo, dev_time_hi, sys_time_lo, sys_time_hi;
186
+
struct idpf_ptp *ptp = adapter->ptp;
187
+
188
+
spin_lock(&ptp->read_dev_clk_lock);
189
+
190
+
idpf_ptp_enable_shtime(adapter);
191
+
192
+
dev_time_lo = readl(ptp->dev_clk_regs.dev_clk_ns_l);
193
+
dev_time_hi = readl(ptp->dev_clk_regs.dev_clk_ns_h);
194
+
195
+
sys_time_lo = readl(ptp->dev_clk_regs.sys_time_ns_l);
196
+
sys_time_hi = readl(ptp->dev_clk_regs.sys_time_ns_h);
197
+
198
+
spin_unlock(&ptp->read_dev_clk_lock);
199
+
200
+
*dev_time = (u64)dev_time_hi << 32 | dev_time_lo;
201
+
*sys_time = (u64)sys_time_hi << 32 | sys_time_lo;
202
+
}
203
+
204
+
/**
205
+
* idpf_ptp_get_sync_device_time_mailbox - Get the cross time stamp values
206
+
* through mailbox
207
+
* @adapter: Driver specific private structure
208
+
* @dev_time: 64bit main timer value expressed in nanoseconds
209
+
* @sys_time: 64bit system time value expressed in nanoseconds
210
+
*
211
+
* Return: 0 on success, -errno otherwise.
212
+
*/
213
+
static int idpf_ptp_get_sync_device_time_mailbox(struct idpf_adapter *adapter,
214
+
u64 *dev_time, u64 *sys_time)
215
+
{
216
+
struct idpf_ptp_dev_timers cross_time;
217
+
int err;
218
+
219
+
err = idpf_ptp_get_cross_time(adapter, &cross_time);
220
+
if (err)
221
+
return err;
222
+
223
+
*dev_time = cross_time.dev_clk_time_ns;
224
+
*sys_time = cross_time.sys_time_ns;
225
+
226
+
return err;
227
+
}
228
+
229
+
/**
230
+
* idpf_ptp_get_sync_device_time - Get the cross time stamp info
231
+
* @device: Current device time
232
+
* @system: System counter value read synchronously with device time
233
+
* @ctx: Context provided by timekeeping code
234
+
*
235
+
* The device and the system clocks time read simultaneously.
236
+
*
237
+
* Return: 0 on success, -errno otherwise.
238
+
*/
239
+
static int idpf_ptp_get_sync_device_time(ktime_t *device,
240
+
struct system_counterval_t *system,
241
+
void *ctx)
242
+
{
243
+
struct idpf_adapter *adapter = ctx;
244
+
u64 ns_time_dev, ns_time_sys;
245
+
int err;
246
+
247
+
switch (adapter->ptp->get_cross_tstamp_access) {
248
+
case IDPF_PTP_NONE:
249
+
return -EOPNOTSUPP;
250
+
case IDPF_PTP_DIRECT:
251
+
idpf_ptp_get_sync_device_time_direct(adapter, &ns_time_dev,
252
+
&ns_time_sys);
253
+
break;
254
+
case IDPF_PTP_MAILBOX:
255
+
err = idpf_ptp_get_sync_device_time_mailbox(adapter,
256
+
&ns_time_dev,
257
+
&ns_time_sys);
258
+
if (err)
259
+
return err;
260
+
break;
261
+
default:
262
+
return -EOPNOTSUPP;
263
+
}
264
+
265
+
*device = ns_to_ktime(ns_time_dev);
266
+
267
+
system->cs_id = IS_ENABLED(CONFIG_X86) ? CSID_X86_ART
268
+
: CSID_ARM_ARCH_COUNTER;
269
+
system->cycles = ns_time_sys;
270
+
system->use_nsecs = true;
271
+
272
+
return 0;
273
+
}
274
+
275
+
/**
276
+
* idpf_ptp_get_crosststamp - Capture a device cross timestamp
277
+
* @info: the driver's PTP info structure
278
+
* @cts: The memory to fill the cross timestamp info
279
+
*
280
+
* Capture a cross timestamp between the system time and the device PTP hardware
281
+
* clock.
282
+
*
283
+
* Return: cross timestamp value on success, -errno on failure.
284
+
*/
285
+
static int idpf_ptp_get_crosststamp(struct ptp_clock_info *info,
286
+
struct system_device_crosststamp *cts)
287
+
{
288
+
struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);
289
+
290
+
return get_device_system_crosststamp(idpf_ptp_get_sync_device_time,
291
+
adapter, NULL, cts);
292
+
}
293
+
#endif /* CONFIG_ARM_ARCH_TIMER || CONFIG_X86 */
180
294
181
295
/**
182
296
* idpf_ptp_gettimex64 - Get the time of the clock
···
789
661
info->verify = idpf_ptp_verify_pin;
790
662
info->enable = idpf_ptp_gpio_enable;
791
663
info->do_aux_work = idpf_ptp_do_aux_work;
664
+
#if IS_ENABLED(CONFIG_ARM_ARCH_TIMER)
665
+
info->getcrosststamp = idpf_ptp_get_crosststamp;
666
+
#elif IS_ENABLED(CONFIG_X86)
667
+
if (pcie_ptm_enabled(adapter->pdev) &&
668
+
boot_cpu_has(X86_FEATURE_ART) &&
669
+
boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ))
670
+
info->getcrosststamp = idpf_ptp_get_crosststamp;
671
+
#endif /* CONFIG_ARM_ARCH_TIMER */
792
672
}
793
673
794
674
/**
+17
drivers/net/ethernet/intel/idpf/idpf_ptp.h
+17
drivers/net/ethernet/intel/idpf/idpf_ptp.h
···
21
21
* @dev_clk_ns_h: high part of the device clock register
22
22
* @phy_clk_ns_l: low part of the PHY clock register
23
23
* @phy_clk_ns_h: high part of the PHY clock register
24
+
* @sys_time_ns_l: low part of the system time register
25
+
* @sys_time_ns_h: high part of the system time register
24
26
* @incval_l: low part of the increment value register
25
27
* @incval_h: high part of the increment value register
26
28
* @shadj_l: low part of the shadow adjust register
···
43
41
/* PHY timer */
44
42
void __iomem *phy_clk_ns_l;
45
43
void __iomem *phy_clk_ns_h;
44
+
45
+
/* System time */
46
+
void __iomem *sys_time_ns_l;
47
+
void __iomem *sys_time_ns_h;
46
48
47
49
/* Main timer adjustments */
48
50
void __iomem *incval_l;
···
168
162
* @dev_clk_regs: the set of registers to access the device clock
169
163
* @caps: PTP capabilities negotiated with the Control Plane
170
164
* @get_dev_clk_time_access: access type for getting the device clock time
165
+
* @get_cross_tstamp_access: access type for the cross timestamping
171
166
* @set_dev_clk_time_access: access type for setting the device clock time
172
167
* @adj_dev_clk_time_access: access type for the adjusting the device clock
173
168
* @tx_tstamp_access: access type for the Tx timestamp value read
···
189
182
struct idpf_ptp_dev_clk_regs dev_clk_regs;
190
183
u32 caps;
191
184
enum idpf_ptp_access get_dev_clk_time_access:2;
185
+
enum idpf_ptp_access get_cross_tstamp_access:2;
192
186
enum idpf_ptp_access set_dev_clk_time_access:2;
193
187
enum idpf_ptp_access adj_dev_clk_time_access:2;
194
188
enum idpf_ptp_access tx_tstamp_access:2;
···
272
264
bool idpf_ptp_get_txq_tstamp_capability(struct idpf_tx_queue *txq);
273
265
int idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter,
274
266
struct idpf_ptp_dev_timers *dev_clk_time);
267
+
int idpf_ptp_get_cross_time(struct idpf_adapter *adapter,
268
+
struct idpf_ptp_dev_timers *cross_time);
275
269
int idpf_ptp_set_dev_clk_time(struct idpf_adapter *adapter, u64 time);
276
270
int idpf_ptp_adj_dev_clk_fine(struct idpf_adapter *adapter, u64 incval);
277
271
int idpf_ptp_adj_dev_clk_time(struct idpf_adapter *adapter, s64 delta);
···
311
301
static inline int
312
302
idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter,
313
303
struct idpf_ptp_dev_timers *dev_clk_time)
304
+
{
305
+
return -EOPNOTSUPP;
306
+
}
307
+
308
+
static inline int
309
+
idpf_ptp_get_cross_time(struct idpf_adapter *adapter,
310
+
struct idpf_ptp_dev_timers *cross_time)
314
311
{
315
312
return -EOPNOTSUPP;
316
313
}
+9
-4
drivers/net/ethernet/intel/idpf/idpf_txrx.c
+9
-4
drivers/net/ethernet/intel/idpf/idpf_txrx.c
···
4355
4355
int idpf_vport_intr_alloc(struct idpf_vport *vport)
4356
4356
{
4357
4357
u16 txqs_per_vector, rxqs_per_vector, bufqs_per_vector;
4358
+
struct idpf_vport_user_config_data *user_config;
4358
4359
struct idpf_q_vector *q_vector;
4360
+
struct idpf_q_coalesce *q_coal;
4359
4361
u32 complqs_per_vector, v_idx;
4362
+
u16 idx = vport->idx;
4360
4363
4364
+
user_config = &vport->adapter->vport_config[idx]->user_config;
4361
4365
vport->q_vectors = kcalloc(vport->num_q_vectors,
4362
4366
sizeof(struct idpf_q_vector), GFP_KERNEL);
4363
4367
if (!vport->q_vectors)
···
4379
4375
4380
4376
for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) {
4381
4377
q_vector = &vport->q_vectors[v_idx];
4378
+
q_coal = &user_config->q_coalesce[v_idx];
4382
4379
q_vector->vport = vport;
4383
4380
4384
-
q_vector->tx_itr_value = IDPF_ITR_TX_DEF;
4385
-
q_vector->tx_intr_mode = IDPF_ITR_DYNAMIC;
4381
+
q_vector->tx_itr_value = q_coal->tx_coalesce_usecs;
4382
+
q_vector->tx_intr_mode = q_coal->tx_intr_mode;
4386
4383
q_vector->tx_itr_idx = VIRTCHNL2_ITR_IDX_1;
4387
4384
4388
-
q_vector->rx_itr_value = IDPF_ITR_RX_DEF;
4389
-
q_vector->rx_intr_mode = IDPF_ITR_DYNAMIC;
4385
+
q_vector->rx_itr_value = q_coal->rx_coalesce_usecs;
4386
+
q_vector->rx_intr_mode = q_coal->rx_intr_mode;
4390
4387
q_vector->rx_itr_idx = VIRTCHNL2_ITR_IDX_0;
4391
4388
4392
4389
q_vector->tx = kcalloc(txqs_per_vector, sizeof(*q_vector->tx),
+116
-8
drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
+116
-8
drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
···
850
850
VIRTCHNL2_CAP_SEG_TX_SINGLE_TUNNEL);
851
851
852
852
caps.rss_caps =
853
-
cpu_to_le64(VIRTCHNL2_CAP_RSS_IPV4_TCP |
854
-
VIRTCHNL2_CAP_RSS_IPV4_UDP |
855
-
VIRTCHNL2_CAP_RSS_IPV4_SCTP |
856
-
VIRTCHNL2_CAP_RSS_IPV4_OTHER |
857
-
VIRTCHNL2_CAP_RSS_IPV6_TCP |
858
-
VIRTCHNL2_CAP_RSS_IPV6_UDP |
859
-
VIRTCHNL2_CAP_RSS_IPV6_SCTP |
860
-
VIRTCHNL2_CAP_RSS_IPV6_OTHER);
853
+
cpu_to_le64(VIRTCHNL2_FLOW_IPV4_TCP |
854
+
VIRTCHNL2_FLOW_IPV4_UDP |
855
+
VIRTCHNL2_FLOW_IPV4_SCTP |
856
+
VIRTCHNL2_FLOW_IPV4_OTHER |
857
+
VIRTCHNL2_FLOW_IPV6_TCP |
858
+
VIRTCHNL2_FLOW_IPV6_UDP |
859
+
VIRTCHNL2_FLOW_IPV6_SCTP |
860
+
VIRTCHNL2_FLOW_IPV6_OTHER);
861
861
862
862
caps.hsplit_caps =
863
863
cpu_to_le32(VIRTCHNL2_CAP_RX_HSPLIT_AT_L4V4 |
···
1013
1013
}
1014
1014
1015
1015
return 0;
1016
+
}
1017
+
1018
+
/**
1019
+
* idpf_add_del_fsteer_filters - Send virtchnl add/del Flow Steering message
1020
+
* @adapter: adapter info struct
1021
+
* @rule: Flow steering rule to add/delete
1022
+
* @opcode: VIRTCHNL2_OP_ADD_FLOW_RULE to add filter, or
1023
+
* VIRTCHNL2_OP_DEL_FLOW_RULE to delete. All other values are invalid.
1024
+
*
1025
+
* Send ADD/DELETE flow steering virtchnl message and receive the result.
1026
+
*
1027
+
* Return: 0 on success, negative on failure.
1028
+
*/
1029
+
int idpf_add_del_fsteer_filters(struct idpf_adapter *adapter,
1030
+
struct virtchnl2_flow_rule_add_del *rule,
1031
+
enum virtchnl2_op opcode)
1032
+
{
1033
+
int rule_count = le32_to_cpu(rule->count);
1034
+
struct idpf_vc_xn_params xn_params = {};
1035
+
ssize_t reply_sz;
1036
+
1037
+
if (opcode != VIRTCHNL2_OP_ADD_FLOW_RULE &&
1038
+
opcode != VIRTCHNL2_OP_DEL_FLOW_RULE)
1039
+
return -EINVAL;
1040
+
1041
+
xn_params.vc_op = opcode;
1042
+
xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;
1043
+
xn_params.async = false;
1044
+
xn_params.send_buf.iov_base = rule;
1045
+
xn_params.send_buf.iov_len = struct_size(rule, rule_info, rule_count);
1046
+
xn_params.recv_buf.iov_base = rule;
1047
+
xn_params.recv_buf.iov_len = struct_size(rule, rule_info, rule_count);
1048
+
1049
+
reply_sz = idpf_vc_xn_exec(adapter, &xn_params);
1050
+
return reply_sz < 0 ? reply_sz : 0;
1016
1051
}
1017
1052
1018
1053
/**
···
3675
3640
return (*cap_field & flag) == flag;
3676
3641
else
3677
3642
return !!(*cap_field & flag);
3643
+
}
3644
+
3645
+
/**
3646
+
* idpf_vport_is_cap_ena - Check if vport capability is enabled
3647
+
* @vport: Private data struct
3648
+
* @flag: flag(s) to check
3649
+
*
3650
+
* Return: true if the capability is supported, false otherwise
3651
+
*/
3652
+
bool idpf_vport_is_cap_ena(struct idpf_vport *vport, u16 flag)
3653
+
{
3654
+
struct virtchnl2_create_vport *vport_msg;
3655
+
3656
+
vport_msg = vport->adapter->vport_params_recvd[vport->idx];
3657
+
3658
+
return !!(le16_to_cpu(vport_msg->vport_flags) & flag);
3659
+
}
3660
+
3661
+
/**
3662
+
* idpf_sideband_flow_type_ena - Check if steering is enabled for flow type
3663
+
* @vport: Private data struct
3664
+
* @flow_type: flow type to check (from ethtool.h)
3665
+
*
3666
+
* Return: true if sideband filters are allowed for @flow_type, false otherwise
3667
+
*/
3668
+
bool idpf_sideband_flow_type_ena(struct idpf_vport *vport, u32 flow_type)
3669
+
{
3670
+
struct virtchnl2_create_vport *vport_msg;
3671
+
__le64 caps;
3672
+
3673
+
vport_msg = vport->adapter->vport_params_recvd[vport->idx];
3674
+
caps = vport_msg->sideband_flow_caps;
3675
+
3676
+
switch (flow_type) {
3677
+
case TCP_V4_FLOW:
3678
+
return !!(caps & cpu_to_le64(VIRTCHNL2_FLOW_IPV4_TCP));
3679
+
case UDP_V4_FLOW:
3680
+
return !!(caps & cpu_to_le64(VIRTCHNL2_FLOW_IPV4_UDP));
3681
+
default:
3682
+
return false;
3683
+
}
3684
+
}
3685
+
3686
+
/**
3687
+
* idpf_sideband_action_ena - Check if steering is enabled for action
3688
+
* @vport: Private data struct
3689
+
* @fsp: flow spec
3690
+
*
3691
+
* Return: true if sideband filters are allowed for @fsp, false otherwise
3692
+
*/
3693
+
bool idpf_sideband_action_ena(struct idpf_vport *vport,
3694
+
struct ethtool_rx_flow_spec *fsp)
3695
+
{
3696
+
struct virtchnl2_create_vport *vport_msg;
3697
+
unsigned int supp_actions;
3698
+
3699
+
vport_msg = vport->adapter->vport_params_recvd[vport->idx];
3700
+
supp_actions = le32_to_cpu(vport_msg->sideband_flow_actions);
3701
+
3702
+
/* Actions Drop/Wake are not supported */
3703
+
if (fsp->ring_cookie == RX_CLS_FLOW_DISC ||
3704
+
fsp->ring_cookie == RX_CLS_FLOW_WAKE)
3705
+
return false;
3706
+
3707
+
return !!(supp_actions & VIRTCHNL2_ACTION_QUEUE);
3708
+
}
3709
+
3710
+
unsigned int idpf_fsteer_max_rules(struct idpf_vport *vport)
3711
+
{
3712
+
struct virtchnl2_create_vport *vport_msg;
3713
+
3714
+
vport_msg = vport->adapter->vport_params_recvd[vport->idx];
3715
+
return le32_to_cpu(vport_msg->flow_steer_max_rules);
3678
3716
}
3679
3717
3680
3718
/**
+6
drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
+6
drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
···
105
105
int idpf_queue_reg_init(struct idpf_vport *vport);
106
106
int idpf_vport_queue_ids_init(struct idpf_vport *vport);
107
107
108
+
bool idpf_vport_is_cap_ena(struct idpf_vport *vport, u16 flag);
109
+
bool idpf_sideband_flow_type_ena(struct idpf_vport *vport, u32 flow_type);
110
+
bool idpf_sideband_action_ena(struct idpf_vport *vport,
111
+
struct ethtool_rx_flow_spec *fsp);
112
+
unsigned int idpf_fsteer_max_rules(struct idpf_vport *vport);
113
+
108
114
int idpf_recv_mb_msg(struct idpf_adapter *adapter);
109
115
int idpf_send_mb_msg(struct idpf_adapter *adapter, u32 op,
110
116
u16 msg_size, u8 *msg, u16 cookie);
+54
-1
drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c
+54
-1
drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c
···
30
30
.send_buf.iov_len = sizeof(send_ptp_caps_msg),
31
31
.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,
32
32
};
33
+
struct virtchnl2_ptp_cross_time_reg_offsets cross_tstamp_offsets;
33
34
struct virtchnl2_ptp_clk_adj_reg_offsets clk_adj_offsets;
34
35
struct virtchnl2_ptp_clk_reg_offsets clock_offsets;
35
36
struct idpf_ptp_secondary_mbx *scnd_mbx;
···
72
71
73
72
access_type = ptp->get_dev_clk_time_access;
74
73
if (access_type != IDPF_PTP_DIRECT)
75
-
goto discipline_clock;
74
+
goto cross_tstamp;
76
75
77
76
clock_offsets = recv_ptp_caps_msg->clk_offsets;
78
77
···
89
88
ptp->dev_clk_regs.phy_clk_ns_h = idpf_get_reg_addr(adapter,
90
89
temp_offset);
91
90
temp_offset = le32_to_cpu(clock_offsets.cmd_sync_trigger);
91
+
ptp->dev_clk_regs.cmd_sync = idpf_get_reg_addr(adapter, temp_offset);
92
+
93
+
cross_tstamp:
94
+
access_type = ptp->get_cross_tstamp_access;
95
+
if (access_type != IDPF_PTP_DIRECT)
96
+
goto discipline_clock;
97
+
98
+
cross_tstamp_offsets = recv_ptp_caps_msg->cross_time_offsets;
99
+
100
+
temp_offset = le32_to_cpu(cross_tstamp_offsets.sys_time_ns_l);
101
+
ptp->dev_clk_regs.sys_time_ns_l = idpf_get_reg_addr(adapter,
102
+
temp_offset);
103
+
temp_offset = le32_to_cpu(cross_tstamp_offsets.sys_time_ns_h);
104
+
ptp->dev_clk_regs.sys_time_ns_h = idpf_get_reg_addr(adapter,
105
+
temp_offset);
106
+
temp_offset = le32_to_cpu(cross_tstamp_offsets.cmd_sync_trigger);
92
107
ptp->dev_clk_regs.cmd_sync = idpf_get_reg_addr(adapter, temp_offset);
93
108
94
109
discipline_clock:
···
175
158
176
159
dev_time = le64_to_cpu(get_dev_clk_time_msg.dev_time_ns);
177
160
dev_clk_time->dev_clk_time_ns = dev_time;
161
+
162
+
return 0;
163
+
}
164
+
165
+
/**
166
+
* idpf_ptp_get_cross_time - Send virtchnl get cross time message
167
+
* @adapter: Driver specific private structure
168
+
* @cross_time: Pointer to the device clock structure where the value is set
169
+
*
170
+
* Send virtchnl get cross time message to get the time of the clock and the
171
+
* system time.
172
+
*
173
+
* Return: 0 on success, -errno otherwise.
174
+
*/
175
+
int idpf_ptp_get_cross_time(struct idpf_adapter *adapter,
176
+
struct idpf_ptp_dev_timers *cross_time)
177
+
{
178
+
struct virtchnl2_ptp_get_cross_time cross_time_msg;
179
+
struct idpf_vc_xn_params xn_params = {
180
+
.vc_op = VIRTCHNL2_OP_PTP_GET_CROSS_TIME,
181
+
.send_buf.iov_base = &cross_time_msg,
182
+
.send_buf.iov_len = sizeof(cross_time_msg),
183
+
.recv_buf.iov_base = &cross_time_msg,
184
+
.recv_buf.iov_len = sizeof(cross_time_msg),
185
+
.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,
186
+
};
187
+
int reply_sz;
188
+
189
+
reply_sz = idpf_vc_xn_exec(adapter, &xn_params);
190
+
if (reply_sz < 0)
191
+
return reply_sz;
192
+
if (reply_sz != sizeof(cross_time_msg))
193
+
return -EIO;
194
+
195
+
cross_time->dev_clk_time_ns = le64_to_cpu(cross_time_msg.dev_time_ns);
196
+
cross_time->sys_time_ns = le64_to_cpu(cross_time_msg.sys_time_ns);
178
197
179
198
return 0;
180
199
}
+219
-24
drivers/net/ethernet/intel/idpf/virtchnl2.h
+219
-24
drivers/net/ethernet/intel/idpf/virtchnl2.h
···
80
80
VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME = 547,
81
81
VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS = 548,
82
82
VIRTCHNL2_OP_GET_LAN_MEMORY_REGIONS = 549,
83
+
/* Opcode 550 is reserved */
84
+
VIRTCHNL2_OP_ADD_FLOW_RULE = 551,
85
+
VIRTCHNL2_OP_GET_FLOW_RULE = 552,
86
+
VIRTCHNL2_OP_DEL_FLOW_RULE = 553,
83
87
};
84
88
85
89
/**
···
157
153
VIRTCHNL2_CAP_SEG_TX_DOUBLE_TUNNEL = BIT(8),
158
154
};
159
155
160
-
/* Receive Side Scaling Flow type capability flags */
161
-
enum virtchnl2_cap_rss {
162
-
VIRTCHNL2_CAP_RSS_IPV4_TCP = BIT(0),
163
-
VIRTCHNL2_CAP_RSS_IPV4_UDP = BIT(1),
164
-
VIRTCHNL2_CAP_RSS_IPV4_SCTP = BIT(2),
165
-
VIRTCHNL2_CAP_RSS_IPV4_OTHER = BIT(3),
166
-
VIRTCHNL2_CAP_RSS_IPV6_TCP = BIT(4),
167
-
VIRTCHNL2_CAP_RSS_IPV6_UDP = BIT(5),
168
-
VIRTCHNL2_CAP_RSS_IPV6_SCTP = BIT(6),
169
-
VIRTCHNL2_CAP_RSS_IPV6_OTHER = BIT(7),
170
-
VIRTCHNL2_CAP_RSS_IPV4_AH = BIT(8),
171
-
VIRTCHNL2_CAP_RSS_IPV4_ESP = BIT(9),
172
-
VIRTCHNL2_CAP_RSS_IPV4_AH_ESP = BIT(10),
173
-
VIRTCHNL2_CAP_RSS_IPV6_AH = BIT(11),
174
-
VIRTCHNL2_CAP_RSS_IPV6_ESP = BIT(12),
175
-
VIRTCHNL2_CAP_RSS_IPV6_AH_ESP = BIT(13),
156
+
/* Receive Side Scaling and Flow Steering Flow type capability flags */
157
+
enum virtchnl2_flow_types {
158
+
VIRTCHNL2_FLOW_IPV4_TCP = BIT(0),
159
+
VIRTCHNL2_FLOW_IPV4_UDP = BIT(1),
160
+
VIRTCHNL2_FLOW_IPV4_SCTP = BIT(2),
161
+
VIRTCHNL2_FLOW_IPV4_OTHER = BIT(3),
162
+
VIRTCHNL2_FLOW_IPV6_TCP = BIT(4),
163
+
VIRTCHNL2_FLOW_IPV6_UDP = BIT(5),
164
+
VIRTCHNL2_FLOW_IPV6_SCTP = BIT(6),
165
+
VIRTCHNL2_FLOW_IPV6_OTHER = BIT(7),
166
+
VIRTCHNL2_FLOW_IPV4_AH = BIT(8),
167
+
VIRTCHNL2_FLOW_IPV4_ESP = BIT(9),
168
+
VIRTCHNL2_FLOW_IPV4_AH_ESP = BIT(10),
169
+
VIRTCHNL2_FLOW_IPV6_AH = BIT(11),
170
+
VIRTCHNL2_FLOW_IPV6_ESP = BIT(12),
171
+
VIRTCHNL2_FLOW_IPV6_AH_ESP = BIT(13),
176
172
};
177
173
178
174
/* Header split capability flags */
···
198
194
VIRTCHNL2_CAP_RDMA = BIT_ULL(0),
199
195
VIRTCHNL2_CAP_SRIOV = BIT_ULL(1),
200
196
VIRTCHNL2_CAP_MACFILTER = BIT_ULL(2),
201
-
VIRTCHNL2_CAP_FLOW_DIRECTOR = BIT_ULL(3),
202
-
/* Queue based scheduling using split queue model */
197
+
/* Other capability 3 is available
198
+
* Queue based scheduling using split queue model
199
+
*/
203
200
VIRTCHNL2_CAP_SPLITQ_QSCHED = BIT_ULL(4),
204
201
VIRTCHNL2_CAP_CRC = BIT_ULL(5),
205
202
VIRTCHNL2_CAP_ADQ = BIT_ULL(6),
···
214
209
/* EDT: Earliest Departure Time capability used for Timing Wheel */
215
210
VIRTCHNL2_CAP_EDT = BIT_ULL(14),
216
211
VIRTCHNL2_CAP_ADV_RSS = BIT_ULL(15),
217
-
VIRTCHNL2_CAP_FDIR = BIT_ULL(16),
212
+
/* Other capability 16 is available */
218
213
VIRTCHNL2_CAP_RX_FLEX_DESC = BIT_ULL(17),
219
214
VIRTCHNL2_CAP_PTYPE = BIT_ULL(18),
220
215
VIRTCHNL2_CAP_LOOPBACK = BIT_ULL(19),
221
-
/* Other capability 20-21 is reserved */
216
+
/* Other capability 20 is reserved */
217
+
VIRTCHNL2_CAP_FLOW_STEER = BIT_ULL(21),
222
218
VIRTCHNL2_CAP_LAN_MEMORY_REGIONS = BIT_ULL(22),
223
219
224
220
/* this must be the last capability */
225
221
VIRTCHNL2_CAP_OEM = BIT_ULL(63),
222
+
};
223
+
224
+
/**
225
+
* enum virtchnl2_action_types - Available actions for sideband flow steering
226
+
* @VIRTCHNL2_ACTION_DROP: Drop the packet
227
+
* @VIRTCHNL2_ACTION_PASSTHRU: Forward the packet to the next classifier/stage
228
+
* @VIRTCHNL2_ACTION_QUEUE: Forward the packet to a receive queue
229
+
* @VIRTCHNL2_ACTION_Q_GROUP: Forward the packet to a receive queue group
230
+
* @VIRTCHNL2_ACTION_MARK: Mark the packet with specific marker value
231
+
* @VIRTCHNL2_ACTION_COUNT: Increment the corresponding counter
232
+
*/
233
+
234
+
enum virtchnl2_action_types {
235
+
VIRTCHNL2_ACTION_DROP = BIT(0),
236
+
VIRTCHNL2_ACTION_PASSTHRU = BIT(1),
237
+
VIRTCHNL2_ACTION_QUEUE = BIT(2),
238
+
VIRTCHNL2_ACTION_Q_GROUP = BIT(3),
239
+
VIRTCHNL2_ACTION_MARK = BIT(4),
240
+
VIRTCHNL2_ACTION_COUNT = BIT(5),
226
241
};
227
242
228
243
/* underlying device type */
···
486
461
* @seg_caps: See enum virtchnl2_cap_seg.
487
462
* @hsplit_caps: See enum virtchnl2_cap_rx_hsplit_at.
488
463
* @rsc_caps: See enum virtchnl2_cap_rsc.
489
-
* @rss_caps: See enum virtchnl2_cap_rss.
464
+
* @rss_caps: See enum virtchnl2_flow_types.
490
465
* @other_caps: See enum virtchnl2_cap_other.
491
466
* @mailbox_dyn_ctl: DYN_CTL register offset and vector id for mailbox
492
467
* provided by CP.
···
603
578
/**
604
579
* enum virtchnl2_vport_flags - Vport flags that indicate vport capabilities.
605
580
* @VIRTCHNL2_VPORT_UPLINK_PORT: Representatives of underlying physical ports
581
+
* @VIRTCHNL2_VPORT_INLINE_FLOW_STEER: Inline flow steering enabled
582
+
* @VIRTCHNL2_VPORT_INLINE_FLOW_STEER_RXQ: Inline flow steering enabled
583
+
* with explicit Rx queue action
584
+
* @VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER: Sideband flow steering enabled
606
585
* @VIRTCHNL2_VPORT_ENABLE_RDMA: RDMA is enabled for this vport
607
586
*/
608
587
enum virtchnl2_vport_flags {
609
-
VIRTCHNL2_VPORT_UPLINK_PORT = BIT(0),
610
-
/* VIRTCHNL2_VPORT_* bits [1:3] rsvd */
588
+
VIRTCHNL2_VPORT_UPLINK_PORT = BIT(0),
589
+
VIRTCHNL2_VPORT_INLINE_FLOW_STEER = BIT(1),
590
+
VIRTCHNL2_VPORT_INLINE_FLOW_STEER_RXQ = BIT(2),
591
+
VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER = BIT(3),
611
592
VIRTCHNL2_VPORT_ENABLE_RDMA = BIT(4),
612
593
};
613
594
···
639
608
* @rx_desc_ids: See VIRTCHNL2_RX_DESC_IDS definitions.
640
609
* @tx_desc_ids: See VIRTCHNL2_TX_DESC_IDS definitions.
641
610
* @pad1: Padding.
611
+
* @inline_flow_caps: Bit mask of supported inline-flow-steering
612
+
* flow types (See enum virtchnl2_flow_types)
613
+
* @sideband_flow_caps: Bit mask of supported sideband-flow-steering
614
+
* flow types (See enum virtchnl2_flow_types)
615
+
* @sideband_flow_actions: Bit mask of supported action types
616
+
* for sideband flow steering (See enum virtchnl2_action_types)
617
+
* @flow_steer_max_rules: Max rules allowed for inline and sideband
618
+
* flow steering combined
642
619
* @rss_algorithm: RSS algorithm.
643
620
* @rss_key_size: RSS key size.
644
621
* @rss_lut_size: RSS LUT size.
···
679
640
__le16 vport_flags;
680
641
__le64 rx_desc_ids;
681
642
__le64 tx_desc_ids;
682
-
u8 pad1[72];
643
+
u8 pad1[48];
644
+
__le64 inline_flow_caps;
645
+
__le64 sideband_flow_caps;
646
+
__le32 sideband_flow_actions;
647
+
__le32 flow_steer_max_rules;
683
648
__le32 rss_algorithm;
684
649
__le16 rss_key_size;
685
650
__le16 rss_lut_size;
···
1657
1614
struct virtchnl2_mem_region mem_reg[];
1658
1615
};
1659
1616
VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_get_lan_memory_regions);
1617
+
1618
+
#define VIRTCHNL2_MAX_NUM_PROTO_HDRS 4
1619
+
#define VIRTCHNL2_MAX_SIZE_RAW_PACKET 256
1620
+
#define VIRTCHNL2_MAX_NUM_ACTIONS 8
1621
+
1622
+
/**
1623
+
* struct virtchnl2_proto_hdr - represent one protocol header
1624
+
* @hdr_type: See enum virtchnl2_proto_hdr_type
1625
+
* @pad: padding
1626
+
* @buffer_spec: binary buffer based on header type.
1627
+
* @buffer_mask: mask applied on buffer_spec.
1628
+
*
1629
+
* Structure to hold protocol headers based on hdr_type
1630
+
*/
1631
+
struct virtchnl2_proto_hdr {
1632
+
__le32 hdr_type;
1633
+
u8 pad[4];
1634
+
u8 buffer_spec[64];
1635
+
u8 buffer_mask[64];
1636
+
};
1637
+
VIRTCHNL2_CHECK_STRUCT_LEN(136, virtchnl2_proto_hdr);
1638
+
1639
+
/**
1640
+
* struct virtchnl2_proto_hdrs - struct to represent match criteria
1641
+
* @tunnel_level: specify where protocol header(s) start from.
1642
+
* must be 0 when sending a raw packet request.
1643
+
* 0 - from the outer layer
1644
+
* 1 - from the first inner layer
1645
+
* 2 - from the second inner layer
1646
+
* @pad: Padding bytes
1647
+
* @count: total number of protocol headers in proto_hdr. 0 for raw packet.
1648
+
* @proto_hdr: Array of protocol headers
1649
+
* @raw: struct holding raw packet buffer when count is 0
1650
+
*/
1651
+
struct virtchnl2_proto_hdrs {
1652
+
u8 tunnel_level;
1653
+
u8 pad[3];
1654
+
__le32 count;
1655
+
union {
1656
+
struct virtchnl2_proto_hdr
1657
+
proto_hdr[VIRTCHNL2_MAX_NUM_PROTO_HDRS];
1658
+
struct {
1659
+
__le16 pkt_len;
1660
+
u8 spec[VIRTCHNL2_MAX_SIZE_RAW_PACKET];
1661
+
u8 mask[VIRTCHNL2_MAX_SIZE_RAW_PACKET];
1662
+
} raw;
1663
+
};
1664
+
};
1665
+
VIRTCHNL2_CHECK_STRUCT_LEN(552, virtchnl2_proto_hdrs);
1666
+
1667
+
/**
1668
+
* struct virtchnl2_rule_action - struct representing single action for a flow
1669
+
* @action_type: see enum virtchnl2_action_types
1670
+
* @act_conf: union representing action depending on action_type.
1671
+
* @act_conf.q_id: queue id to redirect the packets to.
1672
+
* @act_conf.q_grp_id: queue group id to redirect the packets to.
1673
+
* @act_conf.ctr_id: used for count action. If input value 0xFFFFFFFF control
1674
+
* plane assigns a new counter and returns the counter ID to
1675
+
* the driver. If input value is not 0xFFFFFFFF then it must
1676
+
* be an existing counter given to the driver for an earlier
1677
+
* flow. Then this flow will share the counter.
1678
+
* @act_conf.mark_id: Value used to mark the packets. Used for mark action.
1679
+
* @act_conf.reserved: Reserved for future use.
1680
+
*/
1681
+
struct virtchnl2_rule_action {
1682
+
__le32 action_type;
1683
+
union {
1684
+
__le32 q_id;
1685
+
__le32 q_grp_id;
1686
+
__le32 ctr_id;
1687
+
__le32 mark_id;
1688
+
u8 reserved[8];
1689
+
} act_conf;
1690
+
};
1691
+
VIRTCHNL2_CHECK_STRUCT_LEN(12, virtchnl2_rule_action);
1692
+
1693
+
/**
1694
+
* struct virtchnl2_rule_action_set - struct representing multiple actions
1695
+
* @count: number of valid actions in the action set of a rule
1696
+
* @actions: array of struct virtchnl2_rule_action
1697
+
*/
1698
+
struct virtchnl2_rule_action_set {
1699
+
/* action count must be less than VIRTCHNL2_MAX_NUM_ACTIONS */
1700
+
__le32 count;
1701
+
struct virtchnl2_rule_action actions[VIRTCHNL2_MAX_NUM_ACTIONS];
1702
+
};
1703
+
VIRTCHNL2_CHECK_STRUCT_LEN(100, virtchnl2_rule_action_set);
1704
+
1705
+
/**
1706
+
* struct virtchnl2_flow_rule - represent one flow steering rule
1707
+
* @proto_hdrs: array of protocol header buffers representing match criteria
1708
+
* @action_set: series of actions to be applied for given rule
1709
+
* @priority: rule priority.
1710
+
* @pad: padding for future extensions.
1711
+
*/
1712
+
struct virtchnl2_flow_rule {
1713
+
struct virtchnl2_proto_hdrs proto_hdrs;
1714
+
struct virtchnl2_rule_action_set action_set;
1715
+
__le32 priority;
1716
+
u8 pad[8];
1717
+
};
1718
+
VIRTCHNL2_CHECK_STRUCT_LEN(664, virtchnl2_flow_rule);
1719
+
1720
+
enum virtchnl2_flow_rule_status {
1721
+
VIRTCHNL2_FLOW_RULE_SUCCESS = 1,
1722
+
VIRTCHNL2_FLOW_RULE_NORESOURCE = 2,
1723
+
VIRTCHNL2_FLOW_RULE_EXIST = 3,
1724
+
VIRTCHNL2_FLOW_RULE_TIMEOUT = 4,
1725
+
VIRTCHNL2_FLOW_RULE_FLOW_TYPE_NOT_SUPPORTED = 5,
1726
+
VIRTCHNL2_FLOW_RULE_MATCH_KEY_NOT_SUPPORTED = 6,
1727
+
VIRTCHNL2_FLOW_RULE_ACTION_NOT_SUPPORTED = 7,
1728
+
VIRTCHNL2_FLOW_RULE_ACTION_COMBINATION_INVALID = 8,
1729
+
VIRTCHNL2_FLOW_RULE_ACTION_DATA_INVALID = 9,
1730
+
VIRTCHNL2_FLOW_RULE_NOT_ADDED = 10,
1731
+
};
1732
+
1733
+
/**
1734
+
* struct virtchnl2_flow_rule_info: structure representing single flow rule
1735
+
* @rule_id: rule_id associated with the flow_rule.
1736
+
* @rule_cfg: structure representing rule.
1737
+
* @status: status of rule programming. See enum virtchnl2_flow_rule_status.
1738
+
*/
1739
+
struct virtchnl2_flow_rule_info {
1740
+
__le32 rule_id;
1741
+
struct virtchnl2_flow_rule rule_cfg;
1742
+
__le32 status;
1743
+
};
1744
+
VIRTCHNL2_CHECK_STRUCT_LEN(672, virtchnl2_flow_rule_info);
1745
+
1746
+
/**
1747
+
* struct virtchnl2_flow_rule_add_del - add/delete a flow steering rule
1748
+
* @vport_id: vport id for which the rule is to be added or deleted.
1749
+
* @count: Indicates number of rules to be added or deleted.
1750
+
* @rule_info: Array of flow rules to be added or deleted.
1751
+
*
1752
+
* For VIRTCHNL2_OP_FLOW_RULE_ADD, rule_info contains list of rules to be
1753
+
* added. If rule_id is 0xFFFFFFFF, then the rule is programmed and not cached.
1754
+
*
1755
+
* For VIRTCHNL2_OP_FLOW_RULE_DEL, there are two possibilities. The structure
1756
+
* can contain either array of rule_ids or array of match keys to be deleted.
1757
+
* When match keys are used the corresponding rule_ids must be 0xFFFFFFFF.
1758
+
*
1759
+
* status member of each rule indicates the result. Maximum of 6 rules can be
1760
+
* added or deleted using this method. Driver has to retry in case of any
1761
+
* failure of ADD or DEL opcode. CP doesn't retry in case of failure.
1762
+
*/
1763
+
struct virtchnl2_flow_rule_add_del {
1764
+
__le32 vport_id;
1765
+
__le32 count;
1766
+
struct virtchnl2_flow_rule_info rule_info[] __counted_by_le(count);
1767
+
};
1768
+
VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_flow_rule_add_del);
1660
1769
1661
1770
#endif /* _VIRTCHNL_2_H_ */
-25
drivers/net/ethernet/intel/igbvf/igbvf.h
-25
drivers/net/ethernet/intel/igbvf/igbvf.h
···
154
154
/* board specific private data structure */
155
155
struct igbvf_adapter {
156
156
struct timer_list watchdog_timer;
157
-
struct timer_list blink_timer;
158
157
159
158
struct work_struct reset_task;
160
159
struct work_struct watchdog_task;
···
161
162
const struct igbvf_info *ei;
162
163
163
164
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
164
-
u32 bd_number;
165
165
u32 rx_buffer_len;
166
-
u32 polling_interval;
167
-
u16 mng_vlan_id;
168
166
u16 link_speed;
169
167
u16 link_duplex;
170
168
···
179
183
unsigned int restart_queue;
180
184
u32 txd_cmd;
181
185
182
-
u32 tx_int_delay;
183
-
u32 tx_abs_int_delay;
184
-
185
186
unsigned int total_tx_bytes;
186
187
unsigned int total_tx_packets;
187
188
unsigned int total_rx_bytes;
···
186
193
187
194
/* Tx stats */
188
195
u32 tx_timeout_count;
189
-
u32 tx_fifo_head;
190
-
u32 tx_head_addr;
191
-
u32 tx_fifo_size;
192
-
u32 tx_dma_failed;
193
196
194
197
/* Rx */
195
198
struct igbvf_ring *rx_ring;
196
-
197
-
u32 rx_int_delay;
198
-
u32 rx_abs_int_delay;
199
199
200
200
/* Rx stats */
201
201
u64 hw_csum_err;
202
202
u64 hw_csum_good;
203
203
u64 rx_hdr_split;
204
204
u32 alloc_rx_buff_failed;
205
-
u32 rx_dma_failed;
206
205
207
206
unsigned int rx_ps_hdr_size;
208
207
u32 max_frame_size;
···
214
229
struct e1000_vf_stats stats;
215
230
u64 zero_base;
216
231
217
-
struct igbvf_ring test_tx_ring;
218
-
struct igbvf_ring test_rx_ring;
219
-
u32 test_icr;
220
-
221
232
u32 msg_enable;
222
233
struct msix_entry *msix_entries;
223
-
int int_mode;
224
234
u32 eims_enable_mask;
225
235
u32 eims_other;
226
236
227
-
u32 eeprom_wol;
228
237
u32 wol;
229
238
u32 pba;
230
-
231
-
bool fc_autoneg;
232
-
233
-
unsigned long led_status;
234
239
235
240
unsigned int flags;
236
241
unsigned long last_reset;
-7
drivers/net/ethernet/intel/igbvf/netdev.c
-7
drivers/net/ethernet/intel/igbvf/netdev.c
···
1629
1629
adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1630
1630
adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1631
1631
1632
-
adapter->tx_int_delay = 8;
1633
-
adapter->tx_abs_int_delay = 32;
1634
-
adapter->rx_int_delay = 0;
1635
-
adapter->rx_abs_int_delay = 8;
1636
1632
adapter->requested_itr = 3;
1637
1633
adapter->current_itr = IGBVF_START_ITR;
1638
1634
···
2704
2708
struct igbvf_adapter *adapter;
2705
2709
struct e1000_hw *hw;
2706
2710
const struct igbvf_info *ei = igbvf_info_tbl[ent->driver_data];
2707
-
static int cards_found;
2708
2711
int err;
2709
2712
2710
2713
err = pci_enable_device_mem(pdev);
···
2774
2779
igbvf_set_ethtool_ops(netdev);
2775
2780
netdev->watchdog_timeo = 5 * HZ;
2776
2781
strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
2777
-
2778
-
adapter->bd_number = cards_found++;
2779
2782
2780
2783
netdev->hw_features = NETIF_F_SG |
2781
2784
NETIF_F_TSO |
+8
-7
drivers/net/ethernet/intel/igc/igc.h
+8
-7
drivers/net/ethernet/intel/igc/igc.h
···
406
406
#define IGC_FLAG_RSS_FIELD_IPV4_UDP BIT(6)
407
407
#define IGC_FLAG_RSS_FIELD_IPV6_UDP BIT(7)
408
408
409
-
#define IGC_MRQC_ENABLE_RSS_MQ 0x00000002
410
-
#define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
411
-
#define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
412
-
413
409
/* RX-desc Write-Back format RSS Type's */
414
410
enum igc_rss_type_num {
415
411
IGC_RSS_TYPE_NO_HASH = 0,
···
631
635
IGC_FILTER_FLAG_DST_MAC_ADDR = BIT(3),
632
636
IGC_FILTER_FLAG_USER_DATA = BIT(4),
633
637
IGC_FILTER_FLAG_VLAN_ETYPE = BIT(5),
638
+
IGC_FILTER_FLAG_DEFAULT_QUEUE = BIT(6),
634
639
};
635
640
636
641
struct igc_nfc_filter {
···
659
662
bool flex;
660
663
};
661
664
662
-
/* IGC supports a total of 32 NFC rules: 16 MAC address based, 8 VLAN priority
663
-
* based, 8 ethertype based and 32 Flex filter based rules.
665
+
/* IGC supports a total of 65 NFC rules, listed below in order of priority:
666
+
* - 16 MAC address based filtering rules (highest priority)
667
+
* - 8 ethertype based filtering rules
668
+
* - 32 Flex filter based filtering rules
669
+
* - 8 VLAN priority based filtering rules
670
+
* - 1 default queue rule (lowest priority)
664
671
*/
665
-
#define IGC_MAX_RXNFC_RULES 64
672
+
#define IGC_MAX_RXNFC_RULES 65
666
673
667
674
struct igc_flex_filter {
668
675
u8 index;
+4
drivers/net/ethernet/intel/igc/igc_defines.h
+4
drivers/net/ethernet/intel/igc/igc_defines.h
···
383
383
#define IGC_RXDEXT_STATERR_IPE 0x40000000
384
384
#define IGC_RXDEXT_STATERR_RXE 0x80000000
385
385
386
+
#define IGC_MRQC_ENABLE_RSS_MQ 0x00000002
386
387
#define IGC_MRQC_RSS_FIELD_IPV4_TCP 0x00010000
387
388
#define IGC_MRQC_RSS_FIELD_IPV4 0x00020000
388
389
#define IGC_MRQC_RSS_FIELD_IPV6_TCP_EX 0x00040000
389
390
#define IGC_MRQC_RSS_FIELD_IPV6 0x00100000
390
391
#define IGC_MRQC_RSS_FIELD_IPV6_TCP 0x00200000
392
+
#define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
393
+
#define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
394
+
#define IGC_MRQC_DEFAULT_QUEUE_MASK GENMASK(5, 3)
391
395
392
396
/* Header split receive */
393
397
#define IGC_RFCTL_IPV6_EX_DIS 0x00010000
+18
drivers/net/ethernet/intel/igc/igc_ethtool.c
+18
drivers/net/ethernet/intel/igc/igc_ethtool.c
···
1283
1283
rule->flex = true;
1284
1284
else
1285
1285
rule->flex = false;
1286
+
1287
+
/* The wildcard rule is only applied if:
1288
+
* a) None of the other filtering rules match (match_flags is zero)
1289
+
* b) The flow type is ETHER_FLOW only (no additional fields set)
1290
+
* c) Mask for Source MAC address is not specified (all zeros)
1291
+
* d) Mask for Destination MAC address is not specified (all zeros)
1292
+
* e) Mask for L2 EtherType is not specified (zero)
1293
+
*
1294
+
* If all these conditions are met, the rule is treated as a wildcard
1295
+
* rule. Default queue feature will be used, so that all packets that do
1296
+
* not match any other rule will be routed to the default queue.
1297
+
*/
1298
+
if (!rule->filter.match_flags &&
1299
+
fsp->flow_type == ETHER_FLOW &&
1300
+
is_zero_ether_addr(fsp->m_u.ether_spec.h_source) &&
1301
+
is_zero_ether_addr(fsp->m_u.ether_spec.h_dest) &&
1302
+
!fsp->m_u.ether_spec.h_proto)
1303
+
rule->filter.match_flags = IGC_FILTER_FLAG_DEFAULT_QUEUE;
1286
1304
}
1287
1305
1288
1306
/**
+22
drivers/net/ethernet/intel/igc/igc_main.c
+22
drivers/net/ethernet/intel/igc/igc_main.c
···
3874
3874
wr32(IGC_WUFC, wufc);
3875
3875
}
3876
3876
3877
+
static void igc_set_default_queue_filter(struct igc_adapter *adapter, u32 queue)
3878
+
{
3879
+
struct igc_hw *hw = &adapter->hw;
3880
+
u32 mrqc = rd32(IGC_MRQC);
3881
+
3882
+
mrqc &= ~IGC_MRQC_DEFAULT_QUEUE_MASK;
3883
+
mrqc |= FIELD_PREP(IGC_MRQC_DEFAULT_QUEUE_MASK, queue);
3884
+
wr32(IGC_MRQC, mrqc);
3885
+
}
3886
+
3887
+
static void igc_reset_default_queue_filter(struct igc_adapter *adapter)
3888
+
{
3889
+
/* Reset the default queue to its default value which is Queue 0 */
3890
+
igc_set_default_queue_filter(adapter, 0);
3891
+
}
3892
+
3877
3893
static int igc_enable_nfc_rule(struct igc_adapter *adapter,
3878
3894
struct igc_nfc_rule *rule)
3879
3895
{
···
3928
3912
return err;
3929
3913
}
3930
3914
3915
+
if (rule->filter.match_flags & IGC_FILTER_FLAG_DEFAULT_QUEUE)
3916
+
igc_set_default_queue_filter(adapter, rule->action);
3917
+
3931
3918
return 0;
3932
3919
}
3933
3920
···
3958
3939
if (rule->filter.match_flags & IGC_FILTER_FLAG_DST_MAC_ADDR)
3959
3940
igc_del_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST,
3960
3941
rule->filter.dst_addr);
3942
+
3943
+
if (rule->filter.match_flags & IGC_FILTER_FLAG_DEFAULT_QUEUE)
3944
+
igc_reset_default_queue_filter(adapter);
3961
3945
}
3962
3946
3963
3947
/**
-3
drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
-3
drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
···
346
346
int num_rx_queues;
347
347
struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
348
348
u64 hw_csum_rx_error;
349
-
u64 hw_rx_no_dma_resources;
350
349
int num_msix_vectors;
351
350
u64 alloc_rx_page_failed;
352
351
u64 alloc_rx_buff_failed;
···
362
363
/* structs defined in ixgbe_vf.h */
363
364
struct ixgbe_hw hw;
364
365
u16 msg_enable;
365
-
/* Interrupt Throttle Rate */
366
-
u32 eitr_param;
367
366
368
367
struct ixgbevf_hw_stats stats;
369
368