tjh.dev / kernel
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drm/i915/dsi: Don't do DSC horizontal timing adjustments in command mode

Stop adjusting the horizontal timing values based on the
compression ratio in command mode. Bspec seems to be telling
us to do this only in video mode, and this is also how the
Windows driver does things.

This should also fix a div-by-zero on some machines because
the adjusted htotal ends up being so small that we end up with
line_time_us==0 when trying to determine the vtotal value in
command mode.

Note that this doesn't actually make the display on the
Huawei Matebook E work, but at least the kernel no longer
explodes when the driver loads.

Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12045
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260326111814.9800-2-ville.syrjala@linux.intel.com
Fixes: 53693f02d80e ("drm/i915/dsi: account for DSC in horizontal timings")
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Ville Syrjälä 0b475e91 059b7b5b

+2 -2
+2 -2
drivers/gpu/drm/i915/display/icl_dsi.c
··· 888 888 * non-compressed link speeds, and simplifies down to the ratio between 889 889 * compressed and non-compressed bpp. 890 890 */ 891 - if (crtc_state->dsc.compression_enable) { 891 + if (is_vid_mode(intel_dsi) && crtc_state->dsc.compression_enable) { 892 892 mul = fxp_q4_to_int(crtc_state->dsc.compressed_bpp_x16); 893 893 div = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); 894 894 } ··· 1502 1502 struct drm_display_mode *adjusted_mode = 1503 1503 &pipe_config->hw.adjusted_mode; 1504 1504 1505 - if (pipe_config->dsc.compressed_bpp_x16) { 1505 + if (is_vid_mode(intel_dsi) && pipe_config->dsc.compressed_bpp_x16) { 1506 1506 int div = fxp_q4_to_int(pipe_config->dsc.compressed_bpp_x16); 1507 1507 int mul = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); 1508 1508