Merge tag 'tty-6.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

+1

drivers/tty/serial/8250/8250_dw.c

··· 777 777 { "INT33C5", (kernel_ulong_t)&dw8250_dw_apb }, 778 778 { "INT3434", (kernel_ulong_t)&dw8250_dw_apb }, 779 779 { "INT3435", (kernel_ulong_t)&dw8250_dw_apb }, 780 + { "INTC10EE", (kernel_ulong_t)&dw8250_dw_apb }, 780 781 { }, 781 782 }; 782 783 MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match);

+1

drivers/tty/serial/8250/8250_early.c

··· 189 189 OF_EARLYCON_DECLARE(omap8250, "ti,omap2-uart", early_omap8250_setup); 190 190 OF_EARLYCON_DECLARE(omap8250, "ti,omap3-uart", early_omap8250_setup); 191 191 OF_EARLYCON_DECLARE(omap8250, "ti,omap4-uart", early_omap8250_setup); 192 + OF_EARLYCON_DECLARE(omap8250, "ti,am654-uart", early_omap8250_setup); 192 193 193 194 #endif

+8 -6

drivers/tty/serial/8250/8250_omap.c

··· 933 933 if (priv->habit & UART_HAS_RHR_IT_DIS) { 934 934 reg = serial_in(p, UART_OMAP_IER2); 935 935 reg &= ~UART_OMAP_IER2_RHR_IT_DIS; 936 - serial_out(p, UART_OMAP_IER2, UART_OMAP_IER2_RHR_IT_DIS); 936 + serial_out(p, UART_OMAP_IER2, reg); 937 937 } 938 938 939 939 dmaengine_tx_status(rxchan, cookie, &state); ··· 1079 1079 if (priv->habit & UART_HAS_RHR_IT_DIS) { 1080 1080 reg = serial_in(p, UART_OMAP_IER2); 1081 1081 reg |= UART_OMAP_IER2_RHR_IT_DIS; 1082 - serial_out(p, UART_OMAP_IER2, UART_OMAP_IER2_RHR_IT_DIS); 1082 + serial_out(p, UART_OMAP_IER2, reg); 1083 1083 } 1084 1084 1085 1085 dma_async_issue_pending(dma->rxchan); ··· 1298 1298 1299 1299 status = serial_port_in(port, UART_LSR); 1300 1300 1301 - if (priv->habit & UART_HAS_EFR2) 1302 - am654_8250_handle_rx_dma(up, iir, status); 1303 - else 1304 - status = omap_8250_handle_rx_dma(up, iir, status); 1301 + if ((iir & 0x3f) != UART_IIR_THRI) { 1302 + if (priv->habit & UART_HAS_EFR2) 1303 + am654_8250_handle_rx_dma(up, iir, status); 1304 + else 1305 + status = omap_8250_handle_rx_dma(up, iir, status); 1306 + } 1305 1307 1306 1308 serial8250_modem_status(up); 1307 1309 if (status & UART_LSR_THRE && up->dma->tx_err) {

+54 -58

drivers/tty/serial/amba-pl011.c

··· 218 218 219 219 /* Deals with DMA transactions */ 220 220 221 - struct pl011_sgbuf { 222 - struct scatterlist sg; 223 - char *buf; 221 + struct pl011_dmabuf { 222 + dma_addr_t dma; 223 + size_t len; 224 + char *buf; 224 225 }; 225 226 226 227 struct pl011_dmarx_data { 227 228 struct dma_chan *chan; 228 229 struct completion complete; 229 230 bool use_buf_b; 230 - struct pl011_sgbuf sgbuf_a; 231 - struct pl011_sgbuf sgbuf_b; 231 + struct pl011_dmabuf dbuf_a; 232 + struct pl011_dmabuf dbuf_b; 232 233 dma_cookie_t cookie; 233 234 bool running; 234 235 struct timer_list timer; ··· 242 241 243 242 struct pl011_dmatx_data { 244 243 struct dma_chan *chan; 245 - struct scatterlist sg; 244 + dma_addr_t dma; 245 + size_t len; 246 246 char *buf; 247 247 bool queued; 248 248 }; ··· 368 366 369 367 #define PL011_DMA_BUFFER_SIZE PAGE_SIZE 370 368 371 - static int pl011_sgbuf_init(struct dma_chan *chan, struct pl011_sgbuf *sg, 369 + static int pl011_dmabuf_init(struct dma_chan *chan, struct pl011_dmabuf *db, 372 370 enum dma_data_direction dir) 373 371 { 374 - dma_addr_t dma_addr; 375 - 376 - sg->buf = dma_alloc_coherent(chan->device->dev, 377 - PL011_DMA_BUFFER_SIZE, &dma_addr, GFP_KERNEL); 378 - if (!sg->buf) 372 + db->buf = dma_alloc_coherent(chan->device->dev, PL011_DMA_BUFFER_SIZE, 373 + &db->dma, GFP_KERNEL); 374 + if (!db->buf) 379 375 return -ENOMEM; 380 - 381 - sg_init_table(&sg->sg, 1); 382 - sg_set_page(&sg->sg, phys_to_page(dma_addr), 383 - PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr)); 384 - sg_dma_address(&sg->sg) = dma_addr; 385 - sg_dma_len(&sg->sg) = PL011_DMA_BUFFER_SIZE; 376 + db->len = PL011_DMA_BUFFER_SIZE; 386 377 387 378 return 0; 388 379 } 389 380 390 - static void pl011_sgbuf_free(struct dma_chan *chan, struct pl011_sgbuf *sg, 381 + static void pl011_dmabuf_free(struct dma_chan *chan, struct pl011_dmabuf *db, 391 382 enum dma_data_direction dir) 392 383 { 393 - if (sg->buf) { 384 + if (db->buf) { 394 385 dma_free_coherent(chan->device->dev, 395 - PL011_DMA_BUFFER_SIZE, sg->buf, 396 - sg_dma_address(&sg->sg)); 386 + PL011_DMA_BUFFER_SIZE, db->buf, db->dma); 397 387 } 398 388 } 399 389 ··· 546 552 547 553 uart_port_lock_irqsave(&uap->port, &flags); 548 554 if (uap->dmatx.queued) 549 - dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1, 550 - DMA_TO_DEVICE); 555 + dma_unmap_single(dmatx->chan->device->dev, dmatx->dma, 556 + dmatx->len, DMA_TO_DEVICE); 551 557 552 558 dmacr = uap->dmacr; 553 559 uap->dmacr = dmacr & ~UART011_TXDMAE; ··· 633 639 memcpy(&dmatx->buf[first], &xmit->buf[0], second); 634 640 } 635 641 636 - dmatx->sg.length = count; 637 - 638 - if (dma_map_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE) != 1) { 642 + dmatx->len = count; 643 + dmatx->dma = dma_map_single(dma_dev->dev, dmatx->buf, count, 644 + DMA_TO_DEVICE); 645 + if (dmatx->dma == DMA_MAPPING_ERROR) { 639 646 uap->dmatx.queued = false; 640 647 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); 641 648 return -EBUSY; 642 649 } 643 650 644 - desc = dmaengine_prep_slave_sg(chan, &dmatx->sg, 1, DMA_MEM_TO_DEV, 651 + desc = dmaengine_prep_slave_single(chan, dmatx->dma, dmatx->len, DMA_MEM_TO_DEV, 645 652 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 646 653 if (!desc) { 647 - dma_unmap_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE); 654 + dma_unmap_single(dma_dev->dev, dmatx->dma, dmatx->len, DMA_TO_DEVICE); 648 655 uap->dmatx.queued = false; 649 656 /* 650 657 * If DMA cannot be used right now, we complete this ··· 808 813 dmaengine_terminate_async(uap->dmatx.chan); 809 814 810 815 if (uap->dmatx.queued) { 811 - dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, 812 - DMA_TO_DEVICE); 816 + dma_unmap_single(uap->dmatx.chan->device->dev, uap->dmatx.dma, 817 + uap->dmatx.len, DMA_TO_DEVICE); 813 818 uap->dmatx.queued = false; 814 819 uap->dmacr &= ~UART011_TXDMAE; 815 820 pl011_write(uap->dmacr, uap, REG_DMACR); ··· 823 828 struct dma_chan *rxchan = uap->dmarx.chan; 824 829 struct pl011_dmarx_data *dmarx = &uap->dmarx; 825 830 struct dma_async_tx_descriptor *desc; 826 - struct pl011_sgbuf *sgbuf; 831 + struct pl011_dmabuf *dbuf; 827 832 828 833 if (!rxchan) 829 834 return -EIO; 830 835 831 836 /* Start the RX DMA job */ 832 - sgbuf = uap->dmarx.use_buf_b ? 833 - &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; 834 - desc = dmaengine_prep_slave_sg(rxchan, &sgbuf->sg, 1, 837 + dbuf = uap->dmarx.use_buf_b ? 838 + &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; 839 + desc = dmaengine_prep_slave_single(rxchan, dbuf->dma, dbuf->len, 835 840 DMA_DEV_TO_MEM, 836 841 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 837 842 /* ··· 871 876 bool readfifo) 872 877 { 873 878 struct tty_port *port = &uap->port.state->port; 874 - struct pl011_sgbuf *sgbuf = use_buf_b ? 875 - &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; 879 + struct pl011_dmabuf *dbuf = use_buf_b ? 880 + &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; 876 881 int dma_count = 0; 877 882 u32 fifotaken = 0; /* only used for vdbg() */ 878 883 ··· 881 886 882 887 if (uap->dmarx.poll_rate) { 883 888 /* The data can be taken by polling */ 884 - dmataken = sgbuf->sg.length - dmarx->last_residue; 889 + dmataken = dbuf->len - dmarx->last_residue; 885 890 /* Recalculate the pending size */ 886 891 if (pending >= dmataken) 887 892 pending -= dmataken; ··· 895 900 * Note that tty_insert_flip_buf() tries to take as many chars 896 901 * as it can. 897 902 */ 898 - dma_count = tty_insert_flip_string(port, sgbuf->buf + dmataken, 903 + dma_count = tty_insert_flip_string(port, dbuf->buf + dmataken, 899 904 pending); 900 905 901 906 uap->port.icount.rx += dma_count; ··· 906 911 907 912 /* Reset the last_residue for Rx DMA poll */ 908 913 if (uap->dmarx.poll_rate) 909 - dmarx->last_residue = sgbuf->sg.length; 914 + dmarx->last_residue = dbuf->len; 910 915 911 916 /* 912 917 * Only continue with trying to read the FIFO if all DMA chars have ··· 941 946 { 942 947 struct pl011_dmarx_data *dmarx = &uap->dmarx; 943 948 struct dma_chan *rxchan = dmarx->chan; 944 - struct pl011_sgbuf *sgbuf = dmarx->use_buf_b ? 945 - &dmarx->sgbuf_b : &dmarx->sgbuf_a; 949 + struct pl011_dmabuf *dbuf = dmarx->use_buf_b ? 950 + &dmarx->dbuf_b : &dmarx->dbuf_a; 946 951 size_t pending; 947 952 struct dma_tx_state state; 948 953 enum dma_status dmastat; ··· 964 969 pl011_write(uap->dmacr, uap, REG_DMACR); 965 970 uap->dmarx.running = false; 966 971 967 - pending = sgbuf->sg.length - state.residue; 972 + pending = dbuf->len - state.residue; 968 973 BUG_ON(pending > PL011_DMA_BUFFER_SIZE); 969 974 /* Then we terminate the transfer - we now know our residue */ 970 975 dmaengine_terminate_all(rxchan); ··· 991 996 struct pl011_dmarx_data *dmarx = &uap->dmarx; 992 997 struct dma_chan *rxchan = dmarx->chan; 993 998 bool lastbuf = dmarx->use_buf_b; 994 - struct pl011_sgbuf *sgbuf = dmarx->use_buf_b ? 995 - &dmarx->sgbuf_b : &dmarx->sgbuf_a; 999 + struct pl011_dmabuf *dbuf = dmarx->use_buf_b ? 1000 + &dmarx->dbuf_b : &dmarx->dbuf_a; 996 1001 size_t pending; 997 1002 struct dma_tx_state state; 998 1003 int ret; ··· 1010 1015 * the DMA irq handler. So we check the residue here. 1011 1016 */ 1012 1017 rxchan->device->device_tx_status(rxchan, dmarx->cookie, &state); 1013 - pending = sgbuf->sg.length - state.residue; 1018 + pending = dbuf->len - state.residue; 1014 1019 BUG_ON(pending > PL011_DMA_BUFFER_SIZE); 1015 1020 /* Then we terminate the transfer - we now know our residue */ 1016 1021 dmaengine_terminate_all(rxchan); ··· 1062 1067 unsigned long flags; 1063 1068 unsigned int dmataken = 0; 1064 1069 unsigned int size = 0; 1065 - struct pl011_sgbuf *sgbuf; 1070 + struct pl011_dmabuf *dbuf; 1066 1071 int dma_count; 1067 1072 struct dma_tx_state state; 1068 1073 1069 - sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; 1074 + dbuf = dmarx->use_buf_b ? &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; 1070 1075 rxchan->device->device_tx_status(rxchan, dmarx->cookie, &state); 1071 1076 if (likely(state.residue < dmarx->last_residue)) { 1072 - dmataken = sgbuf->sg.length - dmarx->last_residue; 1077 + dmataken = dbuf->len - dmarx->last_residue; 1073 1078 size = dmarx->last_residue - state.residue; 1074 - dma_count = tty_insert_flip_string(port, sgbuf->buf + dmataken, 1079 + dma_count = tty_insert_flip_string(port, dbuf->buf + dmataken, 1075 1080 size); 1076 1081 if (dma_count == size) 1077 1082 dmarx->last_residue = state.residue; ··· 1118 1123 return; 1119 1124 } 1120 1125 1121 - sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); 1126 + uap->dmatx.len = PL011_DMA_BUFFER_SIZE; 1122 1127 1123 1128 /* The DMA buffer is now the FIFO the TTY subsystem can use */ 1124 1129 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; ··· 1128 1133 goto skip_rx; 1129 1134 1130 1135 /* Allocate and map DMA RX buffers */ 1131 - ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, 1136 + ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_a, 1132 1137 DMA_FROM_DEVICE); 1133 1138 if (ret) { 1134 1139 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", ··· 1136 1141 goto skip_rx; 1137 1142 } 1138 1143 1139 - ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, 1144 + ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_b, 1140 1145 DMA_FROM_DEVICE); 1141 1146 if (ret) { 1142 1147 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", 1143 1148 "RX buffer B", ret); 1144 - pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, 1149 + pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_a, 1145 1150 DMA_FROM_DEVICE); 1146 1151 goto skip_rx; 1147 1152 } ··· 1195 1200 /* In theory, this should already be done by pl011_dma_flush_buffer */ 1196 1201 dmaengine_terminate_all(uap->dmatx.chan); 1197 1202 if (uap->dmatx.queued) { 1198 - dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, 1199 - DMA_TO_DEVICE); 1203 + dma_unmap_single(uap->dmatx.chan->device->dev, 1204 + uap->dmatx.dma, uap->dmatx.len, 1205 + DMA_TO_DEVICE); 1200 1206 uap->dmatx.queued = false; 1201 1207 } 1202 1208 ··· 1208 1212 if (uap->using_rx_dma) { 1209 1213 dmaengine_terminate_all(uap->dmarx.chan); 1210 1214 /* Clean up the RX DMA */ 1211 - pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); 1212 - pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); 1215 + pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_a, DMA_FROM_DEVICE); 1216 + pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_b, DMA_FROM_DEVICE); 1213 1217 if (uap->dmarx.poll_rate) 1214 1218 del_timer_sync(&uap->dmarx.timer); 1215 1219 uap->using_rx_dma = false;

+9 -1

drivers/tty/serial/ma35d1_serial.c

··· 552 552 */ 553 553 static void ma35d1serial_console_write(struct console *co, const char *s, u32 count) 554 554 { 555 - struct uart_ma35d1_port *up = &ma35d1serial_ports[co->index]; 555 + struct uart_ma35d1_port *up; 556 556 unsigned long flags; 557 557 int locked = 1; 558 558 u32 ier; 559 + 560 + if ((co->index < 0) || (co->index >= MA35_UART_NR)) { 561 + pr_warn("Failed to write on ononsole port %x, out of range\n", 562 + co->index); 563 + return; 564 + } 565 + 566 + up = &ma35d1serial_ports[co->index]; 559 567 560 568 if (up->port.sysrq) 561 569 locked = 0;

+12

drivers/tty/serial/sc16is7xx.c

··· 766 766 case SC16IS7XX_IIR_RTOI_SRC: 767 767 case SC16IS7XX_IIR_XOFFI_SRC: 768 768 rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG); 769 + 770 + /* 771 + * There is a silicon bug that makes the chip report a 772 + * time-out interrupt but no data in the FIFO. This is 773 + * described in errata section 18.1.4. 774 + * 775 + * When this happens, read one byte from the FIFO to 776 + * clear the interrupt. 777 + */ 778 + if (iir == SC16IS7XX_IIR_RTOI_SRC && !rxlen) 779 + rxlen = 1; 780 + 769 781 if (rxlen) 770 782 sc16is7xx_handle_rx(port, rxlen, iir); 771 783 break;

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