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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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media: i2c: ov01a10: Optimize setting h/vflip values

Since ov01a10_global_setting[] sets the initial format1 register value,
there is no need to do a read-write-modify when setting the flip controls.

Only write format1 when setting the flip-controls and remove the now
unnecessary format1 register init from ov01a10_global_setting[].

Signed-off-by: Hans de Goede <hansg@kernel.org>
Tested-by: Mehdi Djait <mehdi.djait@linux.intel.com> # Dell XPS 9315
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

authored by

Hans de Goede and committed by
Hans Verkuil 0c5ebba5 12d3c5ff

+26 -15
+26 -15
drivers/media/i2c/ov01a10.c
··· 161 161 {0x3815, 0x01}, 162 162 {0x3816, 0x01}, 163 163 {0x3817, 0x01}, 164 - {0x3820, 0xa8}, 165 164 {0x3822, 0x13}, 166 165 {0x3832, 0x28}, 167 166 {0x3833, 0x10}, ··· 239 240 u32 bus_fmt; 240 241 int pattern_size; 241 242 int border_size; 243 + u8 format1_base_val; 242 244 bool invert_hflip_shift; 243 245 bool invert_vflip_shift; 244 246 }; ··· 258 258 struct v4l2_ctrl *vblank; 259 259 struct v4l2_ctrl *hblank; 260 260 struct v4l2_ctrl *exposure; 261 + struct v4l2_ctrl *hflip; 262 + struct v4l2_ctrl *vflip; 261 263 262 264 u32 link_freq_index; 263 265 ··· 312 310 NULL); 313 311 } 314 312 313 + static void ov01a10_set_format1(struct ov01a10 *ov01a10, int *ret) 314 + { 315 + u8 val = ov01a10->cfg->format1_base_val; 316 + 317 + /* hflip register bit is inverted */ 318 + if (!ov01a10->hflip->val) 319 + val |= FIELD_PREP(OV01A10_HFLIP_MASK, 0x1); 320 + 321 + if (ov01a10->vflip->val) 322 + val |= FIELD_PREP(OV01A10_VFLIP_MASK, 0x1); 323 + 324 + cci_write(ov01a10->regmap, OV01A10_REG_FORMAT1, val, ret); 325 + } 326 + 315 327 static int ov01a10_set_hflip(struct ov01a10 *ov01a10, bool hflip) 316 328 { 317 329 struct v4l2_rect *crop = ov01a10_get_active_crop(ov01a10); 318 330 const struct ov01a10_sensor_cfg *cfg = ov01a10->cfg; 319 - u32 val, offset; 331 + u32 offset; 320 332 int ret = 0; 321 333 322 334 offset = crop->left; 323 335 if ((hflip ^ cfg->invert_hflip_shift) && cfg->border_size) 324 336 offset++; 325 337 326 - val = hflip ? 0 : FIELD_PREP(OV01A10_HFLIP_MASK, 0x1); 327 - 328 338 cci_write(ov01a10->regmap, OV01A10_REG_X_WIN, offset, &ret); 329 - cci_update_bits(ov01a10->regmap, OV01A10_REG_FORMAT1, 330 - OV01A10_HFLIP_MASK, val, &ret); 339 + ov01a10_set_format1(ov01a10, &ret); 331 340 332 341 return ret; 333 342 } ··· 347 334 { 348 335 struct v4l2_rect *crop = ov01a10_get_active_crop(ov01a10); 349 336 const struct ov01a10_sensor_cfg *cfg = ov01a10->cfg; 350 - u32 val, offset; 337 + u32 offset; 351 338 int ret = 0; 352 339 353 340 offset = crop->top; 354 341 if ((vflip ^ cfg->invert_vflip_shift) && cfg->border_size) 355 342 offset++; 356 343 357 - val = vflip ? FIELD_PREP(OV01A10_VFLIP_MASK, 0x1) : 0; 358 - 359 344 cci_write(ov01a10->regmap, OV01A10_REG_Y_WIN, offset, &ret); 360 - cci_update_bits(ov01a10->regmap, OV01A10_REG_FORMAT1, 361 - OV01A10_VFLIP_MASK, val, &ret); 345 + ov01a10_set_format1(ov01a10, &ret); 362 346 363 347 return ret; 364 348 } ··· 484 474 ARRAY_SIZE(ov01a10_test_pattern_menu) - 1, 485 475 0, 0, ov01a10_test_pattern_menu); 486 476 487 - v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops, V4L2_CID_HFLIP, 488 - 0, 1, 1, 0); 489 - v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops, V4L2_CID_VFLIP, 490 - 0, 1, 1, 0); 477 + ov01a10->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops, 478 + V4L2_CID_HFLIP, 0, 1, 1, 0); 479 + ov01a10->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a10_ctrl_ops, 480 + V4L2_CID_VFLIP, 0, 1, 1, 0); 491 481 492 482 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov01a10_ctrl_ops, 493 483 &props); ··· 1097 1087 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, 1098 1088 .pattern_size = 2, /* 2x2 */ 1099 1089 .border_size = 2, 1090 + .format1_base_val = 0xa0, 1100 1091 .invert_hflip_shift = true, 1101 1092 .invert_vflip_shift = false, 1102 1093 };