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drm/amdgpu: Apply gc v9_5_0 golden settings

Apply gc v9_5_0 golden settings.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Hawking Zhang and committed by
Alex Deucher
0ca6d975 dad0c705

+10 -6
+10 -6
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 353 353 354 354 WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG, 355 355 GOLDEN_GB_ADDR_CONFIG); 356 - /* Golden settings applied by driver for ASIC with rev_id 0 */ 357 - if (adev->rev_id == 0) { 358 - WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1, 359 - REDUCE_FIFO_DEPTH_BY_2, 2); 356 + if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0)) { 357 + WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2, SPARE, 0x1); 360 358 } else { 361 - WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2, 362 - SPARE, 0x1); 359 + /* Golden settings applied by driver for ASIC with rev_id 0 */ 360 + if (adev->rev_id == 0) { 361 + WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1, 362 + REDUCE_FIFO_DEPTH_BY_2, 2); 363 + } else { 364 + WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2, 365 + SPARE, 0x1); 366 + } 363 367 } 364 368 } 365 369 }