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drm/amdgpu: Enable P2P dmabuf over XGMI

Access the exported P2P dmabuf over XGMI, if available.
Otherwise, fall back to the existing PCIe method.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arunpravin <apaneers@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Arunpravin and committed by
Alex Deucher
0cf0ee98 d6e6dfb2

+52 -3
+34
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
··· 35 35 #include "amdgpu_display.h" 36 36 #include "amdgpu_gem.h" 37 37 #include "amdgpu_dma_buf.h" 38 + #include "amdgpu_xgmi.h" 38 39 #include <drm/amdgpu_drm.h> 39 40 #include <linux/dma-buf.h> 40 41 #include <linux/dma-fence-array.h> ··· 595 594 get_dma_buf(dma_buf); 596 595 obj->import_attach = attach; 597 596 return obj; 597 + } 598 + 599 + /** 600 + * amdgpu_dmabuf_is_xgmi_accessible - Check if xgmi available for P2P transfer 601 + * 602 + * @adev: amdgpu_device pointer of the importer 603 + * @bo: amdgpu buffer object 604 + * 605 + * Returns: 606 + * True if dmabuf accessible over xgmi, false otherwise. 607 + */ 608 + bool amdgpu_dmabuf_is_xgmi_accessible(struct amdgpu_device *adev, 609 + struct amdgpu_bo *bo) 610 + { 611 + struct drm_gem_object *obj = &bo->tbo.base; 612 + struct drm_gem_object *gobj; 613 + 614 + if (obj->import_attach) { 615 + struct dma_buf *dma_buf = obj->import_attach->dmabuf; 616 + 617 + if (dma_buf->ops != &amdgpu_dmabuf_ops) 618 + /* No XGMI with non AMD GPUs */ 619 + return false; 620 + 621 + gobj = dma_buf->priv; 622 + bo = gem_to_amdgpu_bo(gobj); 623 + } 624 + 625 + if (amdgpu_xgmi_same_hive(adev, amdgpu_ttm_adev(bo->tbo.bdev)) && 626 + (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)) 627 + return true; 628 + 629 + return false; 598 630 }
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.h
··· 29 29 int flags); 30 30 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev, 31 31 struct dma_buf *dma_buf); 32 + bool amdgpu_dmabuf_is_xgmi_accessible(struct amdgpu_device *adev, 33 + struct amdgpu_bo *bo); 32 34 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj); 33 35 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 34 36 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj,
+16 -3
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
··· 28 28 #include <linux/dma-fence-array.h> 29 29 #include <linux/interval_tree_generic.h> 30 30 #include <linux/idr.h> 31 + #include <linux/dma-buf.h> 31 32 32 33 #include <drm/amdgpu_drm.h> 33 34 #include "amdgpu.h" ··· 36 35 #include "amdgpu_amdkfd.h" 37 36 #include "amdgpu_gmc.h" 38 37 #include "amdgpu_xgmi.h" 38 + #include "amdgpu_dma_buf.h" 39 39 40 40 /** 41 41 * DOC: GPUVM ··· 1780 1778 nodes = NULL; 1781 1779 resv = vm->root.base.bo->tbo.base.resv; 1782 1780 } else { 1781 + struct drm_gem_object *obj = &bo->tbo.base; 1783 1782 struct ttm_dma_tt *ttm; 1784 1783 1784 + resv = bo->tbo.base.resv; 1785 + if (obj->import_attach && bo_va->is_xgmi) { 1786 + struct dma_buf *dma_buf = obj->import_attach->dmabuf; 1787 + struct drm_gem_object *gobj = dma_buf->priv; 1788 + struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj); 1789 + 1790 + if (abo->tbo.mem.mem_type == TTM_PL_VRAM) 1791 + bo = gem_to_amdgpu_bo(gobj); 1792 + } 1785 1793 mem = &bo->tbo.mem; 1786 1794 nodes = mem->mm_node; 1787 1795 if (mem->mem_type == TTM_PL_TT) { 1788 1796 ttm = container_of(bo->tbo.ttm, struct ttm_dma_tt, ttm); 1789 1797 pages_addr = ttm->dma_address; 1790 1798 } 1791 - resv = bo->tbo.base.resv; 1792 1799 } 1793 1800 1794 1801 if (bo) { ··· 2143 2132 INIT_LIST_HEAD(&bo_va->valids); 2144 2133 INIT_LIST_HEAD(&bo_va->invalids); 2145 2134 2146 - if (bo && amdgpu_xgmi_same_hive(adev, amdgpu_ttm_adev(bo->tbo.bdev)) && 2147 - (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)) { 2135 + if (!bo) 2136 + return bo_va; 2137 + 2138 + if (amdgpu_dmabuf_is_xgmi_accessible(adev, bo)) { 2148 2139 bo_va->is_xgmi = true; 2149 2140 /* Power up XGMI if it can be potentially used */ 2150 2141 amdgpu_xgmi_set_pstate(adev, AMDGPU_XGMI_PSTATE_MAX_VEGA20);