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Merge tag 'firewire-updates-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394

Pull firewire updates from Takashi Sakamoto:

- Refactor page allocation dedicated to 1394 OHCI IR/IT/AR DMA contexts

Although 1394 OHCI specification does not impose any restriction on
the memory size dedicated to these DMA contexts, 1394 OHCI PCI driver
allocates pages for convenience when mapping them into either kernel
space or userspace VMA. The driver previously used dma_alloc_pages()
for both page allocation and mapping creation, even though this
kernel API is rarely used. Following discussions questioning the
page-oriented kernel API in the DMA layer, the driver has been
refactored to avoid using this API. In addition, the use of private
members in the allocated pages has been removed following
long-standing concern.

- Allocate variable-sized buffer for isochronous context header

1394 OHCI PCI driver previously allocated a single page for
isochronous context header. As a result, the buffer size for the
header was fixed to PAGE_SIZE, which imposed a limitation on IEC
61883-1/6 packet streaming engine. Consequently, the ALSA PCM devices
provided by drivers for audio and music units in IEEE 1394 bus were
constrained in the maximum size of buffer period (64 ms in most
cases). This limitation is resolved by dynamically allocating the
header buffer with an arbitrary size.

* tag 'firewire-updates-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394:
ALSA: firewire: remove PCM buffer size constraint from isoc context header
firewire: core: add fw_iso_context_create() variant with header storage size
firewire: core: provide isoc header buffer size outside card driver
firewire: ohci: allocate isoc context header by kvmalloc()
firewire: core: add flags member for isochronous context structure
firewire: ohci: use cleanup helper for isoc context header allocation
firewire: ohci: code refactoring to use union for isoc multiple channel state
firewire: ohci: refactor isoc single-channel state using a union
firewire: core: add function variants for isochronous context creation
firewire: ohci: fix index of pages for dma address to 1394 OHCI IT context
firewire: ohci: stop using page private to store DMA mapping address
firewire: ohci: split page allocation from dma mapping
firewire: ohci: use MAX macro to guarantee minimum count of pages for AR contexts
firewire: core: stop using page private to store DMA mapping address
firewire: core: use common kernel API to allocate and release a batch of pages
firewire: core: code refactoring with cleanup function for isoc pages
firewire: core: use mutex instead of spinlock for client isochronous context
firewire: core: move private function declaration from public header to internal header

+268 -228
+2 -2
drivers/firewire/core-card.c
··· 704 704 return -ENODEV; 705 705 } 706 706 707 - static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card, 708 - int type, int channel, size_t header_size) 707 + static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card, int type, 708 + int channel, size_t header_size, size_t header_storage_size) 709 709 { 710 710 return ERR_PTR(-ENODEV); 711 711 }
+26 -45
drivers/firewire/core-cdev.c
··· 63 63 u64 bus_reset_closure; 64 64 65 65 struct fw_iso_context *iso_context; 66 + struct mutex iso_context_mutex; 66 67 u64 iso_closure; 67 68 struct fw_iso_buffer buffer; 68 69 unsigned long vm_start; 69 - bool buffer_is_mapped; 70 70 71 71 struct list_head phy_receiver_link; 72 72 u64 phy_receiver_closure; ··· 306 306 INIT_LIST_HEAD(&client->phy_receiver_link); 307 307 INIT_LIST_HEAD(&client->link); 308 308 kref_init(&client->kref); 309 + mutex_init(&client->iso_context_mutex); 309 310 310 311 file->private_data = client; 311 312 ··· 1026 1025 return DMA_FROM_DEVICE; 1027 1026 } 1028 1027 1029 - static struct fw_iso_context *fw_iso_mc_context_create(struct fw_card *card, 1030 - fw_iso_mc_callback_t callback, 1031 - void *callback_data) 1032 - { 1033 - struct fw_iso_context *ctx; 1034 - 1035 - ctx = fw_iso_context_create(card, FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL, 1036 - 0, 0, 0, NULL, callback_data); 1037 - if (!IS_ERR(ctx)) 1038 - ctx->callback.mc = callback; 1039 - 1040 - return ctx; 1041 - } 1042 - 1043 1028 static int ioctl_create_iso_context(struct client *client, union ioctl_arg *arg) 1044 1029 { 1045 1030 struct fw_cdev_create_iso_context *a = &arg->create_iso_context; 1046 1031 struct fw_iso_context *context; 1047 - union fw_iso_callback cb; 1048 1032 int ret; 1049 1033 1050 1034 BUILD_BUG_ON(FW_CDEV_ISO_CONTEXT_TRANSMIT != FW_ISO_CONTEXT_TRANSMIT || ··· 1041 1055 case FW_ISO_CONTEXT_TRANSMIT: 1042 1056 if (a->speed > SCODE_3200 || a->channel > 63) 1043 1057 return -EINVAL; 1044 - 1045 - cb.sc = iso_callback; 1046 1058 break; 1047 1059 1048 1060 case FW_ISO_CONTEXT_RECEIVE: 1049 1061 if (a->header_size < 4 || (a->header_size & 3) || 1050 1062 a->channel > 63) 1051 1063 return -EINVAL; 1052 - 1053 - cb.sc = iso_callback; 1054 1064 break; 1055 1065 1056 1066 case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: 1057 - cb.mc = iso_mc_callback; 1058 1067 break; 1059 1068 1060 1069 default: ··· 1057 1076 } 1058 1077 1059 1078 if (a->type == FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) 1060 - context = fw_iso_mc_context_create(client->device->card, cb.mc, 1061 - client); 1079 + context = fw_iso_mc_context_create(client->device->card, iso_mc_callback, client); 1062 1080 else 1063 - context = fw_iso_context_create(client->device->card, a->type, 1064 - a->channel, a->speed, 1065 - a->header_size, cb.sc, client); 1081 + context = fw_iso_context_create(client->device->card, a->type, a->channel, a->speed, 1082 + a->header_size, iso_callback, client); 1066 1083 if (IS_ERR(context)) 1067 1084 return PTR_ERR(context); 1068 1085 if (client->version < FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW) 1069 - context->drop_overflow_headers = true; 1086 + context->flags |= FW_ISO_CONTEXT_FLAG_DROP_OVERFLOW_HEADERS; 1070 1087 1071 1088 // We only support one context at this time. 1072 - guard(spinlock_irq)(&client->lock); 1073 - 1074 - if (client->iso_context != NULL) { 1075 - fw_iso_context_destroy(context); 1076 - 1077 - return -EBUSY; 1078 - } 1079 - if (!client->buffer_is_mapped) { 1080 - ret = fw_iso_buffer_map_dma(&client->buffer, 1081 - client->device->card, 1082 - iso_dma_direction(context)); 1083 - if (ret < 0) { 1089 + scoped_guard(mutex, &client->iso_context_mutex) { 1090 + if (client->iso_context != NULL) { 1084 1091 fw_iso_context_destroy(context); 1085 1092 1086 - return ret; 1093 + return -EBUSY; 1087 1094 } 1088 - client->buffer_is_mapped = true; 1095 + // The DMA mapping operation is available if the buffer is already allocated by 1096 + // mmap(2) system call. If not, it is delegated to the system call. 1097 + if (client->buffer.pages && !client->buffer.dma_addrs) { 1098 + ret = fw_iso_buffer_map_dma(&client->buffer, client->device->card, 1099 + iso_dma_direction(context)); 1100 + if (ret < 0) { 1101 + fw_iso_context_destroy(context); 1102 + 1103 + return ret; 1104 + } 1105 + } 1106 + client->iso_closure = a->closure; 1107 + client->iso_context = context; 1089 1108 } 1090 - client->iso_closure = a->closure; 1091 - client->iso_context = context; 1092 1109 1093 1110 a->handle = 0; 1094 1111 ··· 1805 1826 if (ret < 0) 1806 1827 return ret; 1807 1828 1808 - scoped_guard(spinlock_irq, &client->lock) { 1829 + scoped_guard(mutex, &client->iso_context_mutex) { 1830 + // The direction of DMA can be determined if the isochronous context is already 1831 + // allocated. If not, the DMA mapping operation is postponed after the allocation. 1809 1832 if (client->iso_context) { 1810 1833 ret = fw_iso_buffer_map_dma(&client->buffer, client->device->card, 1811 1834 iso_dma_direction(client->iso_context)); 1812 1835 if (ret < 0) 1813 1836 goto fail; 1814 - client->buffer_is_mapped = true; 1815 1837 } 1816 1838 } 1817 1839 ··· 1859 1879 1860 1880 if (client->iso_context) 1861 1881 fw_iso_context_destroy(client->iso_context); 1882 + mutex_destroy(&client->iso_context_mutex); 1862 1883 1863 1884 if (client->buffer.pages) 1864 1885 fw_iso_buffer_destroy(&client->buffer, client->device->card);
+56 -48
drivers/firewire/core-iso.c
··· 30 30 31 31 int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count) 32 32 { 33 - int i; 33 + struct page **page_array __free(kfree) = kcalloc(page_count, sizeof(page_array[0]), GFP_KERNEL); 34 34 35 - buffer->page_count = 0; 36 - buffer->page_count_mapped = 0; 37 - buffer->pages = kmalloc_array(page_count, sizeof(buffer->pages[0]), 38 - GFP_KERNEL); 39 - if (buffer->pages == NULL) 35 + if (!page_array) 40 36 return -ENOMEM; 41 37 42 - for (i = 0; i < page_count; i++) { 43 - buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO); 44 - if (buffer->pages[i] == NULL) 45 - break; 46 - } 47 - buffer->page_count = i; 48 - if (i < page_count) { 49 - fw_iso_buffer_destroy(buffer, NULL); 38 + // Retrieve noncontiguous pages. The descriptors for 1394 OHCI isochronous DMA contexts 39 + // have a set of address and length per each, while the reason to use pages is the 40 + // convenience to map them into virtual address space of user process. 41 + unsigned long nr_populated = alloc_pages_bulk(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO, 42 + page_count, page_array); 43 + if (nr_populated != page_count) { 44 + // Assuming the above call fills page_array sequentially from the beginning. 45 + release_pages(page_array, nr_populated); 50 46 return -ENOMEM; 51 47 } 48 + 49 + buffer->page_count = page_count; 50 + buffer->pages = no_free_ptr(page_array); 52 51 53 52 return 0; 54 53 } ··· 55 56 int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card, 56 57 enum dma_data_direction direction) 57 58 { 58 - dma_addr_t address; 59 + dma_addr_t *dma_addrs __free(kfree) = kcalloc(buffer->page_count, sizeof(dma_addrs[0]), 60 + GFP_KERNEL); 59 61 int i; 60 62 61 - buffer->direction = direction; 63 + if (!dma_addrs) 64 + return -ENOMEM; 62 65 66 + // Retrieve DMA mapping addresses for the pages. They are not contiguous. Maintain the cache 67 + // coherency for the pages by hand. 63 68 for (i = 0; i < buffer->page_count; i++) { 64 - address = dma_map_page(card->device, buffer->pages[i], 65 - 0, PAGE_SIZE, direction); 66 - if (dma_mapping_error(card->device, address)) 69 + // The dma_map_phys() with a physical address per page is available here, instead. 70 + dma_addr_t dma_addr = dma_map_page(card->device, buffer->pages[i], 0, PAGE_SIZE, 71 + direction); 72 + if (dma_mapping_error(card->device, dma_addr)) 67 73 break; 68 74 69 - set_page_private(buffer->pages[i], address); 75 + dma_addrs[i] = dma_addr; 70 76 } 71 - buffer->page_count_mapped = i; 72 - if (i < buffer->page_count) 77 + if (i < buffer->page_count) { 78 + while (i-- > 0) 79 + dma_unmap_page(card->device, dma_addrs[i], PAGE_SIZE, buffer->direction); 73 80 return -ENOMEM; 81 + } 82 + 83 + buffer->direction = direction; 84 + buffer->dma_addrs = no_free_ptr(dma_addrs); 74 85 75 86 return 0; 76 87 } ··· 105 96 void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer, 106 97 struct fw_card *card) 107 98 { 108 - int i; 109 - dma_addr_t address; 110 - 111 - for (i = 0; i < buffer->page_count_mapped; i++) { 112 - address = page_private(buffer->pages[i]); 113 - dma_unmap_page(card->device, address, 114 - PAGE_SIZE, buffer->direction); 99 + if (buffer->dma_addrs) { 100 + for (int i = 0; i < buffer->page_count; ++i) { 101 + dma_addr_t dma_addr = buffer->dma_addrs[i]; 102 + dma_unmap_page(card->device, dma_addr, PAGE_SIZE, buffer->direction); 103 + } 104 + kfree(buffer->dma_addrs); 105 + buffer->dma_addrs = NULL; 115 106 } 116 - for (i = 0; i < buffer->page_count; i++) 117 - __free_page(buffer->pages[i]); 118 107 119 - kfree(buffer->pages); 120 - buffer->pages = NULL; 108 + if (buffer->pages) { 109 + release_pages(buffer->pages, buffer->page_count); 110 + kfree(buffer->pages); 111 + buffer->pages = NULL; 112 + } 113 + 121 114 buffer->page_count = 0; 122 - buffer->page_count_mapped = 0; 123 115 } 124 116 EXPORT_SYMBOL(fw_iso_buffer_destroy); 125 117 126 118 /* Convert DMA address to offset into virtually contiguous buffer. */ 127 119 size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed) 128 120 { 129 - size_t i; 130 - dma_addr_t address; 131 - ssize_t offset; 132 - 133 - for (i = 0; i < buffer->page_count; i++) { 134 - address = page_private(buffer->pages[i]); 135 - offset = (ssize_t)completed - (ssize_t)address; 121 + for (int i = 0; i < buffer->page_count; i++) { 122 + dma_addr_t dma_addr = buffer->dma_addrs[i]; 123 + ssize_t offset = (ssize_t)completed - (ssize_t)dma_addr; 136 124 if (offset > 0 && offset <= PAGE_SIZE) 137 125 return (i << PAGE_SHIFT) + offset; 138 126 } ··· 137 131 return 0; 138 132 } 139 133 140 - struct fw_iso_context *fw_iso_context_create(struct fw_card *card, 141 - int type, int channel, int speed, size_t header_size, 142 - fw_iso_callback_t callback, void *callback_data) 134 + struct fw_iso_context *__fw_iso_context_create(struct fw_card *card, int type, int channel, 135 + int speed, size_t header_size, size_t header_storage_size, 136 + union fw_iso_callback callback, void *callback_data) 143 137 { 144 138 struct fw_iso_context *ctx; 145 139 146 - ctx = card->driver->allocate_iso_context(card, 147 - type, channel, header_size); 140 + ctx = card->driver->allocate_iso_context(card, type, channel, header_size, 141 + header_storage_size); 148 142 if (IS_ERR(ctx)) 149 143 return ctx; 150 144 ··· 152 146 ctx->type = type; 153 147 ctx->channel = channel; 154 148 ctx->speed = speed; 149 + ctx->flags = 0; 155 150 ctx->header_size = header_size; 156 - ctx->callback.sc = callback; 151 + ctx->header_storage_size = header_storage_size; 152 + ctx->callback = callback; 157 153 ctx->callback_data = callback_data; 158 154 159 155 trace_isoc_outbound_allocate(ctx, channel, speed); ··· 164 156 165 157 return ctx; 166 158 } 167 - EXPORT_SYMBOL(fw_iso_context_create); 159 + EXPORT_SYMBOL(__fw_iso_context_create); 168 160 169 161 void fw_iso_context_destroy(struct fw_iso_context *ctx) 170 162 {
+12 -2
drivers/firewire/core.h
··· 100 100 void (*write_csr)(struct fw_card *card, int csr_offset, u32 value); 101 101 102 102 struct fw_iso_context * 103 - (*allocate_iso_context)(struct fw_card *card, 104 - int type, int channel, size_t header_size); 103 + (*allocate_iso_context)(struct fw_card *card, int type, int channel, size_t header_size, 104 + size_t header_storage_size); 105 105 void (*free_iso_context)(struct fw_iso_context *ctx); 106 106 107 107 int (*start_iso)(struct fw_iso_context *ctx, ··· 166 166 int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count); 167 167 int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card, 168 168 enum dma_data_direction direction); 169 + size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed); 169 170 170 171 static inline void fw_iso_context_init_work(struct fw_iso_context *ctx, work_func_t func) 171 172 { 172 173 INIT_WORK(&ctx->work, func); 174 + } 175 + 176 + static inline struct fw_iso_context *fw_iso_mc_context_create(struct fw_card *card, 177 + fw_iso_mc_callback_t callback, void *callback_data) 178 + { 179 + union fw_iso_callback cb = { .mc = callback }; 180 + 181 + return __fw_iso_context_create(card, FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL, 0, 0, 0, 0, cb, 182 + callback_data); 173 183 } 174 184 175 185
+133 -103
drivers/firewire/ohci.c
··· 86 86 #define AR_BUFFER_SIZE (32*1024) 87 87 #define AR_BUFFERS_MIN DIV_ROUND_UP(AR_BUFFER_SIZE, PAGE_SIZE) 88 88 /* we need at least two pages for proper list management */ 89 - #define AR_BUFFERS (AR_BUFFERS_MIN >= 2 ? AR_BUFFERS_MIN : 2) 89 + #define AR_BUFFERS MAX(2, AR_BUFFERS_MIN) 90 90 91 91 #define MAX_ASYNC_PAYLOAD 4096 92 92 #define MAX_AR_PACKET_SIZE (16 + MAX_ASYNC_PAYLOAD + 4) ··· 96 96 struct fw_ohci *ohci; 97 97 struct page *pages[AR_BUFFERS]; 98 98 void *buffer; 99 + dma_addr_t dma_addrs[AR_BUFFERS]; 99 100 struct descriptor *descriptors; 100 101 dma_addr_t descriptors_bus; 101 102 void *pointer; ··· 168 167 struct iso_context { 169 168 struct fw_iso_context base; 170 169 struct context context; 171 - void *header; 172 - size_t header_length; 173 170 unsigned long flushing_completions; 174 - u32 mc_buffer_bus; 175 - u16 mc_completed; 176 - u16 last_timestamp; 177 171 u8 sync; 178 172 u8 tags; 173 + union { 174 + struct { 175 + u16 last_timestamp; 176 + size_t header_length; 177 + void *header; 178 + } sc; 179 + struct { 180 + u32 buffer_bus; 181 + u16 completed; 182 + } mc; 183 + }; 179 184 }; 180 185 181 186 #define CONFIG_ROM_SIZE (CSR_CONFIG_ROM_END - CSR_CONFIG_ROM) ··· 520 513 return update_phy_reg(ohci, addr, clear_bits, set_bits); 521 514 } 522 515 523 - static inline dma_addr_t ar_buffer_bus(struct ar_context *ctx, unsigned int i) 524 - { 525 - return page_private(ctx->pages[i]); 526 - } 527 - 528 516 static void ar_context_link_page(struct ar_context *ctx, unsigned int index) 529 517 { 530 518 struct descriptor *d; ··· 541 539 static void ar_context_release(struct ar_context *ctx) 542 540 { 543 541 struct device *dev = ctx->ohci->card.device; 544 - unsigned int i; 545 542 546 543 if (!ctx->buffer) 547 544 return; 548 545 549 - vunmap(ctx->buffer); 550 - 551 - for (i = 0; i < AR_BUFFERS; i++) { 552 - if (ctx->pages[i]) 553 - dma_free_pages(dev, PAGE_SIZE, ctx->pages[i], 554 - ar_buffer_bus(ctx, i), DMA_FROM_DEVICE); 546 + for (int i = 0; i < AR_BUFFERS; ++i) { 547 + dma_addr_t dma_addr = ctx->dma_addrs[i]; 548 + if (dma_addr) 549 + dma_unmap_page(dev, dma_addr, PAGE_SIZE, DMA_FROM_DEVICE); 555 550 } 551 + memset(ctx->dma_addrs, 0, sizeof(ctx->dma_addrs)); 552 + 553 + vunmap(ctx->buffer); 554 + ctx->buffer = NULL; 555 + 556 + release_pages(ctx->pages, AR_BUFFERS); 557 + memset(ctx->pages, 0, sizeof(ctx->pages)); 556 558 } 557 559 558 560 static void ar_context_abort(struct ar_context *ctx, const char *error_msg) ··· 649 643 650 644 i = ar_first_buffer_index(ctx); 651 645 while (i != end_buffer_index) { 652 - dma_sync_single_for_cpu(ctx->ohci->card.device, 653 - ar_buffer_bus(ctx, i), 654 - PAGE_SIZE, DMA_FROM_DEVICE); 646 + dma_sync_single_for_cpu(ctx->ohci->card.device, ctx->dma_addrs[i], PAGE_SIZE, 647 + DMA_FROM_DEVICE); 655 648 i = ar_next_buffer_index(i); 656 649 } 657 650 if (end_buffer_offset > 0) 658 - dma_sync_single_for_cpu(ctx->ohci->card.device, 659 - ar_buffer_bus(ctx, i), 651 + dma_sync_single_for_cpu(ctx->ohci->card.device, ctx->dma_addrs[i], 660 652 end_buffer_offset, DMA_FROM_DEVICE); 661 653 } 662 654 ··· 795 791 796 792 i = ar_first_buffer_index(ctx); 797 793 while (i != end_buffer) { 798 - dma_sync_single_for_device(ctx->ohci->card.device, 799 - ar_buffer_bus(ctx, i), 800 - PAGE_SIZE, DMA_FROM_DEVICE); 794 + dma_sync_single_for_device(ctx->ohci->card.device, ctx->dma_addrs[i], PAGE_SIZE, 795 + DMA_FROM_DEVICE); 801 796 ar_context_link_page(ctx, i); 802 797 i = ar_next_buffer_index(i); 803 798 } ··· 848 845 { 849 846 struct device *dev = ohci->card.device; 850 847 unsigned int i; 851 - dma_addr_t dma_addr; 852 848 struct page *pages[AR_BUFFERS + AR_WRAPAROUND_PAGES]; 849 + dma_addr_t dma_addrs[AR_BUFFERS]; 850 + void *vaddr; 853 851 struct descriptor *d; 854 852 855 853 ctx->regs = regs; 856 854 ctx->ohci = ohci; 857 855 INIT_WORK(&ctx->work, ohci_ar_context_work); 858 856 859 - for (i = 0; i < AR_BUFFERS; i++) { 860 - ctx->pages[i] = dma_alloc_pages(dev, PAGE_SIZE, &dma_addr, 861 - DMA_FROM_DEVICE, GFP_KERNEL); 862 - if (!ctx->pages[i]) 863 - goto out_of_memory; 864 - set_page_private(ctx->pages[i], dma_addr); 865 - dma_sync_single_for_device(dev, dma_addr, PAGE_SIZE, 866 - DMA_FROM_DEVICE); 857 + // Retrieve noncontiguous pages. The descriptors for 1394 OHCI AR DMA contexts have a set 858 + // of address and length per each. The reason to use pages is to construct contiguous 859 + // address range in kernel virtual address space. 860 + unsigned long nr_populated = alloc_pages_bulk(GFP_KERNEL | GFP_DMA32, AR_BUFFERS, pages); 861 + 862 + if (nr_populated != AR_BUFFERS) { 863 + release_pages(pages, nr_populated); 864 + return -ENOMEM; 867 865 } 868 866 869 - for (i = 0; i < AR_BUFFERS; i++) 870 - pages[i] = ctx->pages[i]; 867 + // Map the pages into contiguous kernel virtual addresses so that the packet data 868 + // across the pages can be referred as being contiguous, especially across the last 869 + // and first pages. 871 870 for (i = 0; i < AR_WRAPAROUND_PAGES; i++) 872 - pages[AR_BUFFERS + i] = ctx->pages[i]; 873 - ctx->buffer = vmap(pages, ARRAY_SIZE(pages), VM_MAP, PAGE_KERNEL); 874 - if (!ctx->buffer) 875 - goto out_of_memory; 871 + pages[AR_BUFFERS + i] = pages[i]; 872 + vaddr = vmap(pages, ARRAY_SIZE(pages), VM_MAP, PAGE_KERNEL); 873 + if (!vaddr) { 874 + release_pages(pages, nr_populated); 875 + return -ENOMEM; 876 + } 877 + 878 + // Retrieve DMA mapping addresses for the pages. They are not contiguous. Maintain the cache 879 + // coherency for the pages by hand. 880 + for (i = 0; i < AR_BUFFERS; i++) { 881 + // The dma_map_phys() with a physical address per page is available here, instead. 882 + dma_addr_t dma_addr = dma_map_page(dev, pages[i], 0, PAGE_SIZE, DMA_FROM_DEVICE); 883 + if (dma_mapping_error(dev, dma_addr)) 884 + break; 885 + dma_addrs[i] = dma_addr; 886 + dma_sync_single_for_device(dev, dma_addr, PAGE_SIZE, DMA_FROM_DEVICE); 887 + } 888 + if (i < AR_BUFFERS) { 889 + while (i-- > 0) 890 + dma_unmap_page(dev, dma_addrs[i], PAGE_SIZE, DMA_FROM_DEVICE); 891 + vunmap(vaddr); 892 + release_pages(pages, nr_populated); 893 + return -ENOMEM; 894 + } 895 + 896 + memcpy(ctx->dma_addrs, dma_addrs, sizeof(ctx->dma_addrs)); 897 + ctx->buffer = vaddr; 898 + memcpy(ctx->pages, pages, sizeof(ctx->pages)); 876 899 877 900 ctx->descriptors = ohci->misc_buffer + descriptors_offset; 878 901 ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; ··· 909 880 d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | 910 881 DESCRIPTOR_STATUS | 911 882 DESCRIPTOR_BRANCH_ALWAYS); 912 - d->data_address = cpu_to_le32(ar_buffer_bus(ctx, i)); 883 + d->data_address = cpu_to_le32(ctx->dma_addrs[i]); 913 884 d->branch_address = cpu_to_le32(ctx->descriptors_bus + 914 885 ar_next_buffer_index(i) * sizeof(struct descriptor)); 915 886 } 916 887 917 888 return 0; 918 - 919 - out_of_memory: 920 - ar_context_release(ctx); 921 - 922 - return -ENOMEM; 923 889 } 924 890 925 891 static void ar_context_run(struct ar_context *ctx) ··· 2741 2717 2742 2718 static void flush_iso_completions(struct iso_context *ctx, enum fw_iso_context_completions_cause cause) 2743 2719 { 2744 - trace_isoc_inbound_single_completions(&ctx->base, ctx->last_timestamp, cause, ctx->header, 2745 - ctx->header_length); 2746 - trace_isoc_outbound_completions(&ctx->base, ctx->last_timestamp, cause, ctx->header, 2747 - ctx->header_length); 2720 + trace_isoc_inbound_single_completions(&ctx->base, ctx->sc.last_timestamp, cause, 2721 + ctx->sc.header, ctx->sc.header_length); 2722 + trace_isoc_outbound_completions(&ctx->base, ctx->sc.last_timestamp, cause, ctx->sc.header, 2723 + ctx->sc.header_length); 2748 2724 2749 - ctx->base.callback.sc(&ctx->base, ctx->last_timestamp, 2750 - ctx->header_length, ctx->header, 2751 - ctx->base.callback_data); 2752 - ctx->header_length = 0; 2725 + ctx->base.callback.sc(&ctx->base, ctx->sc.last_timestamp, ctx->sc.header_length, 2726 + ctx->sc.header, ctx->base.callback_data); 2727 + ctx->sc.header_length = 0; 2753 2728 } 2754 2729 2755 2730 static void copy_iso_headers(struct iso_context *ctx, const u32 *dma_hdr) 2756 2731 { 2757 2732 u32 *ctx_hdr; 2758 2733 2759 - if (ctx->header_length + ctx->base.header_size > PAGE_SIZE) { 2760 - if (ctx->base.drop_overflow_headers) 2734 + if (ctx->sc.header_length + ctx->base.header_size > ctx->base.header_storage_size) { 2735 + if (ctx->base.flags & FW_ISO_CONTEXT_FLAG_DROP_OVERFLOW_HEADERS) 2761 2736 return; 2762 2737 flush_iso_completions(ctx, FW_ISO_CONTEXT_COMPLETIONS_CAUSE_HEADER_OVERFLOW); 2763 2738 } 2764 2739 2765 - ctx_hdr = ctx->header + ctx->header_length; 2766 - ctx->last_timestamp = (u16)le32_to_cpu((__force __le32)dma_hdr[0]); 2740 + ctx_hdr = ctx->sc.header + ctx->sc.header_length; 2741 + ctx->sc.last_timestamp = (u16)le32_to_cpu((__force __le32)dma_hdr[0]); 2767 2742 2768 2743 /* 2769 2744 * The two iso header quadlets are byteswapped to little ··· 2775 2752 ctx_hdr[1] = swab32(dma_hdr[0]); /* timestamp */ 2776 2753 if (ctx->base.header_size > 8) 2777 2754 memcpy(&ctx_hdr[2], &dma_hdr[2], ctx->base.header_size - 8); 2778 - ctx->header_length += ctx->base.header_size; 2755 + ctx->sc.header_length += ctx->base.header_size; 2779 2756 } 2780 2757 2781 2758 static int handle_ir_packet_per_buffer(struct context *context, ··· 2828 2805 buffer_dma = le32_to_cpu(last->data_address); 2829 2806 2830 2807 if (completed > 0) { 2831 - ctx->mc_buffer_bus = buffer_dma; 2832 - ctx->mc_completed = completed; 2808 + ctx->mc.buffer_bus = buffer_dma; 2809 + ctx->mc.completed = completed; 2833 2810 } 2834 2811 2835 2812 if (res_count != 0) ··· 2848 2825 ctx->base.callback.mc(&ctx->base, 2849 2826 buffer_dma + completed, 2850 2827 ctx->base.callback_data); 2851 - ctx->mc_completed = 0; 2828 + ctx->mc.completed = 0; 2852 2829 } 2853 2830 2854 2831 return 1; ··· 2857 2834 static void flush_ir_buffer_fill(struct iso_context *ctx) 2858 2835 { 2859 2836 dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, 2860 - ctx->mc_buffer_bus & PAGE_MASK, 2861 - ctx->mc_buffer_bus & ~PAGE_MASK, 2862 - ctx->mc_completed, DMA_FROM_DEVICE); 2837 + ctx->mc.buffer_bus & PAGE_MASK, 2838 + ctx->mc.buffer_bus & ~PAGE_MASK, 2839 + ctx->mc.completed, DMA_FROM_DEVICE); 2863 2840 2864 - trace_isoc_inbound_multiple_completions(&ctx->base, ctx->mc_completed, 2841 + trace_isoc_inbound_multiple_completions(&ctx->base, ctx->mc.completed, 2865 2842 FW_ISO_CONTEXT_COMPLETIONS_CAUSE_FLUSH); 2866 2843 2867 - ctx->base.callback.mc(&ctx->base, 2868 - ctx->mc_buffer_bus + ctx->mc_completed, 2844 + ctx->base.callback.mc(&ctx->base, ctx->mc.buffer_bus + ctx->mc.completed, 2869 2845 ctx->base.callback_data); 2870 - ctx->mc_completed = 0; 2846 + ctx->mc.completed = 0; 2871 2847 } 2872 2848 2873 2849 static inline void sync_it_packet_for_cpu(struct context *context, ··· 2924 2902 2925 2903 sync_it_packet_for_cpu(context, d); 2926 2904 2927 - if (ctx->header_length + 4 > PAGE_SIZE) { 2928 - if (ctx->base.drop_overflow_headers) 2905 + if (ctx->sc.header_length + 4 > ctx->base.header_storage_size) { 2906 + if (ctx->base.flags & FW_ISO_CONTEXT_FLAG_DROP_OVERFLOW_HEADERS) 2929 2907 return 1; 2930 2908 flush_iso_completions(ctx, FW_ISO_CONTEXT_COMPLETIONS_CAUSE_HEADER_OVERFLOW); 2931 2909 } 2932 2910 2933 - ctx_hdr = ctx->header + ctx->header_length; 2934 - ctx->last_timestamp = le16_to_cpu(last->res_count); 2911 + ctx_hdr = ctx->sc.header + ctx->sc.header_length; 2912 + ctx->sc.last_timestamp = le16_to_cpu(last->res_count); 2935 2913 /* Present this value as big-endian to match the receive code */ 2936 2914 *ctx_hdr = cpu_to_be32((le16_to_cpu(pd->transfer_status) << 16) | 2937 2915 le16_to_cpu(pd->res_count)); 2938 - ctx->header_length += 4; 2916 + ctx->sc.header_length += 4; 2939 2917 2940 2918 if (last->control & cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS)) 2941 2919 flush_iso_completions(ctx, FW_ISO_CONTEXT_COMPLETIONS_CAUSE_INTERRUPT); ··· 2954 2932 ohci->mc_channels = channels; 2955 2933 } 2956 2934 2957 - static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card, 2958 - int type, int channel, size_t header_size) 2935 + static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card, int type, int channel, 2936 + size_t header_size, size_t header_storage_size) 2959 2937 { 2960 2938 struct fw_ohci *ohci = fw_ohci(card); 2939 + void *header __free(kvfree) = NULL; 2961 2940 struct iso_context *ctx; 2962 2941 descriptor_callback_t callback; 2963 2942 u64 *channels; ··· 3013 2990 } 3014 2991 3015 2992 memset(ctx, 0, sizeof(*ctx)); 3016 - ctx->header_length = 0; 3017 - ctx->header = (void *) __get_free_page(GFP_KERNEL); 3018 - if (ctx->header == NULL) { 3019 - ret = -ENOMEM; 3020 - goto out; 2993 + 2994 + if (type != FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) { 2995 + ctx->sc.header_length = 0; 2996 + header = kvmalloc(header_storage_size, GFP_KERNEL); 2997 + if (!header) { 2998 + ret = -ENOMEM; 2999 + goto out; 3000 + } 3021 3001 } 3002 + 3022 3003 ret = context_init(&ctx->context, ohci, regs, callback); 3023 3004 if (ret < 0) 3024 - goto out_with_header; 3005 + goto out; 3025 3006 fw_iso_context_init_work(&ctx->base, ohci_isoc_context_work); 3026 3007 3027 - if (type == FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) { 3008 + if (type != FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) { 3009 + ctx->sc.header = no_free_ptr(header); 3010 + } else { 3028 3011 set_multichannel_mask(ohci, 0); 3029 - ctx->mc_completed = 0; 3012 + ctx->mc.completed = 0; 3030 3013 } 3031 3014 3032 3015 return &ctx->base; 3033 - 3034 - out_with_header: 3035 - free_page((unsigned long)ctx->header); 3036 3016 out: 3037 3017 scoped_guard(spinlock_irq, &ohci->lock) { 3038 3018 switch (type) { ··· 3135 3109 3136 3110 ohci_stop_iso(base); 3137 3111 context_release(&ctx->context); 3138 - free_page((unsigned long)ctx->header); 3112 + 3113 + if (base->type != FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) { 3114 + kvfree(ctx->sc.header); 3115 + ctx->sc.header = NULL; 3116 + } 3139 3117 3140 3118 guard(spinlock_irqsave)(&ohci->lock); 3141 3119 ··· 3214 3184 struct descriptor *d, *last, *pd; 3215 3185 struct fw_iso_packet *p; 3216 3186 __le32 *header; 3217 - dma_addr_t d_bus, page_bus; 3187 + dma_addr_t d_bus; 3218 3188 u32 z, header_z, payload_z, irq; 3219 3189 u32 payload_index, payload_end_index, next_page_index; 3220 3190 int page, end_page, i, length, offset; ··· 3284 3254 min(next_page_index, payload_end_index) - payload_index; 3285 3255 pd[i].req_count = cpu_to_le16(length); 3286 3256 3287 - page_bus = page_private(buffer->pages[page]); 3288 - pd[i].data_address = cpu_to_le32(page_bus + offset); 3257 + dma_addr_t dma_addr = buffer->dma_addrs[page]; 3258 + pd[i].data_address = cpu_to_le32(dma_addr + offset); 3289 3259 3290 3260 dma_sync_single_range_for_device(ctx->context.ohci->card.device, 3291 - page_bus, offset, length, 3261 + dma_addr, offset, length, 3292 3262 DMA_TO_DEVICE); 3293 3263 3294 3264 payload_index += length; ··· 3317 3287 { 3318 3288 struct device *device = ctx->context.ohci->card.device; 3319 3289 struct descriptor *d, *pd; 3320 - dma_addr_t d_bus, page_bus; 3290 + dma_addr_t d_bus; 3321 3291 u32 z, header_z, rest; 3322 3292 int i, j, length; 3323 3293 int page, offset, packet_count, header_size, payload_per_buffer; ··· 3367 3337 pd->res_count = pd->req_count; 3368 3338 pd->transfer_status = 0; 3369 3339 3370 - page_bus = page_private(buffer->pages[page]); 3371 - pd->data_address = cpu_to_le32(page_bus + offset); 3340 + dma_addr_t dma_addr = buffer->dma_addrs[page]; 3341 + pd->data_address = cpu_to_le32(dma_addr + offset); 3372 3342 3373 - dma_sync_single_range_for_device(device, page_bus, 3343 + dma_sync_single_range_for_device(device, dma_addr, 3374 3344 offset, length, 3375 3345 DMA_FROM_DEVICE); 3376 3346 ··· 3397 3367 unsigned long payload) 3398 3368 { 3399 3369 struct descriptor *d; 3400 - dma_addr_t d_bus, page_bus; 3370 + dma_addr_t d_bus; 3401 3371 int page, offset, rest, z, i, length; 3402 3372 3403 3373 page = payload >> PAGE_SHIFT; ··· 3430 3400 d->res_count = d->req_count; 3431 3401 d->transfer_status = 0; 3432 3402 3433 - page_bus = page_private(buffer->pages[page]); 3434 - d->data_address = cpu_to_le32(page_bus + offset); 3403 + dma_addr_t dma_addr = buffer->dma_addrs[page]; 3404 + d->data_address = cpu_to_le32(dma_addr + offset); 3435 3405 3436 3406 dma_sync_single_range_for_device(ctx->context.ohci->card.device, 3437 - page_bus, offset, length, 3407 + dma_addr, offset, length, 3438 3408 DMA_FROM_DEVICE); 3439 3409 3440 3410 rest -= length; ··· 3487 3457 switch (base->type) { 3488 3458 case FW_ISO_CONTEXT_TRANSMIT: 3489 3459 case FW_ISO_CONTEXT_RECEIVE: 3490 - if (ctx->header_length != 0) 3460 + if (ctx->sc.header_length != 0) 3491 3461 flush_iso_completions(ctx, FW_ISO_CONTEXT_COMPLETIONS_CAUSE_FLUSH); 3492 3462 break; 3493 3463 case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: 3494 - if (ctx->mc_completed != 0) 3464 + if (ctx->mc.completed != 0) 3495 3465 flush_ir_buffer_fill(ctx); 3496 3466 break; 3497 3467 default:
+30 -6
include/linux/firewire.h
··· 526 526 struct fw_iso_buffer { 527 527 enum dma_data_direction direction; 528 528 struct page **pages; 529 + dma_addr_t *dma_addrs; 529 530 int page_count; 530 - int page_count_mapped; 531 531 }; 532 532 533 533 int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card, 534 534 int page_count, enum dma_data_direction direction); 535 535 void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer, struct fw_card *card); 536 - size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed); 537 536 538 537 struct fw_iso_context; 539 538 typedef void (*fw_iso_callback_t)(struct fw_iso_context *context, ··· 546 547 fw_iso_mc_callback_t mc; 547 548 }; 548 549 550 + enum fw_iso_context_flag { 551 + FW_ISO_CONTEXT_FLAG_DROP_OVERFLOW_HEADERS = BIT(0), 552 + }; 553 + 549 554 struct fw_iso_context { 550 555 struct fw_card *card; 551 556 struct work_struct work; 552 557 int type; 553 558 int channel; 554 559 int speed; 555 - bool drop_overflow_headers; 560 + int flags; 556 561 size_t header_size; 562 + size_t header_storage_size; 557 563 union fw_iso_callback callback; 558 564 void *callback_data; 559 565 }; 560 566 561 - struct fw_iso_context *fw_iso_context_create(struct fw_card *card, 562 - int type, int channel, int speed, size_t header_size, 563 - fw_iso_callback_t callback, void *callback_data); 567 + struct fw_iso_context *__fw_iso_context_create(struct fw_card *card, int type, int channel, 568 + int speed, size_t header_size, size_t header_storage_size, 569 + union fw_iso_callback callback, void *callback_data); 564 570 int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels); 565 571 int fw_iso_context_queue(struct fw_iso_context *ctx, 566 572 struct fw_iso_packet *packet, ··· 573 569 unsigned long payload); 574 570 void fw_iso_context_queue_flush(struct fw_iso_context *ctx); 575 571 int fw_iso_context_flush_completions(struct fw_iso_context *ctx); 572 + 573 + static inline struct fw_iso_context *fw_iso_context_create(struct fw_card *card, int type, 574 + int channel, int speed, size_t header_size, fw_iso_callback_t callback, 575 + void *callback_data) 576 + { 577 + union fw_iso_callback cb = { .sc = callback }; 578 + 579 + return __fw_iso_context_create(card, type, channel, speed, header_size, PAGE_SIZE, cb, 580 + callback_data); 581 + } 582 + 583 + static inline struct fw_iso_context *fw_iso_context_create_with_header_storage_size( 584 + struct fw_card *card, int type, int channel, int speed, size_t header_size, 585 + size_t header_storage_size, fw_iso_callback_t callback, void *callback_data) 586 + { 587 + union fw_iso_callback cb = { .sc = callback }; 588 + 589 + return __fw_iso_context_create(card, type, channel, speed, header_size, header_storage_size, 590 + cb, callback_data); 591 + } 576 592 577 593 /** 578 594 * fw_iso_context_schedule_flush_completions() - schedule work item to process isochronous context.
+9 -22
sound/firewire/amdtp-stream.c
··· 191 191 struct snd_pcm_runtime *runtime) 192 192 { 193 193 struct snd_pcm_hardware *hw = &runtime->hw; 194 - unsigned int ctx_header_size; 195 - unsigned int maximum_usec_per_period; 196 194 int err; 197 195 198 196 hw->info = SNDRV_PCM_INFO_BLOCK_TRANSFER | ··· 210 212 hw->period_bytes_max = hw->period_bytes_min * 2048; 211 213 hw->buffer_bytes_max = hw->period_bytes_max * hw->periods_min; 212 214 213 - // Linux driver for 1394 OHCI controller voluntarily flushes isoc 214 - // context when total size of accumulated context header reaches 215 - // PAGE_SIZE. This kicks work for the isoc context and brings 216 - // callback in the middle of scheduled interrupts. 217 - // Although AMDTP streams in the same domain use the same events per 218 - // IRQ, use the largest size of context header between IT/IR contexts. 219 - // Here, use the value of context header in IR context is for both 220 - // contexts. 221 - if (!(s->flags & CIP_NO_HEADER)) 222 - ctx_header_size = IR_CTX_HEADER_SIZE_CIP; 223 - else 224 - ctx_header_size = IR_CTX_HEADER_SIZE_NO_CIP; 225 - maximum_usec_per_period = USEC_PER_SEC * PAGE_SIZE / 226 - CYCLES_PER_SECOND / ctx_header_size; 227 - 228 215 // In IEC 61883-6, one isoc packet can transfer events up to the value 229 216 // of syt interval. This comes from the interval of isoc cycle. As 1394 230 217 // OHCI controller can generate hardware IRQ per isoc packet, the ··· 222 239 // Due to the above protocol design, the minimum PCM frames per 223 240 // interrupt should be double of the value of syt interval, thus it is 224 241 // 250 usec. 242 + // There is no reason, but up to 250 msec to avoid consuming resources so much. 225 243 err = snd_pcm_hw_constraint_minmax(runtime, 226 244 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 227 - 250, maximum_usec_per_period); 245 + 250, USEC_PER_SEC / 4); 228 246 if (err < 0) 229 247 goto end; 230 248 ··· 245 261 SNDRV_PCM_HW_PARAM_RATE, -1); 246 262 if (err < 0) 247 263 goto end; 264 + 248 265 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 249 266 apply_constraint_to_size, NULL, 250 267 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, ··· 1700 1715 } else { 1701 1716 dir = DMA_TO_DEVICE; 1702 1717 type = FW_ISO_CONTEXT_TRANSMIT; 1703 - ctx_header_size = 0; // No effect for IT context. 1718 + // Although no effect for IT context, this value is required to compute the size 1719 + // of header storage correctly. 1720 + ctx_header_size = sizeof(__be32); 1704 1721 } 1705 1722 max_ctx_payload_size = amdtp_stream_get_max_ctx_payload_size(s); 1706 1723 ··· 1711 1724 return err; 1712 1725 s->queue_size = queue_size; 1713 1726 1714 - s->context = fw_iso_context_create(fw_parent_device(s->unit)->card, 1715 - type, channel, speed, ctx_header_size, 1716 - amdtp_stream_first_callback, s); 1727 + s->context = fw_iso_context_create_with_header_storage_size( 1728 + fw_parent_device(s->unit)->card, type, channel, speed, ctx_header_size, 1729 + ctx_header_size * queue_size, amdtp_stream_first_callback, s); 1717 1730 if (IS_ERR(s->context)) { 1718 1731 err = PTR_ERR(s->context); 1719 1732 if (err == -EBUSY)