Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
Pull power supply and reset updates from Sebastian Reichel:
- Add new Qualcomm PMI8998/PM660 SMB2 charger
- bq256xx: support systems without thermistors
- cros_pchg: fix peripheral device status after system resume
- axp20x_usb_power: add support for AXP192
- qcom-pon: add support for pm8941
- at91-reset: prepare to expose reset reason to sysfs
- switch all I2C drivers back to use .probe instead of .probe_new
- convert some more DT bindings to YAML
- misc cleanups
* tag 'for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (28 commits)
MAINTAINERS: add documentation file for Microchip SAMA5D2 shutdown controller
dt-bindings: power: reset: atmel,sama5d2-shdwc: convert to yaml
dt-bindings: power: reset: atmel,at91sam9260-shdwc: convert to yaml
power: reset: at91-reset: change the power on reason prototype
power: reset: qcom-pon: add support for pm8941-pon
dt-bindings: power: reset: qcom-pon: define pm8941-pon
power: supply: add Qualcomm PMI8998 SMB2 Charger driver
dt-bindings: power: supply: qcom,pmi8998-charger: add bindings for smb2 driver
power: supply: rt9467: Make charger-enable control as logic level
power: supply: Switch i2c drivers back to use .probe()
power: reset: add HAS_IOPORT dependencies
dt-bindings: power: supply: axp20x: Add AXP192 compatible
power: supply: axp20x_usb_power: Add support for AXP192
power: supply: axp20x_usb_power: Remove variant IDs from VBUS polling check
power: supply: axp20x_usb_power: Use regmap field for VBUS disabling
power: supply: axp20x_usb_power: Use regmap fields for USB BC feature
power: supply: axp20x_usb_power: Use regmap fields for VBUS monitor feature
power: supply: axp20x_usb_power: Simplify USB current limit handling
power: supply: hwmon: constify pointers to hwmon_channel_info
power: supply: twl4030_madc_battery: Refactor twl4030_madc_bat_ext_changed()
...
+1699
-343
-94
Documentation/devicetree/bindings/arm/atmel-sysregs.txt
-94
Documentation/devicetree/bindings/arm/atmel-sysregs.txt
···
52
52
reg = <0xe3804000 0x1000>;
53
53
};
54
54
55
-
SHDWC Shutdown Controller
56
-
57
-
required properties:
58
-
- compatible: Should be "atmel,<chip>-shdwc".
59
-
<chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
60
-
- reg: Should contain registers location and length
61
-
- clocks: phandle to input clock.
62
-
63
-
optional properties:
64
-
- atmel,wakeup-mode: String, operation mode of the wakeup mode.
65
-
Supported values are: "none", "high", "low", "any".
66
-
- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
67
-
68
-
optional at91sam9260 properties:
69
-
- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
70
-
71
-
optional at91sam9rl properties:
72
-
- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
73
-
- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
74
-
75
-
optional at91sam9x5 properties:
76
-
- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
77
-
78
-
Example:
79
-
80
-
shdwc@fffffd10 {
81
-
compatible = "atmel,at91sam9260-shdwc";
82
-
reg = <0xfffffd10 0x10>;
83
-
clocks = <&clk32k>;
84
-
};
85
-
86
-
SHDWC SAMA5D2-Compatible Shutdown Controller
87
-
88
-
1) shdwc node
89
-
90
-
required properties:
91
-
- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
92
-
"microchip,sama7g5-shdwc"
93
-
- reg: should contain registers location and length
94
-
- clocks: phandle to input clock.
95
-
- #address-cells: should be one. The cell is the wake-up input index.
96
-
- #size-cells: should be zero.
97
-
98
-
optional properties:
99
-
100
-
- debounce-delay-us: minimum wake-up inputs debouncer period in
101
-
microseconds. It's usually a board-related property.
102
-
- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
103
-
104
-
optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
105
-
- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
106
-
107
-
The node contains child nodes for each wake-up input that the platform uses.
108
-
109
-
2) input nodes
110
-
111
-
Wake-up input nodes are usually described in the "board" part of the Device
112
-
Tree. Note also that input 0 is linked to the wake-up pin and is frequently
113
-
used.
114
-
115
-
Required properties:
116
-
- reg: should contain the wake-up input index [0 - 15].
117
-
118
-
Optional properties:
119
-
- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
120
-
by the child, forces the wake-up of the core power supply on a high level.
121
-
The default is to be active low.
122
-
123
-
Example:
124
-
125
-
On the SoC side:
126
-
shdwc@f8048010 {
127
-
compatible = "atmel,sama5d2-shdwc";
128
-
reg = <0xf8048010 0x10>;
129
-
clocks = <&clk32k>;
130
-
#address-cells = <1>;
131
-
#size-cells = <0>;
132
-
atmel,wakeup-rtc-timer;
133
-
};
134
-
135
-
On the board side:
136
-
shdwc@f8048010 {
137
-
debounce-delay-us = <976>;
138
-
139
-
input@0 {
140
-
reg = <0>;
141
-
};
142
-
143
-
input@1 {
144
-
reg = <1>;
145
-
atmel,wakeup-active-high;
146
-
};
147
-
};
148
-
149
55
Special Function Registers (SFR)
150
56
151
57
Special Function Registers (SFR) manage specific aspects of the integrated
+1
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+1
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+82
Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
+82
Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Microchip AT91 SHDWC Shutdown Controller
8
+
9
+
maintainers:
10
+
- Claudiu Beznea <claudiu.beznea@microchip.com>
11
+
12
+
description: |
13
+
Microchip AT91 SHDWC shutdown controller controls the power supplies VDDIO
14
+
and VDDCORE and the wake-up detection on debounced input lines.
15
+
16
+
properties:
17
+
compatible:
18
+
enum:
19
+
- atmel,at91sam9260-shdwc
20
+
- atmel,at91sam9rl-shdwc
21
+
- atmel,at91sam9x5-shdwc
22
+
23
+
reg:
24
+
maxItems: 1
25
+
26
+
clocks:
27
+
maxItems: 1
28
+
29
+
atmel,wakeup-mode:
30
+
description: operation mode of the wakeup mode
31
+
$ref: /schemas/types.yaml#/definitions/string
32
+
enum: [ none, high, low, any ]
33
+
34
+
atmel,wakeup-counter:
35
+
description: counter on wake-up 0
36
+
$ref: /schemas/types.yaml#/definitions/uint32
37
+
minimum: 0
38
+
maximum: 15
39
+
40
+
atmel,wakeup-rtt-timer:
41
+
description: enable real-time timer wake-up
42
+
type: boolean
43
+
44
+
atmel,wakeup-rtc-timer:
45
+
description: enable real-time clock wake-up
46
+
type: boolean
47
+
48
+
required:
49
+
- compatible
50
+
- reg
51
+
- clocks
52
+
53
+
allOf:
54
+
- if:
55
+
properties:
56
+
compatible:
57
+
contains:
58
+
const: atmel,at91sam9x5-shdwc
59
+
then:
60
+
properties:
61
+
atmel,wakeup-rtt-timer: false
62
+
63
+
- if:
64
+
properties:
65
+
compatible:
66
+
contains:
67
+
const: atmel,at91sam9260-shdwc
68
+
then:
69
+
properties:
70
+
atmel,wakeup-rtc-timer: false
71
+
72
+
additionalProperties: false
73
+
74
+
examples:
75
+
- |
76
+
shdwc: poweroff@fffffd10 {
77
+
compatible = "atmel,at91sam9260-shdwc";
78
+
reg = <0xfffffd10 0x10>;
79
+
clocks = <&clk32k>;
80
+
};
81
+
82
+
...
+114
Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
+114
Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Microchip AT91 SAMA5D2 SHDWC Shutdown Controller
8
+
9
+
maintainers:
10
+
- Claudiu Beznea <claudiu.beznea@microchip.com>
11
+
12
+
description: |
13
+
Microchip AT91 SHDWC shutdown controller controls the power supplies VDDIO
14
+
and VDDCORE and the wake-up detection on debounced input lines.
15
+
16
+
properties:
17
+
compatible:
18
+
oneOf:
19
+
- items:
20
+
- const: microchip,sama7g5-shdwc
21
+
- const: syscon
22
+
- enum:
23
+
- atmel,sama5d2-shdwc
24
+
- microchip,sam9x60-shdwc
25
+
26
+
reg:
27
+
maxItems: 1
28
+
29
+
clocks:
30
+
maxItems: 1
31
+
32
+
"#address-cells":
33
+
const: 1
34
+
35
+
"#size-cells":
36
+
const: 0
37
+
38
+
debounce-delay-us:
39
+
description:
40
+
Minimum wake-up inputs debouncer period in microseconds. It is usually a
41
+
board-related property.
42
+
43
+
atmel,wakeup-rtc-timer:
44
+
description: enable real-time clock wake-up
45
+
type: boolean
46
+
47
+
atmel,wakeup-rtt-timer:
48
+
description: enable real-time timer wake-up
49
+
type: boolean
50
+
51
+
patternProperties:
52
+
"^input@[0-15]$":
53
+
description:
54
+
Wake-up input nodes. These are usually described in the "board" part of
55
+
the Device Tree. Note also that input 0 is linked to the wake-up pin and
56
+
is frequently used.
57
+
type: object
58
+
properties:
59
+
reg:
60
+
description: contains the wake-up input index
61
+
minimum: 0
62
+
maximum: 15
63
+
64
+
atmel,wakeup-active-high:
65
+
description:
66
+
The corresponding wake-up input described by the child forces the
67
+
wake-up of the core power supply on a high level. The default is to
68
+
be active low.
69
+
type: boolean
70
+
71
+
required:
72
+
- reg
73
+
74
+
additionalProperties: false
75
+
76
+
required:
77
+
- compatible
78
+
- reg
79
+
- clocks
80
+
81
+
allOf:
82
+
- if:
83
+
properties:
84
+
compatible:
85
+
contains:
86
+
const: atmel,sama5d2-shdwc
87
+
then:
88
+
properties:
89
+
atmel,wakeup-rtt-timer: false
90
+
91
+
additionalProperties: false
92
+
93
+
examples:
94
+
- |
95
+
shdwc: poweroff@f8048010 {
96
+
compatible = "atmel,sama5d2-shdwc";
97
+
reg = <0xf8048010 0x10>;
98
+
clocks = <&clk32k>;
99
+
#address-cells = <1>;
100
+
#size-cells = <0>;
101
+
atmel,wakeup-rtc-timer;
102
+
debounce-delay-us = <976>;
103
+
104
+
input@0 {
105
+
reg = <0>;
106
+
};
107
+
108
+
input@1 {
109
+
reg = <1>;
110
+
atmel,wakeup-active-high;
111
+
};
112
+
};
113
+
114
+
...
-26
Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.txt
-26
Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.txt
···
1
-
NVMEM reboot mode driver
2
-
3
-
This driver gets reboot mode magic value from reboot-mode driver
4
-
and stores it in a NVMEM cell named "reboot-mode". Then the bootloader
5
-
can read it and take different action according to the magic
6
-
value stored.
7
-
8
-
Required properties:
9
-
- compatible: should be "nvmem-reboot-mode".
10
-
- nvmem-cells: A phandle to the reboot mode provided by a nvmem device.
11
-
- nvmem-cell-names: Should be "reboot-mode".
12
-
13
-
The rest of the properties should follow the generic reboot-mode description
14
-
found in reboot-mode.txt
15
-
16
-
Example:
17
-
reboot-mode {
18
-
compatible = "nvmem-reboot-mode";
19
-
nvmem-cells = <&reboot_mode>;
20
-
nvmem-cell-names = "reboot-mode";
21
-
22
-
mode-normal = <0xAAAA5501>;
23
-
mode-bootloader = <0xBBBB5500>;
24
-
mode-recovery = <0xCCCC5502>;
25
-
mode-test = <0xDDDD5503>;
26
-
};
+52
Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.yaml
+52
Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/power/reset/nvmem-reboot-mode.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Generic NVMEM reboot mode
8
+
9
+
maintainers:
10
+
- Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
11
+
12
+
description:
13
+
This driver gets the reboot mode magic value from the reboot-mode driver
14
+
and stores it in the NVMEM cell named "reboot-mode". The bootloader can
15
+
then read it and take different action according to the value.
16
+
17
+
properties:
18
+
compatible:
19
+
const: nvmem-reboot-mode
20
+
21
+
nvmem-cells:
22
+
description:
23
+
A phandle pointing to the nvmem-cells node where the vendor-specific
24
+
magic value representing the reboot mode is stored.
25
+
maxItems: 1
26
+
27
+
nvmem-cell-names:
28
+
items:
29
+
- const: reboot-mode
30
+
31
+
patternProperties:
32
+
"^mode-.+":
33
+
$ref: /schemas/types.yaml#/definitions/uint32
34
+
description: Vendor-specific mode value written to the mode register
35
+
36
+
required:
37
+
- compatible
38
+
- nvmem-cells
39
+
- nvmem-cell-names
40
+
41
+
additionalProperties: false
42
+
43
+
examples:
44
+
- |
45
+
reboot-mode {
46
+
compatible = "nvmem-reboot-mode";
47
+
nvmem-cells = <&reboot_reason>;
48
+
nvmem-cell-names = "reboot-mode";
49
+
mode-recovery = <0x01>;
50
+
mode-bootloader = <0x02>;
51
+
};
52
+
...
+19
-1
Documentation/devicetree/bindings/power/reset/qcom,pon.yaml
+19
-1
Documentation/devicetree/bindings/power/reset/qcom,pon.yaml
···
19
19
compatible:
20
20
enum:
21
21
- qcom,pm8916-pon
22
+
- qcom,pm8941-pon
22
23
- qcom,pms405-pon
23
24
- qcom,pm8998-pon
24
25
- qcom,pmk8350-pon
···
57
56
unevaluatedProperties: false
58
57
59
58
allOf:
60
-
- $ref: reboot-mode.yaml#
61
59
- if:
62
60
properties:
63
61
compatible:
···
66
66
- qcom,pms405-pon
67
67
- qcom,pm8998-pon
68
68
then:
69
+
allOf:
70
+
- $ref: reboot-mode.yaml#
71
+
69
72
properties:
70
73
reg:
71
74
maxItems: 1
72
75
reg-names:
73
76
items:
74
77
- const: pon
78
+
79
+
# Special case for pm8941, which doesn't store reset mode
80
+
- if:
81
+
properties:
82
+
compatible:
83
+
contains:
84
+
const: qcom,pm8941-pon
85
+
then:
86
+
properties:
87
+
reg:
88
+
maxItems: 1
89
+
reg-names:
90
+
items:
91
+
- const: pon
92
+
75
93
- if:
76
94
properties:
77
95
compatible:
+18
Documentation/devicetree/bindings/power/supply/bq256xx.yaml
+18
Documentation/devicetree/bindings/power/supply/bq256xx.yaml
···
68
68
Interrupt sends an active low, 256 μs pulse to host to report the charger
69
69
device status and faults.
70
70
71
+
ti,no-thermistor:
72
+
type: boolean
73
+
description: Indicates that no thermistor is connected to the TS pin
74
+
71
75
required:
72
76
- compatible
73
77
- reg
74
78
- monitored-battery
79
+
80
+
allOf:
81
+
- if:
82
+
properties:
83
+
compatible:
84
+
contains:
85
+
enum:
86
+
- ti,bq25600
87
+
- ti,bq25601
88
+
- ti,bq25600d
89
+
- ti,bq25601d
90
+
then:
91
+
properties:
92
+
ti,no-thermistor: false
75
93
76
94
additionalProperties: false
77
95
+82
Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
+82
Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/power/supply/qcom,pmi8998-charger.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Qualcomm PMI8998/PM660 Switch-Mode Battery Charger "2"
8
+
9
+
maintainers:
10
+
- Caleb Connolly <caleb.connolly@linaro.org>
11
+
12
+
properties:
13
+
compatible:
14
+
enum:
15
+
- qcom,pmi8998-charger
16
+
- qcom,pm660-charger
17
+
18
+
reg:
19
+
maxItems: 1
20
+
21
+
interrupts:
22
+
maxItems: 4
23
+
24
+
interrupt-names:
25
+
items:
26
+
- const: usb-plugin
27
+
- const: bat-ov
28
+
- const: wdog-bark
29
+
- const: usbin-icl-change
30
+
31
+
io-channels:
32
+
items:
33
+
- description: USB in current in uA
34
+
- description: USB in voltage in uV
35
+
36
+
io-channel-names:
37
+
items:
38
+
- const: usbin_i
39
+
- const: usbin_v
40
+
41
+
monitored-battery:
42
+
description: phandle to the simple-battery node
43
+
$ref: /schemas/types.yaml#/definitions/phandle
44
+
45
+
required:
46
+
- compatible
47
+
- reg
48
+
- interrupts
49
+
- interrupt-names
50
+
- io-channels
51
+
- io-channel-names
52
+
- monitored-battery
53
+
54
+
additionalProperties: false
55
+
56
+
examples:
57
+
- |
58
+
#include <dt-bindings/interrupt-controller/irq.h>
59
+
60
+
pmic {
61
+
#address-cells = <1>;
62
+
#size-cells = <0>;
63
+
#interrupt-cells = <4>;
64
+
65
+
charger@1000 {
66
+
compatible = "qcom,pmi8998-charger";
67
+
reg = <0x1000>;
68
+
69
+
interrupts = <0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
70
+
<0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>,
71
+
<0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>,
72
+
<0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>;
73
+
interrupt-names = "usb-plugin", "bat-ov", "wdog-bark", "usbin-icl-change";
74
+
75
+
io-channels = <&pmi8998_rradc 3>,
76
+
<&pmi8998_rradc 4>;
77
+
io-channel-names = "usbin_i",
78
+
"usbin_v";
79
+
80
+
monitored-battery = <&battery>;
81
+
};
82
+
};
+1
Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml
+1
Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml
+1
MAINTAINERS
+1
MAINTAINERS
···
14019
14019
MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
14020
14020
M: Claudiu Beznea <claudiu.beznea@microchip.com>
14021
14021
S: Supported
14022
+
F: Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
14022
14023
F: drivers/power/reset/at91-sama5d2_shdwc.c
14023
14024
14024
14025
MICROCHIP SOC DRIVERS
+1
drivers/power/reset/Kconfig
+1
drivers/power/reset/Kconfig
+4
-5
drivers/power/reset/at91-reset.c
+4
-5
drivers/power/reset/at91-reset.c
···
149
149
return NOTIFY_DONE;
150
150
}
151
151
152
-
static void __init at91_reset_status(struct platform_device *pdev,
153
-
void __iomem *base)
152
+
static const char * __init at91_reset_reason(struct at91_reset *reset)
154
153
{
154
+
u32 reg = readl(reset->rstc_base + AT91_RSTC_SR);
155
155
const char *reason;
156
-
u32 reg = readl(base + AT91_RSTC_SR);
157
156
158
157
switch ((reg & AT91_RSTC_RSTTYP) >> 8) {
159
158
case RESET_TYPE_GENERAL:
···
184
185
break;
185
186
}
186
187
187
-
dev_info(&pdev->dev, "Starting after %s\n", reason);
188
+
return reason;
188
189
}
189
190
190
191
static const struct of_device_id at91_ramc_of_match[] = {
···
391
392
if (ret)
392
393
goto disable_clk;
393
394
394
-
at91_reset_status(pdev, reset->rstc_base);
395
+
dev_info(&pdev->dev, "Starting after %s\n", at91_reset_reason(reset));
395
396
396
397
return 0;
397
398
+2
-5
drivers/power/reset/gpio-restart.c
+2
-5
drivers/power/reset/gpio-restart.c
···
105
105
return 0;
106
106
}
107
107
108
-
static int gpio_restart_remove(struct platform_device *pdev)
108
+
static void gpio_restart_remove(struct platform_device *pdev)
109
109
{
110
110
struct gpio_restart *gpio_restart = platform_get_drvdata(pdev);
111
111
int ret;
···
115
115
dev_err(&pdev->dev,
116
116
"%s: cannot unregister restart handler, %d\n",
117
117
__func__, ret);
118
-
return -ENODEV;
119
118
}
120
-
121
-
return 0;
122
119
}
123
120
124
121
static const struct of_device_id of_gpio_restart_match[] = {
···
125
128
126
129
static struct platform_driver gpio_restart_driver = {
127
130
.probe = gpio_restart_probe,
128
-
.remove = gpio_restart_remove,
131
+
.remove_new = gpio_restart_remove,
129
132
.driver = {
130
133
.name = "restart-gpio",
131
134
.of_match_table = of_gpio_restart_match,
+15
-7
drivers/power/reset/qcom-pon.c
+15
-7
drivers/power/reset/qcom-pon.c
···
17
17
#define GEN1_REASON_SHIFT 2
18
18
#define GEN2_REASON_SHIFT 1
19
19
20
+
#define NO_REASON_SHIFT 0
21
+
20
22
struct pm8916_pon {
21
23
struct device *dev;
22
24
struct regmap *regmap;
···
47
45
static int pm8916_pon_probe(struct platform_device *pdev)
48
46
{
49
47
struct pm8916_pon *pon;
48
+
long reason_shift;
50
49
int error;
51
50
52
51
pon = devm_kzalloc(&pdev->dev, sizeof(*pon), GFP_KERNEL);
···
67
64
if (error)
68
65
return error;
69
66
70
-
pon->reboot_mode.dev = &pdev->dev;
71
-
pon->reason_shift = (long)of_device_get_match_data(&pdev->dev);
72
-
pon->reboot_mode.write = pm8916_reboot_mode_write;
73
-
error = devm_reboot_mode_register(&pdev->dev, &pon->reboot_mode);
74
-
if (error) {
75
-
dev_err(&pdev->dev, "can't register reboot mode\n");
76
-
return error;
67
+
reason_shift = (long)of_device_get_match_data(&pdev->dev);
68
+
69
+
if (reason_shift != NO_REASON_SHIFT) {
70
+
pon->reboot_mode.dev = &pdev->dev;
71
+
pon->reason_shift = reason_shift;
72
+
pon->reboot_mode.write = pm8916_reboot_mode_write;
73
+
error = devm_reboot_mode_register(&pdev->dev, &pon->reboot_mode);
74
+
if (error) {
75
+
dev_err(&pdev->dev, "can't register reboot mode\n");
76
+
return error;
77
+
}
77
78
}
78
79
79
80
platform_set_drvdata(pdev, pon);
···
87
80
88
81
static const struct of_device_id pm8916_pon_id_table[] = {
89
82
{ .compatible = "qcom,pm8916-pon", .data = (void *)GEN1_REASON_SHIFT },
83
+
{ .compatible = "qcom,pm8941-pon", .data = (void *)NO_REASON_SHIFT },
90
84
{ .compatible = "qcom,pms405-pon", .data = (void *)GEN1_REASON_SHIFT },
91
85
{ .compatible = "qcom,pm8998-pon", .data = (void *)GEN2_REASON_SHIFT },
92
86
{ .compatible = "qcom,pmk8350-pon", .data = (void *)GEN2_REASON_SHIFT },
+9
drivers/power/supply/Kconfig
+9
drivers/power/supply/Kconfig
···
942
942
device is off or suspended, the functionality of this driver is
943
943
limited to reporting capacity only.
944
944
945
+
config CHARGER_QCOM_SMB2
946
+
tristate "Qualcomm PMI8998 PMIC charger driver"
947
+
depends on MFD_SPMI_PMIC
948
+
depends on IIO
949
+
help
950
+
Say Y here to enable the Qualcomm PMIC Charger driver. This
951
+
adds support for the SMB2 switch mode battery charger found
952
+
in PMI8998 and related PMICs.
953
+
945
954
endif # POWER_SUPPLY
+1
drivers/power/supply/Makefile
+1
drivers/power/supply/Makefile
+1
-1
drivers/power/supply/adp5061.c
+1
-1
drivers/power/supply/adp5061.c
+152
-155
drivers/power/supply/axp20x_usb_power.c
+152
-155
drivers/power/supply/axp20x_usb_power.c
···
26
26
27
27
#define DRVNAME "axp20x-usb-power-supply"
28
28
29
+
#define AXP192_USB_OTG_STATUS 0x04
30
+
29
31
#define AXP20X_PWR_STATUS_VBUS_PRESENT BIT(5)
30
32
#define AXP20X_PWR_STATUS_VBUS_USED BIT(4)
31
33
32
34
#define AXP20X_USB_STATUS_VBUS_VALID BIT(2)
33
35
34
-
#define AXP20X_VBUS_PATH_SEL BIT(7)
35
-
#define AXP20X_VBUS_PATH_SEL_OFFSET 7
36
-
37
36
#define AXP20X_VBUS_VHOLD_uV(b) (4000000 + (((b) >> 3) & 7) * 100000)
38
37
#define AXP20X_VBUS_VHOLD_MASK GENMASK(5, 3)
39
38
#define AXP20X_VBUS_VHOLD_OFFSET 3
40
-
#define AXP20X_VBUS_CLIMIT_MASK 3
41
-
#define AXP20X_VBUS_CLIMIT_900mA 0
42
-
#define AXP20X_VBUS_CLIMIT_500mA 1
43
-
#define AXP20X_VBUS_CLIMIT_100mA 2
44
-
#define AXP20X_VBUS_CLIMIT_NONE 3
45
-
46
-
#define AXP813_VBUS_CLIMIT_900mA 0
47
-
#define AXP813_VBUS_CLIMIT_1500mA 1
48
-
#define AXP813_VBUS_CLIMIT_2000mA 2
49
-
#define AXP813_VBUS_CLIMIT_2500mA 3
50
39
51
40
#define AXP20X_ADC_EN1_VBUS_CURR BIT(2)
52
41
#define AXP20X_ADC_EN1_VBUS_VOLT BIT(3)
53
-
54
-
#define AXP20X_VBUS_MON_VBUS_VALID BIT(3)
55
-
56
-
#define AXP813_BC_EN BIT(0)
57
42
58
43
/*
59
44
* Note do not raise the debounce time, we must report Vusb high within
···
46
61
*/
47
62
#define DEBOUNCE_TIME msecs_to_jiffies(50)
48
63
64
+
struct axp_data {
65
+
const struct power_supply_desc *power_desc;
66
+
const char * const *irq_names;
67
+
unsigned int num_irq_names;
68
+
const int *curr_lim_table;
69
+
struct reg_field curr_lim_fld;
70
+
struct reg_field vbus_valid_bit;
71
+
struct reg_field vbus_mon_bit;
72
+
struct reg_field usb_bc_en_bit;
73
+
struct reg_field vbus_disable_bit;
74
+
bool vbus_needs_polling: 1;
75
+
};
76
+
49
77
struct axp20x_usb_power {
50
78
struct regmap *regmap;
79
+
struct regmap_field *curr_lim_fld;
80
+
struct regmap_field *vbus_valid_bit;
81
+
struct regmap_field *vbus_mon_bit;
82
+
struct regmap_field *usb_bc_en_bit;
83
+
struct regmap_field *vbus_disable_bit;
51
84
struct power_supply *supply;
52
-
enum axp20x_variants axp20x_id;
85
+
const struct axp_data *axp_data;
53
86
struct iio_channel *vbus_v;
54
87
struct iio_channel *vbus_i;
55
88
struct delayed_work vbus_detect;
···
84
81
* present->absent transition implies an online->offline transition
85
82
* and will trigger the VBUS_REMOVAL IRQ.
86
83
*/
87
-
if (power->axp20x_id >= AXP221_ID && !power->online)
84
+
if (power->axp_data->vbus_needs_polling && !power->online)
88
85
return true;
89
86
90
87
return false;
···
122
119
out:
123
120
if (axp20x_usb_vbus_needs_polling(power))
124
121
mod_delayed_work(system_power_efficient_wq, &power->vbus_detect, DEBOUNCE_TIME);
125
-
}
126
-
127
-
static int axp20x_get_current_max(struct axp20x_usb_power *power, int *val)
128
-
{
129
-
unsigned int v;
130
-
int ret = regmap_read(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, &v);
131
-
132
-
if (ret)
133
-
return ret;
134
-
135
-
switch (v & AXP20X_VBUS_CLIMIT_MASK) {
136
-
case AXP20X_VBUS_CLIMIT_100mA:
137
-
if (power->axp20x_id == AXP221_ID)
138
-
*val = -1; /* No 100mA limit */
139
-
else
140
-
*val = 100000;
141
-
break;
142
-
case AXP20X_VBUS_CLIMIT_500mA:
143
-
*val = 500000;
144
-
break;
145
-
case AXP20X_VBUS_CLIMIT_900mA:
146
-
*val = 900000;
147
-
break;
148
-
case AXP20X_VBUS_CLIMIT_NONE:
149
-
*val = -1;
150
-
break;
151
-
}
152
-
153
-
return 0;
154
-
}
155
-
156
-
static int axp813_get_current_max(struct axp20x_usb_power *power, int *val)
157
-
{
158
-
unsigned int v;
159
-
int ret = regmap_read(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, &v);
160
-
161
-
if (ret)
162
-
return ret;
163
-
164
-
switch (v & AXP20X_VBUS_CLIMIT_MASK) {
165
-
case AXP813_VBUS_CLIMIT_900mA:
166
-
*val = 900000;
167
-
break;
168
-
case AXP813_VBUS_CLIMIT_1500mA:
169
-
*val = 1500000;
170
-
break;
171
-
case AXP813_VBUS_CLIMIT_2000mA:
172
-
*val = 2000000;
173
-
break;
174
-
case AXP813_VBUS_CLIMIT_2500mA:
175
-
*val = 2500000;
176
-
break;
177
-
}
178
-
return 0;
179
122
}
180
123
181
124
static int axp20x_usb_power_get_property(struct power_supply *psy,
···
162
213
val->intval = ret * 1700; /* 1 step = 1.7 mV */
163
214
return 0;
164
215
case POWER_SUPPLY_PROP_CURRENT_MAX:
165
-
if (power->axp20x_id == AXP813_ID)
166
-
return axp813_get_current_max(power, &val->intval);
167
-
return axp20x_get_current_max(power, &val->intval);
216
+
ret = regmap_field_read(power->curr_lim_fld, &v);
217
+
if (ret)
218
+
return ret;
219
+
220
+
val->intval = power->axp_data->curr_lim_table[v];
221
+
return 0;
168
222
case POWER_SUPPLY_PROP_CURRENT_NOW:
169
223
if (IS_ENABLED(CONFIG_AXP20X_ADC)) {
170
224
ret = iio_read_channel_processed(power->vbus_i,
···
208
256
209
257
val->intval = POWER_SUPPLY_HEALTH_GOOD;
210
258
211
-
if (power->axp20x_id == AXP202_ID) {
212
-
ret = regmap_read(power->regmap,
213
-
AXP20X_USB_OTG_STATUS, &v);
259
+
if (power->vbus_valid_bit) {
260
+
ret = regmap_field_read(power->vbus_valid_bit, &v);
214
261
if (ret)
215
262
return ret;
216
263
217
-
if (!(v & AXP20X_USB_STATUS_VBUS_VALID))
218
-
val->intval =
219
-
POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
264
+
if (v == 0)
265
+
val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
220
266
}
267
+
221
268
break;
222
269
case POWER_SUPPLY_PROP_PRESENT:
223
270
val->intval = !!(input & AXP20X_PWR_STATUS_VBUS_PRESENT);
···
229
278
}
230
279
231
280
return 0;
232
-
}
233
-
234
-
static int axp813_usb_power_set_online(struct axp20x_usb_power *power,
235
-
int intval)
236
-
{
237
-
int val = !intval << AXP20X_VBUS_PATH_SEL_OFFSET;
238
-
239
-
return regmap_update_bits(power->regmap,
240
-
AXP20X_VBUS_IPSOUT_MGMT,
241
-
AXP20X_VBUS_PATH_SEL, val);
242
281
}
243
282
244
283
static int axp20x_usb_power_set_voltage_min(struct axp20x_usb_power *power,
···
257
316
return -EINVAL;
258
317
}
259
318
260
-
static int axp813_usb_power_set_current_max(struct axp20x_usb_power *power,
261
-
int intval)
319
+
static int axp20x_usb_power_set_current_max(struct axp20x_usb_power *power, int intval)
262
320
{
263
-
int val;
321
+
const unsigned int max = GENMASK(power->axp_data->curr_lim_fld.msb,
322
+
power->axp_data->curr_lim_fld.lsb);
264
323
265
-
switch (intval) {
266
-
case 900000:
267
-
return regmap_update_bits(power->regmap,
268
-
AXP20X_VBUS_IPSOUT_MGMT,
269
-
AXP20X_VBUS_CLIMIT_MASK,
270
-
AXP813_VBUS_CLIMIT_900mA);
271
-
case 1500000:
272
-
case 2000000:
273
-
case 2500000:
274
-
val = (intval - 1000000) / 500000;
275
-
return regmap_update_bits(power->regmap,
276
-
AXP20X_VBUS_IPSOUT_MGMT,
277
-
AXP20X_VBUS_CLIMIT_MASK, val);
278
-
default:
324
+
if (intval == -1)
279
325
return -EINVAL;
280
-
}
281
326
282
-
return -EINVAL;
283
-
}
284
-
285
-
static int axp20x_usb_power_set_current_max(struct axp20x_usb_power *power,
286
-
int intval)
287
-
{
288
-
int val;
289
-
290
-
switch (intval) {
291
-
case 100000:
292
-
if (power->axp20x_id == AXP221_ID)
293
-
return -EINVAL;
294
-
fallthrough;
295
-
case 500000:
296
-
case 900000:
297
-
val = (900000 - intval) / 400000;
298
-
return regmap_update_bits(power->regmap,
299
-
AXP20X_VBUS_IPSOUT_MGMT,
300
-
AXP20X_VBUS_CLIMIT_MASK, val);
301
-
default:
302
-
return -EINVAL;
303
-
}
327
+
for (unsigned int i = 0; i <= max; ++i)
328
+
if (power->axp_data->curr_lim_table[i] == intval)
329
+
return regmap_field_write(power->curr_lim_fld, i);
304
330
305
331
return -EINVAL;
306
332
}
···
280
372
281
373
switch (psp) {
282
374
case POWER_SUPPLY_PROP_ONLINE:
283
-
if (power->axp20x_id != AXP813_ID)
375
+
if (!power->vbus_disable_bit)
284
376
return -EINVAL;
285
-
return axp813_usb_power_set_online(power, val->intval);
377
+
378
+
return regmap_field_write(power->vbus_disable_bit, !val->intval);
286
379
287
380
case POWER_SUPPLY_PROP_VOLTAGE_MIN:
288
381
return axp20x_usb_power_set_voltage_min(power, val->intval);
289
382
290
383
case POWER_SUPPLY_PROP_CURRENT_MAX:
291
-
if (power->axp20x_id == AXP813_ID)
292
-
return axp813_usb_power_set_current_max(power,
293
-
val->intval);
294
384
return axp20x_usb_power_set_current_max(power, val->intval);
295
385
296
386
default:
···
311
405
* the VBUS input offline.
312
406
*/
313
407
if (psp == POWER_SUPPLY_PROP_ONLINE)
314
-
return power->axp20x_id == AXP813_ID;
408
+
return power->vbus_disable_bit != NULL;
315
409
316
410
return psp == POWER_SUPPLY_PROP_VOLTAGE_MIN ||
317
411
psp == POWER_SUPPLY_PROP_CURRENT_MAX;
···
367
461
"VBUS_REMOVAL",
368
462
};
369
463
370
-
struct axp_data {
371
-
const struct power_supply_desc *power_desc;
372
-
const char * const *irq_names;
373
-
unsigned int num_irq_names;
374
-
enum axp20x_variants axp20x_id;
464
+
static int axp192_usb_curr_lim_table[] = {
465
+
-1,
466
+
-1,
467
+
500000,
468
+
100000,
469
+
};
470
+
471
+
static int axp20x_usb_curr_lim_table[] = {
472
+
900000,
473
+
500000,
474
+
100000,
475
+
-1,
476
+
};
477
+
478
+
static int axp221_usb_curr_lim_table[] = {
479
+
900000,
480
+
500000,
481
+
-1,
482
+
-1,
483
+
};
484
+
485
+
static int axp813_usb_curr_lim_table[] = {
486
+
900000,
487
+
1500000,
488
+
2000000,
489
+
2500000,
490
+
};
491
+
492
+
static const struct axp_data axp192_data = {
493
+
.power_desc = &axp20x_usb_power_desc,
494
+
.irq_names = axp20x_irq_names,
495
+
.num_irq_names = ARRAY_SIZE(axp20x_irq_names),
496
+
.curr_lim_table = axp192_usb_curr_lim_table,
497
+
.curr_lim_fld = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 0, 1),
498
+
.vbus_valid_bit = REG_FIELD(AXP192_USB_OTG_STATUS, 2, 2),
499
+
.vbus_mon_bit = REG_FIELD(AXP20X_VBUS_MON, 3, 3),
375
500
};
376
501
377
502
static const struct axp_data axp202_data = {
378
503
.power_desc = &axp20x_usb_power_desc,
379
504
.irq_names = axp20x_irq_names,
380
505
.num_irq_names = ARRAY_SIZE(axp20x_irq_names),
381
-
.axp20x_id = AXP202_ID,
506
+
.curr_lim_table = axp20x_usb_curr_lim_table,
507
+
.curr_lim_fld = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 0, 1),
508
+
.vbus_valid_bit = REG_FIELD(AXP20X_USB_OTG_STATUS, 2, 2),
509
+
.vbus_mon_bit = REG_FIELD(AXP20X_VBUS_MON, 3, 3),
382
510
};
383
511
384
512
static const struct axp_data axp221_data = {
385
513
.power_desc = &axp22x_usb_power_desc,
386
514
.irq_names = axp22x_irq_names,
387
515
.num_irq_names = ARRAY_SIZE(axp22x_irq_names),
388
-
.axp20x_id = AXP221_ID,
516
+
.curr_lim_table = axp221_usb_curr_lim_table,
517
+
.curr_lim_fld = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 0, 1),
518
+
.vbus_needs_polling = true,
389
519
};
390
520
391
521
static const struct axp_data axp223_data = {
392
522
.power_desc = &axp22x_usb_power_desc,
393
523
.irq_names = axp22x_irq_names,
394
524
.num_irq_names = ARRAY_SIZE(axp22x_irq_names),
395
-
.axp20x_id = AXP223_ID,
525
+
.curr_lim_table = axp20x_usb_curr_lim_table,
526
+
.curr_lim_fld = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 0, 1),
527
+
.vbus_needs_polling = true,
396
528
};
397
529
398
530
static const struct axp_data axp813_data = {
399
531
.power_desc = &axp22x_usb_power_desc,
400
532
.irq_names = axp22x_irq_names,
401
533
.num_irq_names = ARRAY_SIZE(axp22x_irq_names),
402
-
.axp20x_id = AXP813_ID,
534
+
.curr_lim_table = axp813_usb_curr_lim_table,
535
+
.curr_lim_fld = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 0, 1),
536
+
.usb_bc_en_bit = REG_FIELD(AXP288_BC_GLOBAL, 0, 0),
537
+
.vbus_disable_bit = REG_FIELD(AXP20X_VBUS_IPSOUT_MGMT, 7, 7),
538
+
.vbus_needs_polling = true,
403
539
};
404
540
405
541
#ifdef CONFIG_PM_SLEEP
···
513
565
AXP20X_ADC_EN1_VBUS_VOLT);
514
566
}
515
567
568
+
static int axp20x_regmap_field_alloc_optional(struct device *dev,
569
+
struct regmap *regmap,
570
+
struct reg_field fdesc,
571
+
struct regmap_field **fieldp)
572
+
{
573
+
struct regmap_field *field;
574
+
575
+
if (fdesc.reg == 0) {
576
+
*fieldp = NULL;
577
+
return 0;
578
+
}
579
+
580
+
field = devm_regmap_field_alloc(dev, regmap, fdesc);
581
+
if (IS_ERR(field))
582
+
return PTR_ERR(field);
583
+
584
+
*fieldp = field;
585
+
return 0;
586
+
}
587
+
516
588
static int axp20x_usb_power_probe(struct platform_device *pdev)
517
589
{
518
590
struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
···
559
591
560
592
platform_set_drvdata(pdev, power);
561
593
562
-
power->axp20x_id = axp_data->axp20x_id;
594
+
power->axp_data = axp_data;
563
595
power->regmap = axp20x->regmap;
564
596
power->num_irqs = axp_data->num_irq_names;
597
+
598
+
power->curr_lim_fld = devm_regmap_field_alloc(&pdev->dev, power->regmap,
599
+
axp_data->curr_lim_fld);
600
+
if (IS_ERR(power->curr_lim_fld))
601
+
return PTR_ERR(power->curr_lim_fld);
602
+
603
+
ret = axp20x_regmap_field_alloc_optional(&pdev->dev, power->regmap,
604
+
axp_data->vbus_valid_bit,
605
+
&power->vbus_valid_bit);
606
+
if (ret)
607
+
return ret;
608
+
609
+
ret = axp20x_regmap_field_alloc_optional(&pdev->dev, power->regmap,
610
+
axp_data->vbus_mon_bit,
611
+
&power->vbus_mon_bit);
612
+
if (ret)
613
+
return ret;
614
+
615
+
ret = axp20x_regmap_field_alloc_optional(&pdev->dev, power->regmap,
616
+
axp_data->usb_bc_en_bit,
617
+
&power->usb_bc_en_bit);
618
+
if (ret)
619
+
return ret;
620
+
621
+
ret = axp20x_regmap_field_alloc_optional(&pdev->dev, power->regmap,
622
+
axp_data->vbus_disable_bit,
623
+
&power->vbus_disable_bit);
624
+
if (ret)
625
+
return ret;
565
626
566
627
ret = devm_delayed_work_autocancel(&pdev->dev, &power->vbus_detect,
567
628
axp20x_usb_power_poll_vbus);
568
629
if (ret)
569
630
return ret;
570
631
571
-
if (power->axp20x_id == AXP202_ID) {
632
+
if (power->vbus_mon_bit) {
572
633
/* Enable vbus valid checking */
573
-
ret = regmap_update_bits(power->regmap, AXP20X_VBUS_MON,
574
-
AXP20X_VBUS_MON_VBUS_VALID,
575
-
AXP20X_VBUS_MON_VBUS_VALID);
634
+
ret = regmap_field_write(power->vbus_mon_bit, 1);
576
635
if (ret)
577
636
return ret;
578
637
···
612
617
return ret;
613
618
}
614
619
615
-
if (power->axp20x_id == AXP813_ID) {
620
+
if (power->usb_bc_en_bit) {
616
621
/* Enable USB Battery Charging specification detection */
617
-
ret = regmap_update_bits(axp20x->regmap, AXP288_BC_GLOBAL,
618
-
AXP813_BC_EN, AXP813_BC_EN);
622
+
ret = regmap_field_write(power->usb_bc_en_bit, 1);
619
623
if (ret)
620
624
return ret;
621
625
}
···
653
659
654
660
static const struct of_device_id axp20x_usb_power_match[] = {
655
661
{
662
+
.compatible = "x-powers,axp192-usb-power-supply",
663
+
.data = &axp192_data,
664
+
}, {
656
665
.compatible = "x-powers,axp202-usb-power-supply",
657
666
.data = &axp202_data,
658
667
}, {
+1
-1
drivers/power/supply/bd99954-charger.c
+1
-1
drivers/power/supply/bd99954-charger.c
+1
-1
drivers/power/supply/bq2415x_charger.c
+1
-1
drivers/power/supply/bq2415x_charger.c
···
1780
1780
.of_match_table = of_match_ptr(bq2415x_of_match_table),
1781
1781
.acpi_match_table = ACPI_PTR(bq2415x_i2c_acpi_match),
1782
1782
},
1783
-
.probe_new = bq2415x_probe,
1783
+
.probe = bq2415x_probe,
1784
1784
.remove = bq2415x_remove,
1785
1785
.id_table = bq2415x_i2c_id_table,
1786
1786
};
+1
-1
drivers/power/supply/bq24190_charger.c
+1
-1
drivers/power/supply/bq24190_charger.c
···
2034
2034
MODULE_DEVICE_TABLE(of, bq24190_of_match);
2035
2035
2036
2036
static struct i2c_driver bq24190_driver = {
2037
-
.probe_new = bq24190_probe,
2037
+
.probe = bq24190_probe,
2038
2038
.remove = bq24190_remove,
2039
2039
.shutdown = bq24190_shutdown,
2040
2040
.id_table = bq24190_i2c_ids,
+1
-1
drivers/power/supply/bq24257_charger.c
+1
-1
drivers/power/supply/bq24257_charger.c
+1
-1
drivers/power/supply/bq24735-charger.c
+1
-1
drivers/power/supply/bq24735-charger.c
+1
-1
drivers/power/supply/bq2515x_charger.c
+1
-1
drivers/power/supply/bq2515x_charger.c
+29
-1
drivers/power/supply/bq256xx_charger.c
+29
-1
drivers/power/supply/bq256xx_charger.c
···
41
41
#define BQ256XX_IINDPM_MAX_uA 3200000
42
42
#define BQ256XX_IINDPM_DEF_uA 2400000
43
43
44
+
#define BQ256XX_TS_IGNORE BIT(6)
45
+
#define BQ256XX_TS_IGNORE_SHIFT 6
46
+
44
47
#define BQ256XX_VINDPM_MASK GENMASK(3, 0)
45
48
#define BQ256XX_VINDPM_STEP_uV 100000
46
49
#define BQ256XX_VINDPM_OFFSET_uV 3900000
···
159
156
* @vindpm: input voltage limit
160
157
* @ichg_max: maximum fast charge current
161
158
* @vbatreg_max: maximum charge voltage
159
+
* @ts_ignore: TS_IGNORE flag
162
160
*/
163
161
struct bq256xx_init_data {
164
162
u32 ichg;
···
170
166
u32 vindpm;
171
167
u32 ichg_max;
172
168
u32 vbatreg_max;
169
+
bool ts_ignore;
173
170
};
174
171
175
172
/**
···
268
263
* @bq256xx_set_iprechg: pointer to instance specific set_iprechg function
269
264
* @bq256xx_set_vindpm: pointer to instance specific set_vindpm function
270
265
* @bq256xx_set_charge_type: pointer to instance specific set_charge_type function
266
+
* @bq256xx_set_ts_ignore: pointer to instance specific set_ts_ignore function
271
267
*
272
268
* @bq256xx_def_ichg: default ichg value in microamps
273
269
* @bq256xx_def_iindpm: default iindpm value in microamps
···
301
295
int (*bq256xx_set_iprechg)(struct bq256xx_device *bq, int iprechg);
302
296
int (*bq256xx_set_vindpm)(struct bq256xx_device *bq, int vindpm);
303
297
int (*bq256xx_set_charge_type)(struct bq256xx_device *bq, int type);
298
+
int (*bq256xx_set_ts_ignore)(struct bq256xx_device *bq, bool ts_ignore);
304
299
305
300
int bq256xx_def_ichg;
306
301
int bq256xx_def_iindpm;
···
701
694
return regmap_update_bits(bq->regmap, BQ256XX_BATTERY_VOLTAGE_LIMIT,
702
695
BQ256XX_VBATREG_MASK, vbatreg_reg_code <<
703
696
BQ256XX_VBATREG_BIT_SHIFT);
697
+
}
698
+
699
+
static int bq256xx_set_ts_ignore(struct bq256xx_device *bq, bool ts_ignore)
700
+
{
701
+
return regmap_update_bits(bq->regmap, BQ256XX_INPUT_CURRENT_LIMIT,
702
+
BQ256XX_TS_IGNORE, (ts_ignore ? 1 : 0) << BQ256XX_TS_IGNORE_SHIFT);
704
703
}
705
704
706
705
static int bq256xx_get_prechrg_curr(struct bq256xx_device *bq)
···
1325
1312
.bq256xx_get_iterm = bq256xx_get_term_curr,
1326
1313
.bq256xx_get_iprechg = bq256xx_get_prechrg_curr,
1327
1314
.bq256xx_get_vindpm = bq256xx_get_input_volt_lim,
1315
+
.bq256xx_set_ts_ignore = NULL,
1328
1316
1329
1317
.bq256xx_set_ichg = bq256xx_set_ichg_curr,
1330
1318
.bq256xx_set_iindpm = bq256xx_set_input_curr_lim,
···
1365
1351
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
1366
1352
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1367
1353
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1354
+
.bq256xx_set_ts_ignore = NULL,
1368
1355
1369
1356
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
1370
1357
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1397
1382
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
1398
1383
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1399
1384
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1385
+
.bq256xx_set_ts_ignore = NULL,
1400
1386
1401
1387
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
1402
1388
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1429
1413
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
1430
1414
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1431
1415
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1416
+
.bq256xx_set_ts_ignore = NULL,
1432
1417
1433
1418
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
1434
1419
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1461
1444
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
1462
1445
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1463
1446
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1447
+
.bq256xx_set_ts_ignore = bq256xx_set_ts_ignore,
1464
1448
1465
1449
.bq256xx_def_ichg = BQ25611D_ICHG_DEF_uA,
1466
1450
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1493
1475
.bq256xx_set_iprechg = bq25618_619_set_prechrg_curr,
1494
1476
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1495
1477
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1478
+
.bq256xx_set_ts_ignore = bq256xx_set_ts_ignore,
1496
1479
1497
1480
.bq256xx_def_ichg = BQ25618_ICHG_DEF_uA,
1498
1481
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1525
1506
.bq256xx_set_iprechg = bq25618_619_set_prechrg_curr,
1526
1507
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
1527
1508
.bq256xx_set_charge_type = bq256xx_set_charge_type,
1509
+
.bq256xx_set_ts_ignore = bq256xx_set_ts_ignore,
1528
1510
1529
1511
.bq256xx_def_ichg = BQ25618_ICHG_DEF_uA,
1530
1512
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
···
1642
1622
if (ret)
1643
1623
return ret;
1644
1624
1625
+
if (bq->chip_info->bq256xx_set_ts_ignore) {
1626
+
ret = bq->chip_info->bq256xx_set_ts_ignore(bq, bq->init_data.ts_ignore);
1627
+
if (ret)
1628
+
return ret;
1629
+
}
1630
+
1645
1631
power_supply_put_battery_info(bq->charger, bat_info);
1646
1632
1647
1633
return 0;
···
1681
1655
&bq->init_data.iindpm);
1682
1656
if (ret)
1683
1657
bq->init_data.iindpm = bq->chip_info->bq256xx_def_iindpm;
1658
+
1659
+
bq->init_data.ts_ignore = device_property_read_bool(bq->dev, "ti,no-thermistor");
1684
1660
1685
1661
return 0;
1686
1662
}
···
1812
1784
.of_match_table = bq256xx_of_match,
1813
1785
.acpi_match_table = bq256xx_acpi_match,
1814
1786
},
1815
-
.probe_new = bq256xx_probe,
1787
+
.probe = bq256xx_probe,
1816
1788
.id_table = bq256xx_i2c_ids,
1817
1789
};
1818
1790
module_i2c_driver(bq256xx_driver);
+1
-1
drivers/power/supply/bq25890_charger.c
+1
-1
drivers/power/supply/bq25890_charger.c
+1
-1
drivers/power/supply/bq25980_charger.c
+1
-1
drivers/power/supply/bq25980_charger.c
+1
-1
drivers/power/supply/bq27xxx_battery_i2c.c
+1
-1
drivers/power/supply/bq27xxx_battery_i2c.c
···
296
296
.name = "bq27xxx-battery",
297
297
.of_match_table = of_match_ptr(bq27xxx_battery_i2c_of_match_table),
298
298
},
299
-
.probe_new = bq27xxx_battery_i2c_probe,
299
+
.probe = bq27xxx_battery_i2c_probe,
300
300
.remove = bq27xxx_battery_i2c_remove,
301
301
.id_table = bq27xxx_i2c_id_table,
302
302
};
+22
-3
drivers/power/supply/cros_peripheral_charger.c
+22
-3
drivers/power/supply/cros_peripheral_charger.c
···
227
227
return 0;
228
228
}
229
229
230
-
static int cros_pchg_event(const struct charger_data *charger,
231
-
unsigned long host_event)
230
+
static int cros_pchg_event(const struct charger_data *charger)
232
231
{
233
232
int i;
234
233
···
255
256
if (!(host_event & EC_MKBP_PCHG_DEVICE_EVENT))
256
257
return NOTIFY_DONE;
257
258
258
-
return cros_pchg_event(charger, host_event);
259
+
return cros_pchg_event(charger);
259
260
}
260
261
261
262
static int cros_pchg_probe(struct platform_device *pdev)
···
279
280
charger->dev = dev;
280
281
charger->ec_dev = ec_dev;
281
282
charger->ec_device = ec_device;
283
+
284
+
platform_set_drvdata(pdev, charger);
282
285
283
286
ret = cros_pchg_port_count(charger);
284
287
if (ret <= 0) {
···
350
349
return 0;
351
350
}
352
351
352
+
#ifdef CONFIG_PM_SLEEP
353
+
static int __maybe_unused cros_pchg_resume(struct device *dev)
354
+
{
355
+
struct charger_data *charger = dev_get_drvdata(dev);
356
+
357
+
/*
358
+
* Sync all ports on resume in case reports from EC are lost during
359
+
* the last suspend.
360
+
*/
361
+
cros_pchg_event(charger);
362
+
363
+
return 0;
364
+
}
365
+
#endif
366
+
367
+
static SIMPLE_DEV_PM_OPS(cros_pchg_pm_ops, NULL, cros_pchg_resume);
368
+
353
369
static struct platform_driver cros_pchg_driver = {
354
370
.driver = {
355
371
.name = DRV_NAME,
372
+
.pm = &cros_pchg_pm_ops,
356
373
},
357
374
.probe = cros_pchg_probe
358
375
};
+1
-1
drivers/power/supply/cw2015_battery.c
+1
-1
drivers/power/supply/cw2015_battery.c
+1
-1
drivers/power/supply/ds2782_battery.c
+1
-1
drivers/power/supply/ds2782_battery.c
+1
-1
drivers/power/supply/ip5xxx_power.c
+1
-1
drivers/power/supply/ip5xxx_power.c
+1
-1
drivers/power/supply/lp8727_charger.c
+1
-1
drivers/power/supply/lp8727_charger.c
+1
-1
drivers/power/supply/ltc2941-battery-gauge.c
+1
-1
drivers/power/supply/ltc2941-battery-gauge.c
+1
-1
drivers/power/supply/ltc4162-l-charger.c
+1
-1
drivers/power/supply/ltc4162-l-charger.c
+1
-1
drivers/power/supply/max14656_charger_detector.c
+1
-1
drivers/power/supply/max14656_charger_detector.c
+1
-1
drivers/power/supply/max17040_battery.c
+1
-1
drivers/power/supply/max17040_battery.c
+2
-7
drivers/power/supply/max17042_battery.c
+2
-7
drivers/power/supply/max17042_battery.c
···
499
499
return ret;
500
500
}
501
501
502
-
static void max17042_external_power_changed(struct power_supply *psy)
503
-
{
504
-
power_supply_changed(psy);
505
-
}
506
-
507
502
static int max17042_write_verify_reg(struct regmap *map, u8 reg, u32 value)
508
503
{
509
504
int retries = 8;
···
1011
1016
.get_property = max17042_get_property,
1012
1017
.set_property = max17042_set_property,
1013
1018
.property_is_writeable = max17042_property_is_writeable,
1014
-
.external_power_changed = max17042_external_power_changed,
1019
+
.external_power_changed = power_supply_changed,
1015
1020
.properties = max17042_battery_props,
1016
1021
.num_properties = ARRAY_SIZE(max17042_battery_props),
1017
1022
};
···
1215
1220
.of_match_table = of_match_ptr(max17042_dt_match),
1216
1221
.pm = &max17042_pm_ops,
1217
1222
},
1218
-
.probe_new = max17042_probe,
1223
+
.probe = max17042_probe,
1219
1224
.id_table = max17042_id,
1220
1225
};
1221
1226
module_i2c_driver(max17042_i2c_driver);
+1
-1
drivers/power/supply/max77976_charger.c
+1
-1
drivers/power/supply/max77976_charger.c
+1
-1
drivers/power/supply/power_supply_hwmon.c
+1
-1
drivers/power/supply/power_supply_hwmon.c
···
293
293
.read_string = power_supply_hwmon_read_string,
294
294
};
295
295
296
-
static const struct hwmon_channel_info *power_supply_hwmon_info[] = {
296
+
static const struct hwmon_channel_info * const power_supply_hwmon_info[] = {
297
297
HWMON_CHANNEL_INFO(temp,
298
298
HWMON_T_LABEL |
299
299
HWMON_T_INPUT |
+1059
drivers/power/supply/qcom_pmi8998_charger.c
+1059
drivers/power/supply/qcom_pmi8998_charger.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
4
+
* Copyright (c) 2023, Linaro Ltd.
5
+
* Author: Caleb Connolly <caleb.connolly@linaro.org>
6
+
*
7
+
* This driver is for the switch-mode battery charger and boost
8
+
* hardware found in pmi8998 and related PMICs.
9
+
*/
10
+
11
+
#include <linux/bits.h>
12
+
#include <linux/devm-helpers.h>
13
+
#include <linux/iio/consumer.h>
14
+
#include <linux/interrupt.h>
15
+
#include <linux/kernel.h>
16
+
#include <linux/minmax.h>
17
+
#include <linux/module.h>
18
+
#include <linux/platform_device.h>
19
+
#include <linux/pm_wakeirq.h>
20
+
#include <linux/of.h>
21
+
#include <linux/power_supply.h>
22
+
#include <linux/regmap.h>
23
+
#include <linux/types.h>
24
+
#include <linux/workqueue.h>
25
+
26
+
/* clang-format off */
27
+
#define BATTERY_CHARGER_STATUS_1 0x06
28
+
#define BVR_INITIAL_RAMP_BIT BIT(7)
29
+
#define CC_SOFT_TERMINATE_BIT BIT(6)
30
+
#define STEP_CHARGING_STATUS_SHIFT 3
31
+
#define STEP_CHARGING_STATUS_MASK GENMASK(5, 3)
32
+
#define BATTERY_CHARGER_STATUS_MASK GENMASK(2, 0)
33
+
34
+
#define BATTERY_CHARGER_STATUS_2 0x07
35
+
#define INPUT_CURRENT_LIMITED_BIT BIT(7)
36
+
#define CHARGER_ERROR_STATUS_SFT_EXPIRE_BIT BIT(6)
37
+
#define CHARGER_ERROR_STATUS_BAT_OV_BIT BIT(5)
38
+
#define CHARGER_ERROR_STATUS_BAT_TERM_MISSING_BIT BIT(4)
39
+
#define BAT_TEMP_STATUS_MASK GENMASK(3, 0)
40
+
#define BAT_TEMP_STATUS_SOFT_LIMIT_MASK GENMASK(3, 2)
41
+
#define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT BIT(3)
42
+
#define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT BIT(2)
43
+
#define BAT_TEMP_STATUS_TOO_HOT_BIT BIT(1)
44
+
#define BAT_TEMP_STATUS_TOO_COLD_BIT BIT(0)
45
+
46
+
#define BATTERY_CHARGER_STATUS_4 0x0A
47
+
#define CHARGE_CURRENT_POST_JEITA_MASK GENMASK(7, 0)
48
+
49
+
#define BATTERY_CHARGER_STATUS_7 0x0D
50
+
#define ENABLE_TRICKLE_BIT BIT(7)
51
+
#define ENABLE_PRE_CHARGING_BIT BIT(6)
52
+
#define ENABLE_FAST_CHARGING_BIT BIT(5)
53
+
#define ENABLE_FULLON_MODE_BIT BIT(4)
54
+
#define TOO_COLD_ADC_BIT BIT(3)
55
+
#define TOO_HOT_ADC_BIT BIT(2)
56
+
#define HOT_SL_ADC_BIT BIT(1)
57
+
#define COLD_SL_ADC_BIT BIT(0)
58
+
59
+
#define CHARGING_ENABLE_CMD 0x42
60
+
#define CHARGING_ENABLE_CMD_BIT BIT(0)
61
+
62
+
#define CHGR_CFG2 0x51
63
+
#define CHG_EN_SRC_BIT BIT(7)
64
+
#define CHG_EN_POLARITY_BIT BIT(6)
65
+
#define PRETOFAST_TRANSITION_CFG_BIT BIT(5)
66
+
#define BAT_OV_ECC_BIT BIT(4)
67
+
#define I_TERM_BIT BIT(3)
68
+
#define AUTO_RECHG_BIT BIT(2)
69
+
#define EN_ANALOG_DROP_IN_VBATT_BIT BIT(1)
70
+
#define CHARGER_INHIBIT_BIT BIT(0)
71
+
72
+
#define PRE_CHARGE_CURRENT_CFG 0x60
73
+
#define PRE_CHARGE_CURRENT_SETTING_MASK GENMASK(5, 0)
74
+
75
+
#define FAST_CHARGE_CURRENT_CFG 0x61
76
+
#define FAST_CHARGE_CURRENT_SETTING_MASK GENMASK(7, 0)
77
+
78
+
#define FLOAT_VOLTAGE_CFG 0x70
79
+
#define FLOAT_VOLTAGE_SETTING_MASK GENMASK(7, 0)
80
+
81
+
#define FG_UPDATE_CFG_2_SEL 0x7D
82
+
#define SOC_LT_OTG_THRESH_SEL_BIT BIT(3)
83
+
#define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT BIT(2)
84
+
#define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT BIT(1)
85
+
#define IBT_LT_CHG_TERM_THRESH_SEL_BIT BIT(0)
86
+
87
+
#define JEITA_EN_CFG 0x90
88
+
#define JEITA_EN_HARDLIMIT_BIT BIT(4)
89
+
#define JEITA_EN_HOT_SL_FCV_BIT BIT(3)
90
+
#define JEITA_EN_COLD_SL_FCV_BIT BIT(2)
91
+
#define JEITA_EN_HOT_SL_CCC_BIT BIT(1)
92
+
#define JEITA_EN_COLD_SL_CCC_BIT BIT(0)
93
+
94
+
#define INT_RT_STS 0x310
95
+
#define TYPE_C_CHANGE_RT_STS_BIT BIT(7)
96
+
#define USBIN_ICL_CHANGE_RT_STS_BIT BIT(6)
97
+
#define USBIN_SOURCE_CHANGE_RT_STS_BIT BIT(5)
98
+
#define USBIN_PLUGIN_RT_STS_BIT BIT(4)
99
+
#define USBIN_OV_RT_STS_BIT BIT(3)
100
+
#define USBIN_UV_RT_STS_BIT BIT(2)
101
+
#define USBIN_LT_3P6V_RT_STS_BIT BIT(1)
102
+
#define USBIN_COLLAPSE_RT_STS_BIT BIT(0)
103
+
104
+
#define OTG_CFG 0x153
105
+
#define OTG_RESERVED_MASK GENMASK(7, 6)
106
+
#define DIS_OTG_ON_TLIM_BIT BIT(5)
107
+
#define QUICKSTART_OTG_FASTROLESWAP_BIT BIT(4)
108
+
#define INCREASE_DFP_TIME_BIT BIT(3)
109
+
#define ENABLE_OTG_IN_DEBUG_MODE_BIT BIT(2)
110
+
#define OTG_EN_SRC_CFG_BIT BIT(1)
111
+
#define CONCURRENT_MODE_CFG_BIT BIT(0)
112
+
113
+
#define OTG_ENG_OTG_CFG 0x1C0
114
+
#define ENG_BUCKBOOST_HALT1_8_MODE_BIT BIT(0)
115
+
116
+
#define APSD_STATUS 0x307
117
+
#define APSD_STATUS_7_BIT BIT(7)
118
+
#define HVDCP_CHECK_TIMEOUT_BIT BIT(6)
119
+
#define SLOW_PLUGIN_TIMEOUT_BIT BIT(5)
120
+
#define ENUMERATION_DONE_BIT BIT(4)
121
+
#define VADP_CHANGE_DONE_AFTER_AUTH_BIT BIT(3)
122
+
#define QC_AUTH_DONE_STATUS_BIT BIT(2)
123
+
#define QC_CHARGER_BIT BIT(1)
124
+
#define APSD_DTC_STATUS_DONE_BIT BIT(0)
125
+
126
+
#define APSD_RESULT_STATUS 0x308
127
+
#define ICL_OVERRIDE_LATCH_BIT BIT(7)
128
+
#define APSD_RESULT_STATUS_MASK GENMASK(6, 0)
129
+
#define QC_3P0_BIT BIT(6)
130
+
#define QC_2P0_BIT BIT(5)
131
+
#define FLOAT_CHARGER_BIT BIT(4)
132
+
#define DCP_CHARGER_BIT BIT(3)
133
+
#define CDP_CHARGER_BIT BIT(2)
134
+
#define OCP_CHARGER_BIT BIT(1)
135
+
#define SDP_CHARGER_BIT BIT(0)
136
+
137
+
#define TYPE_C_STATUS_1 0x30B
138
+
#define UFP_TYPEC_MASK GENMASK(7, 5)
139
+
#define UFP_TYPEC_RDSTD_BIT BIT(7)
140
+
#define UFP_TYPEC_RD1P5_BIT BIT(6)
141
+
#define UFP_TYPEC_RD3P0_BIT BIT(5)
142
+
#define UFP_TYPEC_FMB_255K_BIT BIT(4)
143
+
#define UFP_TYPEC_FMB_301K_BIT BIT(3)
144
+
#define UFP_TYPEC_FMB_523K_BIT BIT(2)
145
+
#define UFP_TYPEC_FMB_619K_BIT BIT(1)
146
+
#define UFP_TYPEC_OPEN_OPEN_BIT BIT(0)
147
+
148
+
#define TYPE_C_STATUS_2 0x30C
149
+
#define DFP_RA_OPEN_BIT BIT(7)
150
+
#define TIMER_STAGE_BIT BIT(6)
151
+
#define EXIT_UFP_MODE_BIT BIT(5)
152
+
#define EXIT_DFP_MODE_BIT BIT(4)
153
+
#define DFP_TYPEC_MASK GENMASK(3, 0)
154
+
#define DFP_RD_OPEN_BIT BIT(3)
155
+
#define DFP_RD_RA_VCONN_BIT BIT(2)
156
+
#define DFP_RD_RD_BIT BIT(1)
157
+
#define DFP_RA_RA_BIT BIT(0)
158
+
159
+
#define TYPE_C_STATUS_3 0x30D
160
+
#define ENABLE_BANDGAP_BIT BIT(7)
161
+
#define U_USB_GND_NOVBUS_BIT BIT(6)
162
+
#define U_USB_FLOAT_NOVBUS_BIT BIT(5)
163
+
#define U_USB_GND_BIT BIT(4)
164
+
#define U_USB_FMB1_BIT BIT(3)
165
+
#define U_USB_FLOAT1_BIT BIT(2)
166
+
#define U_USB_FMB2_BIT BIT(1)
167
+
#define U_USB_FLOAT2_BIT BIT(0)
168
+
169
+
#define TYPE_C_STATUS_4 0x30E
170
+
#define UFP_DFP_MODE_STATUS_BIT BIT(7)
171
+
#define TYPEC_VBUS_STATUS_BIT BIT(6)
172
+
#define TYPEC_VBUS_ERROR_STATUS_BIT BIT(5)
173
+
#define TYPEC_DEBOUNCE_DONE_STATUS_BIT BIT(4)
174
+
#define TYPEC_UFP_AUDIO_ADAPT_STATUS_BIT BIT(3)
175
+
#define TYPEC_VCONN_OVERCURR_STATUS_BIT BIT(2)
176
+
#define CC_ORIENTATION_BIT BIT(1)
177
+
#define CC_ATTACHED_BIT BIT(0)
178
+
179
+
#define TYPE_C_STATUS_5 0x30F
180
+
#define TRY_SOURCE_FAILED_BIT BIT(6)
181
+
#define TRY_SINK_FAILED_BIT BIT(5)
182
+
#define TIMER_STAGE_2_BIT BIT(4)
183
+
#define TYPEC_LEGACY_CABLE_STATUS_BIT BIT(3)
184
+
#define TYPEC_NONCOMP_LEGACY_CABLE_STATUS_BIT BIT(2)
185
+
#define TYPEC_TRYSOURCE_DETECT_STATUS_BIT BIT(1)
186
+
#define TYPEC_TRYSINK_DETECT_STATUS_BIT BIT(0)
187
+
188
+
#define CMD_APSD 0x341
189
+
#define ICL_OVERRIDE_BIT BIT(1)
190
+
#define APSD_RERUN_BIT BIT(0)
191
+
192
+
#define TYPE_C_CFG 0x358
193
+
#define APSD_START_ON_CC_BIT BIT(7)
194
+
#define WAIT_FOR_APSD_BIT BIT(6)
195
+
#define FACTORY_MODE_DETECTION_EN_BIT BIT(5)
196
+
#define FACTORY_MODE_ICL_3A_4A_BIT BIT(4)
197
+
#define FACTORY_MODE_DIS_CHGING_CFG_BIT BIT(3)
198
+
#define SUSPEND_NON_COMPLIANT_CFG_BIT BIT(2)
199
+
#define VCONN_OC_CFG_BIT BIT(1)
200
+
#define TYPE_C_OR_U_USB_BIT BIT(0)
201
+
202
+
#define TYPE_C_CFG_2 0x359
203
+
#define TYPE_C_DFP_CURRSRC_MODE_BIT BIT(7)
204
+
#define DFP_CC_1P4V_OR_1P6V_BIT BIT(6)
205
+
#define VCONN_SOFTSTART_CFG_MASK GENMASK(5, 4)
206
+
#define EN_TRY_SOURCE_MODE_BIT BIT(3)
207
+
#define USB_FACTORY_MODE_ENABLE_BIT BIT(2)
208
+
#define TYPE_C_UFP_MODE_BIT BIT(1)
209
+
#define EN_80UA_180UA_CUR_SOURCE_BIT BIT(0)
210
+
211
+
#define TYPE_C_CFG_3 0x35A
212
+
#define TVBUS_DEBOUNCE_BIT BIT(7)
213
+
#define TYPEC_LEGACY_CABLE_INT_EN_BIT BIT(6)
214
+
#define TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN_B BIT(5)
215
+
#define TYPEC_TRYSOURCE_DETECT_INT_EN_BIT BIT(4)
216
+
#define TYPEC_TRYSINK_DETECT_INT_EN_BIT BIT(3)
217
+
#define EN_TRYSINK_MODE_BIT BIT(2)
218
+
#define EN_LEGACY_CABLE_DETECTION_BIT BIT(1)
219
+
#define ALLOW_PD_DRING_UFP_TCCDB_BIT BIT(0)
220
+
221
+
#define USBIN_OPTIONS_1_CFG 0x362
222
+
#define CABLE_R_SEL_BIT BIT(7)
223
+
#define HVDCP_AUTH_ALG_EN_CFG_BIT BIT(6)
224
+
#define HVDCP_AUTONOMOUS_MODE_EN_CFG_BIT BIT(5)
225
+
#define INPUT_PRIORITY_BIT BIT(4)
226
+
#define AUTO_SRC_DETECT_BIT BIT(3)
227
+
#define HVDCP_EN_BIT BIT(2)
228
+
#define VADP_INCREMENT_VOLTAGE_LIMIT_BIT BIT(1)
229
+
#define VADP_TAPER_TIMER_EN_BIT BIT(0)
230
+
231
+
#define USBIN_OPTIONS_2_CFG 0x363
232
+
#define WIPWR_RST_EUD_CFG_BIT BIT(7)
233
+
#define SWITCHER_START_CFG_BIT BIT(6)
234
+
#define DCD_TIMEOUT_SEL_BIT BIT(5)
235
+
#define OCD_CURRENT_SEL_BIT BIT(4)
236
+
#define SLOW_PLUGIN_TIMER_EN_CFG_BIT BIT(3)
237
+
#define FLOAT_OPTIONS_MASK GENMASK(2, 0)
238
+
#define FLOAT_DIS_CHGING_CFG_BIT BIT(2)
239
+
#define SUSPEND_FLOAT_CFG_BIT BIT(1)
240
+
#define FORCE_FLOAT_SDP_CFG_BIT BIT(0)
241
+
242
+
#define TAPER_TIMER_SEL_CFG 0x364
243
+
#define TYPEC_SPARE_CFG_BIT BIT(7)
244
+
#define TYPEC_DRP_DFP_TIME_CFG_BIT BIT(5)
245
+
#define TAPER_TIMER_SEL_MASK GENMASK(1, 0)
246
+
247
+
#define USBIN_LOAD_CFG 0x365
248
+
#define USBIN_OV_CH_LOAD_OPTION_BIT BIT(7)
249
+
#define ICL_OVERRIDE_AFTER_APSD_BIT BIT(4)
250
+
251
+
#define USBIN_ICL_OPTIONS 0x366
252
+
#define CFG_USB3P0_SEL_BIT BIT(2)
253
+
#define USB51_MODE_BIT BIT(1)
254
+
#define USBIN_MODE_CHG_BIT BIT(0)
255
+
256
+
#define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL 0x368
257
+
#define EXIT_SNK_BASED_ON_CC_BIT BIT(7)
258
+
#define VCONN_EN_ORIENTATION_BIT BIT(6)
259
+
#define TYPEC_VCONN_OVERCURR_INT_EN_BIT BIT(5)
260
+
#define VCONN_EN_SRC_BIT BIT(4)
261
+
#define VCONN_EN_VALUE_BIT BIT(3)
262
+
#define TYPEC_POWER_ROLE_CMD_MASK GENMASK(2, 0)
263
+
#define UFP_EN_CMD_BIT BIT(2)
264
+
#define DFP_EN_CMD_BIT BIT(1)
265
+
#define TYPEC_DISABLE_CMD_BIT BIT(0)
266
+
267
+
#define USBIN_CURRENT_LIMIT_CFG 0x370
268
+
#define USBIN_CURRENT_LIMIT_MASK GENMASK(7, 0)
269
+
270
+
#define USBIN_AICL_OPTIONS_CFG 0x380
271
+
#define SUSPEND_ON_COLLAPSE_USBIN_BIT BIT(7)
272
+
#define USBIN_AICL_HDC_EN_BIT BIT(6)
273
+
#define USBIN_AICL_START_AT_MAX_BIT BIT(5)
274
+
#define USBIN_AICL_RERUN_EN_BIT BIT(4)
275
+
#define USBIN_AICL_ADC_EN_BIT BIT(3)
276
+
#define USBIN_AICL_EN_BIT BIT(2)
277
+
#define USBIN_HV_COLLAPSE_RESPONSE_BIT BIT(1)
278
+
#define USBIN_LV_COLLAPSE_RESPONSE_BIT BIT(0)
279
+
280
+
#define USBIN_5V_AICL_THRESHOLD_CFG 0x381
281
+
#define USBIN_5V_AICL_THRESHOLD_CFG_MASK GENMASK(2, 0)
282
+
283
+
#define USBIN_CONT_AICL_THRESHOLD_CFG 0x384
284
+
#define USBIN_CONT_AICL_THRESHOLD_CFG_MASK GENMASK(5, 0)
285
+
286
+
#define DC_ENG_SSUPPLY_CFG2 0x4C1
287
+
#define ENG_SSUPPLY_IVREF_OTG_SS_MASK GENMASK(2, 0)
288
+
#define OTG_SS_SLOW 0x3
289
+
290
+
#define DCIN_AICL_REF_SEL_CFG 0x481
291
+
#define DCIN_CONT_AICL_THRESHOLD_CFG_MASK GENMASK(5, 0)
292
+
293
+
#define WI_PWR_OPTIONS 0x495
294
+
#define CHG_OK_BIT BIT(7)
295
+
#define WIPWR_UVLO_IRQ_OPT_BIT BIT(6)
296
+
#define BUCK_HOLDOFF_ENABLE_BIT BIT(5)
297
+
#define CHG_OK_HW_SW_SELECT_BIT BIT(4)
298
+
#define WIPWR_RST_ENABLE_BIT BIT(3)
299
+
#define DCIN_WIPWR_IRQ_SELECT_BIT BIT(2)
300
+
#define AICL_SWITCH_ENABLE_BIT BIT(1)
301
+
#define ZIN_ICL_ENABLE_BIT BIT(0)
302
+
303
+
#define ICL_STATUS 0x607
304
+
#define INPUT_CURRENT_LIMIT_MASK GENMASK(7, 0)
305
+
306
+
#define POWER_PATH_STATUS 0x60B
307
+
#define P_PATH_INPUT_SS_DONE_BIT BIT(7)
308
+
#define P_PATH_USBIN_SUSPEND_STS_BIT BIT(6)
309
+
#define P_PATH_DCIN_SUSPEND_STS_BIT BIT(5)
310
+
#define P_PATH_USE_USBIN_BIT BIT(4)
311
+
#define P_PATH_USE_DCIN_BIT BIT(3)
312
+
#define P_PATH_POWER_PATH_MASK GENMASK(2, 1)
313
+
#define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT BIT(0)
314
+
315
+
#define BARK_BITE_WDOG_PET 0x643
316
+
#define BARK_BITE_WDOG_PET_BIT BIT(0)
317
+
318
+
#define WD_CFG 0x651
319
+
#define WATCHDOG_TRIGGER_AFP_EN_BIT BIT(7)
320
+
#define BARK_WDOG_INT_EN_BIT BIT(6)
321
+
#define BITE_WDOG_INT_EN_BIT BIT(5)
322
+
#define SFT_AFTER_WDOG_IRQ_MASK GENMASK(4, 3)
323
+
#define WDOG_IRQ_SFT_BIT BIT(2)
324
+
#define WDOG_TIMER_EN_ON_PLUGIN_BIT BIT(1)
325
+
#define WDOG_TIMER_EN_BIT BIT(0)
326
+
327
+
#define SNARL_BARK_BITE_WD_CFG 0x653
328
+
#define BITE_WDOG_DISABLE_CHARGING_CFG_BIT BIT(7)
329
+
#define SNARL_WDOG_TIMEOUT_MASK GENMASK(6, 4)
330
+
#define BARK_WDOG_TIMEOUT_MASK GENMASK(3, 2)
331
+
#define BITE_WDOG_TIMEOUT_MASK GENMASK(1, 0)
332
+
333
+
#define AICL_RERUN_TIME_CFG 0x661
334
+
#define AICL_RERUN_TIME_MASK GENMASK(1, 0)
335
+
336
+
#define STAT_CFG 0x690
337
+
#define STAT_SW_OVERRIDE_VALUE_BIT BIT(7)
338
+
#define STAT_SW_OVERRIDE_CFG_BIT BIT(6)
339
+
#define STAT_PARALLEL_OFF_DG_CFG_MASK GENMASK(5, 4)
340
+
#define STAT_POLARITY_CFG_BIT BIT(3)
341
+
#define STAT_PARALLEL_CFG_BIT BIT(2)
342
+
#define STAT_FUNCTION_CFG_BIT BIT(1)
343
+
#define STAT_IRQ_PULSING_EN_BIT BIT(0)
344
+
345
+
#define SDP_CURRENT_UA 500000
346
+
#define CDP_CURRENT_UA 1500000
347
+
#define DCP_CURRENT_UA 1500000
348
+
#define CURRENT_MAX_UA DCP_CURRENT_UA
349
+
350
+
/* pmi8998 registers represent current in increments of 1/40th of an amp */
351
+
#define CURRENT_SCALE_FACTOR 25000
352
+
/* clang-format on */
353
+
354
+
enum charger_status {
355
+
TRICKLE_CHARGE = 0,
356
+
PRE_CHARGE,
357
+
FAST_CHARGE,
358
+
FULLON_CHARGE,
359
+
TAPER_CHARGE,
360
+
TERMINATE_CHARGE,
361
+
INHIBIT_CHARGE,
362
+
DISABLE_CHARGE,
363
+
};
364
+
365
+
struct smb2_register {
366
+
u16 addr;
367
+
u8 mask;
368
+
u8 val;
369
+
};
370
+
371
+
/**
372
+
* struct smb2_chip - smb2 chip structure
373
+
* @dev: Device reference for power_supply
374
+
* @name: The platform device name
375
+
* @base: Base address for smb2 registers
376
+
* @regmap: Register map
377
+
* @batt_info: Battery data from DT
378
+
* @status_change_work: Worker to handle plug/unplug events
379
+
* @cable_irq: USB plugin IRQ
380
+
* @wakeup_enabled: If the cable IRQ will cause a wakeup
381
+
* @usb_in_i_chan: USB_IN current measurement channel
382
+
* @usb_in_v_chan: USB_IN voltage measurement channel
383
+
* @chg_psy: Charger power supply instance
384
+
*/
385
+
struct smb2_chip {
386
+
struct device *dev;
387
+
const char *name;
388
+
unsigned int base;
389
+
struct regmap *regmap;
390
+
struct power_supply_battery_info *batt_info;
391
+
392
+
struct delayed_work status_change_work;
393
+
int cable_irq;
394
+
bool wakeup_enabled;
395
+
396
+
struct iio_channel *usb_in_i_chan;
397
+
struct iio_channel *usb_in_v_chan;
398
+
399
+
struct power_supply *chg_psy;
400
+
};
401
+
402
+
static enum power_supply_property smb2_properties[] = {
403
+
POWER_SUPPLY_PROP_MANUFACTURER,
404
+
POWER_SUPPLY_PROP_MODEL_NAME,
405
+
POWER_SUPPLY_PROP_CURRENT_MAX,
406
+
POWER_SUPPLY_PROP_CURRENT_NOW,
407
+
POWER_SUPPLY_PROP_VOLTAGE_NOW,
408
+
POWER_SUPPLY_PROP_STATUS,
409
+
POWER_SUPPLY_PROP_HEALTH,
410
+
POWER_SUPPLY_PROP_ONLINE,
411
+
POWER_SUPPLY_PROP_USB_TYPE,
412
+
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT,
413
+
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX,
414
+
};
415
+
416
+
static enum power_supply_usb_type smb2_usb_types[] = {
417
+
POWER_SUPPLY_USB_TYPE_UNKNOWN,
418
+
POWER_SUPPLY_USB_TYPE_SDP,
419
+
POWER_SUPPLY_USB_TYPE_DCP,
420
+
POWER_SUPPLY_USB_TYPE_CDP,
421
+
};
422
+
423
+
static int smb2_get_prop_usb_online(struct smb2_chip *chip, int *val)
424
+
{
425
+
unsigned int stat;
426
+
int rc;
427
+
428
+
rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat);
429
+
if (rc < 0) {
430
+
dev_err(chip->dev, "Couldn't read power path status: %d\n", rc);
431
+
return rc;
432
+
}
433
+
434
+
*val = (stat & P_PATH_USE_USBIN_BIT) &&
435
+
(stat & P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT);
436
+
return 0;
437
+
}
438
+
439
+
/*
440
+
* Qualcomm "automatic power source detection" aka APSD
441
+
* tells us what type of charger we're connected to.
442
+
*/
443
+
static int smb2_apsd_get_charger_type(struct smb2_chip *chip, int *val)
444
+
{
445
+
unsigned int apsd_stat, stat;
446
+
int usb_online = 0;
447
+
int rc;
448
+
449
+
rc = smb2_get_prop_usb_online(chip, &usb_online);
450
+
if (!usb_online) {
451
+
*val = POWER_SUPPLY_USB_TYPE_UNKNOWN;
452
+
return rc;
453
+
}
454
+
455
+
rc = regmap_read(chip->regmap, chip->base + APSD_STATUS, &apsd_stat);
456
+
if (rc < 0) {
457
+
dev_err(chip->dev, "Failed to read apsd status, rc = %d", rc);
458
+
return rc;
459
+
}
460
+
if (!(apsd_stat & APSD_DTC_STATUS_DONE_BIT)) {
461
+
dev_dbg(chip->dev, "Apsd not ready");
462
+
return -EAGAIN;
463
+
}
464
+
465
+
rc = regmap_read(chip->regmap, chip->base + APSD_RESULT_STATUS, &stat);
466
+
if (rc < 0) {
467
+
dev_err(chip->dev, "Failed to read apsd result, rc = %d", rc);
468
+
return rc;
469
+
}
470
+
471
+
stat &= APSD_RESULT_STATUS_MASK;
472
+
473
+
if (stat & CDP_CHARGER_BIT)
474
+
*val = POWER_SUPPLY_USB_TYPE_CDP;
475
+
else if (stat & (DCP_CHARGER_BIT | OCP_CHARGER_BIT | FLOAT_CHARGER_BIT))
476
+
*val = POWER_SUPPLY_USB_TYPE_DCP;
477
+
else /* SDP_CHARGER_BIT (or others) */
478
+
*val = POWER_SUPPLY_USB_TYPE_SDP;
479
+
480
+
return 0;
481
+
}
482
+
483
+
static int smb2_get_prop_status(struct smb2_chip *chip, int *val)
484
+
{
485
+
unsigned char stat[2];
486
+
int usb_online = 0;
487
+
int rc;
488
+
489
+
rc = smb2_get_prop_usb_online(chip, &usb_online);
490
+
if (!usb_online) {
491
+
*val = POWER_SUPPLY_STATUS_DISCHARGING;
492
+
return rc;
493
+
}
494
+
495
+
rc = regmap_bulk_read(chip->regmap,
496
+
chip->base + BATTERY_CHARGER_STATUS_1, &stat, 2);
497
+
if (rc < 0) {
498
+
dev_err(chip->dev, "Failed to read charging status ret=%d\n",
499
+
rc);
500
+
return rc;
501
+
}
502
+
503
+
if (stat[1] & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
504
+
*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
505
+
return 0;
506
+
}
507
+
508
+
stat[0] = stat[0] & BATTERY_CHARGER_STATUS_MASK;
509
+
510
+
switch (stat[0]) {
511
+
case TRICKLE_CHARGE:
512
+
case PRE_CHARGE:
513
+
case FAST_CHARGE:
514
+
case FULLON_CHARGE:
515
+
case TAPER_CHARGE:
516
+
*val = POWER_SUPPLY_STATUS_CHARGING;
517
+
return rc;
518
+
case DISABLE_CHARGE:
519
+
*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
520
+
return rc;
521
+
case TERMINATE_CHARGE:
522
+
*val = POWER_SUPPLY_STATUS_FULL;
523
+
return rc;
524
+
case INHIBIT_CHARGE:
525
+
default:
526
+
*val = POWER_SUPPLY_STATUS_UNKNOWN;
527
+
return rc;
528
+
}
529
+
}
530
+
531
+
static inline int smb2_get_current_limit(struct smb2_chip *chip,
532
+
unsigned int *val)
533
+
{
534
+
int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
535
+
536
+
if (rc >= 0)
537
+
*val *= CURRENT_SCALE_FACTOR;
538
+
return rc;
539
+
}
540
+
541
+
static int smb2_set_current_limit(struct smb2_chip *chip, unsigned int val)
542
+
{
543
+
unsigned char val_raw;
544
+
545
+
if (val > 4800000) {
546
+
dev_err(chip->dev,
547
+
"Can't set current limit higher than 4800000uA");
548
+
return -EINVAL;
549
+
}
550
+
val_raw = val / CURRENT_SCALE_FACTOR;
551
+
552
+
return regmap_write(chip->regmap, chip->base + USBIN_CURRENT_LIMIT_CFG,
553
+
val_raw);
554
+
}
555
+
556
+
static void smb2_status_change_work(struct work_struct *work)
557
+
{
558
+
unsigned int charger_type, current_ua;
559
+
int usb_online, count, rc;
560
+
struct smb2_chip *chip;
561
+
562
+
chip = container_of(work, struct smb2_chip, status_change_work.work);
563
+
564
+
smb2_get_prop_usb_online(chip, &usb_online);
565
+
if (!usb_online)
566
+
return;
567
+
568
+
for (count = 0; count < 3; count++) {
569
+
dev_dbg(chip->dev, "get charger type retry %d\n", count);
570
+
rc = smb2_apsd_get_charger_type(chip, &charger_type);
571
+
if (rc != -EAGAIN)
572
+
break;
573
+
msleep(100);
574
+
}
575
+
576
+
if (rc < 0 && rc != -EAGAIN) {
577
+
dev_err(chip->dev, "get charger type failed: %d\n", rc);
578
+
return;
579
+
}
580
+
581
+
if (rc < 0) {
582
+
rc = regmap_update_bits(chip->regmap, chip->base + CMD_APSD,
583
+
APSD_RERUN_BIT, APSD_RERUN_BIT);
584
+
schedule_delayed_work(&chip->status_change_work,
585
+
msecs_to_jiffies(1000));
586
+
dev_dbg(chip->dev, "get charger type failed, rerun apsd\n");
587
+
return;
588
+
}
589
+
590
+
switch (charger_type) {
591
+
case POWER_SUPPLY_USB_TYPE_CDP:
592
+
current_ua = CDP_CURRENT_UA;
593
+
break;
594
+
case POWER_SUPPLY_USB_TYPE_DCP:
595
+
current_ua = DCP_CURRENT_UA;
596
+
break;
597
+
case POWER_SUPPLY_USB_TYPE_SDP:
598
+
default:
599
+
current_ua = SDP_CURRENT_UA;
600
+
break;
601
+
}
602
+
603
+
smb2_set_current_limit(chip, current_ua);
604
+
power_supply_changed(chip->chg_psy);
605
+
}
606
+
607
+
static int smb2_get_iio_chan(struct smb2_chip *chip, struct iio_channel *chan,
608
+
int *val)
609
+
{
610
+
int rc;
611
+
union power_supply_propval status;
612
+
613
+
rc = power_supply_get_property(chip->chg_psy, POWER_SUPPLY_PROP_STATUS,
614
+
&status);
615
+
if (rc < 0 || status.intval != POWER_SUPPLY_STATUS_CHARGING) {
616
+
*val = 0;
617
+
return 0;
618
+
}
619
+
620
+
if (IS_ERR(chan)) {
621
+
dev_err(chip->dev, "Failed to chan, err = %li", PTR_ERR(chan));
622
+
return PTR_ERR(chan);
623
+
}
624
+
625
+
return iio_read_channel_processed(chan, val);
626
+
}
627
+
628
+
static int smb2_get_prop_health(struct smb2_chip *chip, int *val)
629
+
{
630
+
int rc;
631
+
unsigned int stat;
632
+
633
+
rc = regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
634
+
&stat);
635
+
if (rc < 0) {
636
+
dev_err(chip->dev, "Couldn't read charger status rc=%d\n", rc);
637
+
return rc;
638
+
}
639
+
640
+
switch (stat) {
641
+
case CHARGER_ERROR_STATUS_BAT_OV_BIT:
642
+
*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
643
+
return 0;
644
+
case BAT_TEMP_STATUS_TOO_COLD_BIT:
645
+
*val = POWER_SUPPLY_HEALTH_COLD;
646
+
return 0;
647
+
case BAT_TEMP_STATUS_TOO_HOT_BIT:
648
+
*val = POWER_SUPPLY_HEALTH_OVERHEAT;
649
+
return 0;
650
+
case BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
651
+
*val = POWER_SUPPLY_HEALTH_COOL;
652
+
return 0;
653
+
case BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
654
+
*val = POWER_SUPPLY_HEALTH_WARM;
655
+
return 0;
656
+
default:
657
+
*val = POWER_SUPPLY_HEALTH_GOOD;
658
+
return 0;
659
+
}
660
+
}
661
+
662
+
static int smb2_get_property(struct power_supply *psy,
663
+
enum power_supply_property psp,
664
+
union power_supply_propval *val)
665
+
{
666
+
struct smb2_chip *chip = power_supply_get_drvdata(psy);
667
+
668
+
switch (psp) {
669
+
case POWER_SUPPLY_PROP_MANUFACTURER:
670
+
val->strval = "Qualcomm";
671
+
return 0;
672
+
case POWER_SUPPLY_PROP_MODEL_NAME:
673
+
val->strval = chip->name;
674
+
return 0;
675
+
case POWER_SUPPLY_PROP_CURRENT_MAX:
676
+
case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT:
677
+
return smb2_get_current_limit(chip, &val->intval);
678
+
case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX:
679
+
val->intval = DCP_CURRENT_UA;
680
+
return 0;
681
+
case POWER_SUPPLY_PROP_CURRENT_NOW:
682
+
return smb2_get_iio_chan(chip, chip->usb_in_i_chan,
683
+
&val->intval);
684
+
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
685
+
return smb2_get_iio_chan(chip, chip->usb_in_v_chan,
686
+
&val->intval);
687
+
case POWER_SUPPLY_PROP_ONLINE:
688
+
return smb2_get_prop_usb_online(chip, &val->intval);
689
+
case POWER_SUPPLY_PROP_STATUS:
690
+
return smb2_get_prop_status(chip, &val->intval);
691
+
case POWER_SUPPLY_PROP_HEALTH:
692
+
return smb2_get_prop_health(chip, &val->intval);
693
+
case POWER_SUPPLY_PROP_USB_TYPE:
694
+
return smb2_apsd_get_charger_type(chip, &val->intval);
695
+
default:
696
+
dev_err(chip->dev, "invalid property: %d\n", psp);
697
+
return -EINVAL;
698
+
}
699
+
}
700
+
701
+
static int smb2_set_property(struct power_supply *psy,
702
+
enum power_supply_property psp,
703
+
const union power_supply_propval *val)
704
+
{
705
+
struct smb2_chip *chip = power_supply_get_drvdata(psy);
706
+
707
+
switch (psp) {
708
+
case POWER_SUPPLY_PROP_CURRENT_MAX:
709
+
case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT:
710
+
return smb2_set_current_limit(chip, val->intval);
711
+
default:
712
+
dev_err(chip->dev, "No setter for property: %d\n", psp);
713
+
return -EINVAL;
714
+
}
715
+
}
716
+
717
+
static int smb2_property_is_writable(struct power_supply *psy,
718
+
enum power_supply_property psp)
719
+
{
720
+
switch (psp) {
721
+
case POWER_SUPPLY_PROP_CURRENT_MAX:
722
+
case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT:
723
+
return 1;
724
+
default:
725
+
return 0;
726
+
}
727
+
}
728
+
729
+
static irqreturn_t smb2_handle_batt_overvoltage(int irq, void *data)
730
+
{
731
+
struct smb2_chip *chip = data;
732
+
unsigned int status;
733
+
734
+
regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
735
+
&status);
736
+
737
+
if (status & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
738
+
/* The hardware stops charging automatically */
739
+
dev_err(chip->dev, "battery overvoltage detected\n");
740
+
power_supply_changed(chip->chg_psy);
741
+
}
742
+
743
+
return IRQ_HANDLED;
744
+
}
745
+
746
+
static irqreturn_t smb2_handle_usb_plugin(int irq, void *data)
747
+
{
748
+
struct smb2_chip *chip = data;
749
+
750
+
power_supply_changed(chip->chg_psy);
751
+
752
+
schedule_delayed_work(&chip->status_change_work,
753
+
msecs_to_jiffies(1500));
754
+
755
+
return IRQ_HANDLED;
756
+
}
757
+
758
+
static irqreturn_t smb2_handle_usb_icl_change(int irq, void *data)
759
+
{
760
+
struct smb2_chip *chip = data;
761
+
762
+
power_supply_changed(chip->chg_psy);
763
+
764
+
return IRQ_HANDLED;
765
+
}
766
+
767
+
static irqreturn_t smb2_handle_wdog_bark(int irq, void *data)
768
+
{
769
+
struct smb2_chip *chip = data;
770
+
int rc;
771
+
772
+
power_supply_changed(chip->chg_psy);
773
+
774
+
rc = regmap_write(chip->regmap, BARK_BITE_WDOG_PET,
775
+
BARK_BITE_WDOG_PET_BIT);
776
+
if (rc < 0)
777
+
dev_err(chip->dev, "Couldn't pet the dog rc=%d\n", rc);
778
+
779
+
return IRQ_HANDLED;
780
+
}
781
+
782
+
static const struct power_supply_desc smb2_psy_desc = {
783
+
.name = "pmi8998_charger",
784
+
.type = POWER_SUPPLY_TYPE_USB,
785
+
.usb_types = smb2_usb_types,
786
+
.num_usb_types = ARRAY_SIZE(smb2_usb_types),
787
+
.properties = smb2_properties,
788
+
.num_properties = ARRAY_SIZE(smb2_properties),
789
+
.get_property = smb2_get_property,
790
+
.set_property = smb2_set_property,
791
+
.property_is_writeable = smb2_property_is_writable,
792
+
};
793
+
794
+
/* Init sequence derived from vendor downstream driver */
795
+
static const struct smb2_register smb2_init_seq[] = {
796
+
{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
797
+
/*
798
+
* By default configure us as an upstream facing port
799
+
* FIXME: This will be handled by the type-c driver
800
+
*/
801
+
{ .addr = TYPE_C_INTRPT_ENB_SOFTWARE_CTRL,
802
+
.mask = TYPEC_POWER_ROLE_CMD_MASK | VCONN_EN_SRC_BIT |
803
+
VCONN_EN_VALUE_BIT,
804
+
.val = VCONN_EN_SRC_BIT },
805
+
/*
806
+
* Disable Type-C factory mode and stay in Attached.SRC state when VCONN
807
+
* over-current happens
808
+
*/
809
+
{ .addr = TYPE_C_CFG,
810
+
.mask = FACTORY_MODE_DETECTION_EN_BIT | VCONN_OC_CFG_BIT,
811
+
.val = 0 },
812
+
/* Configure VBUS for software control */
813
+
{ .addr = OTG_CFG, .mask = OTG_EN_SRC_CFG_BIT, .val = 0 },
814
+
/*
815
+
* Use VBAT to determine the recharge threshold when battery is full
816
+
* rather than the state of charge.
817
+
*/
818
+
{ .addr = FG_UPDATE_CFG_2_SEL,
819
+
.mask = SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT |
820
+
VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT,
821
+
.val = VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT },
822
+
/* Enable charging */
823
+
{ .addr = USBIN_OPTIONS_1_CFG, .mask = HVDCP_EN_BIT, .val = 0 },
824
+
{ .addr = CHARGING_ENABLE_CMD,
825
+
.mask = CHARGING_ENABLE_CMD_BIT,
826
+
.val = CHARGING_ENABLE_CMD_BIT },
827
+
/*
828
+
* Match downstream defaults
829
+
* CHG_EN_SRC_BIT - charger enable is controlled by software
830
+
* CHG_EN_POLARITY_BIT - polarity of charge enable pin when in HW control
831
+
* pulled low on OnePlus 6 and SHIFT6mq
832
+
* PRETOFAST_TRANSITION_CFG_BIT -
833
+
* BAT_OV_ECC_BIT -
834
+
* I_TERM_BIT - Current termination ?? 0 = enabled
835
+
* AUTO_RECHG_BIT - Enable automatic recharge when battery is full
836
+
* 0 = enabled
837
+
* EN_ANALOG_DROP_IN_VBATT_BIT
838
+
* CHARGER_INHIBIT_BIT - Inhibit charging based on battery voltage
839
+
* instead of ??
840
+
*/
841
+
{ .addr = CHGR_CFG2,
842
+
.mask = CHG_EN_SRC_BIT | CHG_EN_POLARITY_BIT |
843
+
PRETOFAST_TRANSITION_CFG_BIT | BAT_OV_ECC_BIT | I_TERM_BIT |
844
+
AUTO_RECHG_BIT | EN_ANALOG_DROP_IN_VBATT_BIT |
845
+
CHARGER_INHIBIT_BIT,
846
+
.val = CHARGER_INHIBIT_BIT },
847
+
/* STAT pin software override, match downstream. Parallell charging? */
848
+
{ .addr = STAT_CFG,
849
+
.mask = STAT_SW_OVERRIDE_CFG_BIT,
850
+
.val = STAT_SW_OVERRIDE_CFG_BIT },
851
+
/* Set the default SDP charger type to a 500ma USB 2.0 port */
852
+
{ .addr = USBIN_ICL_OPTIONS,
853
+
.mask = USB51_MODE_BIT | USBIN_MODE_CHG_BIT,
854
+
.val = USB51_MODE_BIT },
855
+
/* Disable watchdog */
856
+
{ .addr = SNARL_BARK_BITE_WD_CFG, .mask = 0xff, .val = 0 },
857
+
{ .addr = WD_CFG,
858
+
.mask = WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT |
859
+
BARK_WDOG_INT_EN_BIT,
860
+
.val = 0 },
861
+
/* These bits aren't documented anywhere */
862
+
{ .addr = USBIN_5V_AICL_THRESHOLD_CFG,
863
+
.mask = USBIN_5V_AICL_THRESHOLD_CFG_MASK,
864
+
.val = 0x3 },
865
+
{ .addr = USBIN_CONT_AICL_THRESHOLD_CFG,
866
+
.mask = USBIN_CONT_AICL_THRESHOLD_CFG_MASK,
867
+
.val = 0x3 },
868
+
/*
869
+
* Enable Automatic Input Current Limit, this will slowly ramp up the current
870
+
* When connected to a wall charger, and automatically stop when it detects
871
+
* the charger current limit (voltage drop?) or it reaches the programmed limit.
872
+
*/
873
+
{ .addr = USBIN_AICL_OPTIONS_CFG,
874
+
.mask = USBIN_AICL_START_AT_MAX_BIT | USBIN_AICL_ADC_EN_BIT |
875
+
USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT |
876
+
USBIN_HV_COLLAPSE_RESPONSE_BIT |
877
+
USBIN_LV_COLLAPSE_RESPONSE_BIT,
878
+
.val = USBIN_HV_COLLAPSE_RESPONSE_BIT |
879
+
USBIN_LV_COLLAPSE_RESPONSE_BIT | USBIN_AICL_EN_BIT },
880
+
/*
881
+
* Set pre charge current to default, the OnePlus 6 bootloader
882
+
* sets this very conservatively.
883
+
*/
884
+
{ .addr = PRE_CHARGE_CURRENT_CFG,
885
+
.mask = PRE_CHARGE_CURRENT_SETTING_MASK,
886
+
.val = 500000 / CURRENT_SCALE_FACTOR },
887
+
/*
888
+
* This overrides all of the current limit options exposed to userspace
889
+
* and prevents the device from pulling more than ~1A. This is done
890
+
* to minimise potential fire hazard risks.
891
+
*/
892
+
{ .addr = FAST_CHARGE_CURRENT_CFG,
893
+
.mask = FAST_CHARGE_CURRENT_SETTING_MASK,
894
+
.val = 1000000 / CURRENT_SCALE_FACTOR },
895
+
};
896
+
897
+
static int smb2_init_hw(struct smb2_chip *chip)
898
+
{
899
+
int rc, i;
900
+
901
+
for (i = 0; i < ARRAY_SIZE(smb2_init_seq); i++) {
902
+
dev_dbg(chip->dev, "%d: Writing 0x%02x to 0x%02x\n", i,
903
+
smb2_init_seq[i].val, smb2_init_seq[i].addr);
904
+
rc = regmap_update_bits(chip->regmap,
905
+
chip->base + smb2_init_seq[i].addr,
906
+
smb2_init_seq[i].mask,
907
+
smb2_init_seq[i].val);
908
+
if (rc < 0)
909
+
return dev_err_probe(chip->dev, rc,
910
+
"%s: init command %d failed\n",
911
+
__func__, i);
912
+
}
913
+
914
+
return 0;
915
+
}
916
+
917
+
static int smb2_init_irq(struct smb2_chip *chip, int *irq, const char *name,
918
+
irqreturn_t (*handler)(int irq, void *data))
919
+
{
920
+
int irqnum;
921
+
int rc;
922
+
923
+
irqnum = platform_get_irq_byname(to_platform_device(chip->dev), name);
924
+
if (irqnum < 0)
925
+
return dev_err_probe(chip->dev, irqnum,
926
+
"Couldn't get irq %s byname\n", name);
927
+
928
+
rc = devm_request_threaded_irq(chip->dev, irqnum, NULL, handler,
929
+
IRQF_ONESHOT, name, chip);
930
+
if (rc < 0)
931
+
return dev_err_probe(chip->dev, rc, "Couldn't request irq %s\n",
932
+
name);
933
+
934
+
if (irq)
935
+
*irq = irqnum;
936
+
937
+
return 0;
938
+
}
939
+
940
+
static int smb2_probe(struct platform_device *pdev)
941
+
{
942
+
struct power_supply_config supply_config = {};
943
+
struct power_supply_desc *desc;
944
+
struct smb2_chip *chip;
945
+
int rc, irq;
946
+
947
+
chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
948
+
if (!chip)
949
+
return -ENOMEM;
950
+
951
+
chip->dev = &pdev->dev;
952
+
chip->name = pdev->name;
953
+
954
+
chip->regmap = dev_get_regmap(pdev->dev.parent, NULL);
955
+
if (!chip->regmap)
956
+
return dev_err_probe(chip->dev, -ENODEV,
957
+
"failed to locate the regmap\n");
958
+
959
+
rc = device_property_read_u32(chip->dev, "reg", &chip->base);
960
+
if (rc < 0)
961
+
return dev_err_probe(chip->dev, rc,
962
+
"Couldn't read base address\n");
963
+
964
+
chip->usb_in_v_chan = devm_iio_channel_get(chip->dev, "usbin_v");
965
+
if (IS_ERR(chip->usb_in_v_chan))
966
+
return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_v_chan),
967
+
"Couldn't get usbin_v IIO channel\n");
968
+
969
+
chip->usb_in_i_chan = devm_iio_channel_get(chip->dev, "usbin_i");
970
+
if (IS_ERR(chip->usb_in_i_chan)) {
971
+
return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_i_chan),
972
+
"Couldn't get usbin_i IIO channel\n");
973
+
}
974
+
975
+
rc = smb2_init_hw(chip);
976
+
if (rc < 0)
977
+
return rc;
978
+
979
+
supply_config.drv_data = chip;
980
+
supply_config.of_node = pdev->dev.of_node;
981
+
982
+
desc = devm_kzalloc(chip->dev, sizeof(smb2_psy_desc), GFP_KERNEL);
983
+
memcpy(desc, &smb2_psy_desc, sizeof(smb2_psy_desc));
984
+
desc->name =
985
+
devm_kasprintf(chip->dev, GFP_KERNEL, "%s-charger",
986
+
(const char *)device_get_match_data(chip->dev));
987
+
988
+
chip->chg_psy =
989
+
devm_power_supply_register(chip->dev, desc, &supply_config);
990
+
if (IS_ERR(chip->chg_psy))
991
+
return dev_err_probe(chip->dev, PTR_ERR(chip->chg_psy),
992
+
"failed to register power supply\n");
993
+
994
+
rc = power_supply_get_battery_info(chip->chg_psy, &chip->batt_info);
995
+
if (rc)
996
+
return dev_err_probe(chip->dev, rc,
997
+
"Failed to get battery info\n");
998
+
999
+
rc = devm_delayed_work_autocancel(chip->dev, &chip->status_change_work,
1000
+
smb2_status_change_work);
1001
+
if (rc)
1002
+
return dev_err_probe(chip->dev, rc,
1003
+
"Failed to init status change work\n");
1004
+
1005
+
rc = (chip->batt_info->voltage_max_design_uv - 3487500) / 7500 + 1;
1006
+
rc = regmap_update_bits(chip->regmap, chip->base + FLOAT_VOLTAGE_CFG,
1007
+
FLOAT_VOLTAGE_SETTING_MASK, rc);
1008
+
if (rc < 0)
1009
+
return dev_err_probe(chip->dev, rc, "Couldn't set vbat max\n");
1010
+
1011
+
rc = smb2_init_irq(chip, &irq, "bat-ov", smb2_handle_batt_overvoltage);
1012
+
if (rc < 0)
1013
+
return rc;
1014
+
1015
+
rc = smb2_init_irq(chip, &chip->cable_irq, "usb-plugin",
1016
+
smb2_handle_usb_plugin);
1017
+
if (rc < 0)
1018
+
return rc;
1019
+
1020
+
rc = smb2_init_irq(chip, &irq, "usbin-icl-change",
1021
+
smb2_handle_usb_icl_change);
1022
+
if (rc < 0)
1023
+
return rc;
1024
+
rc = smb2_init_irq(chip, &irq, "wdog-bark", smb2_handle_wdog_bark);
1025
+
if (rc < 0)
1026
+
return rc;
1027
+
1028
+
rc = dev_pm_set_wake_irq(chip->dev, chip->cable_irq);
1029
+
if (rc < 0)
1030
+
return dev_err_probe(chip->dev, rc, "Couldn't set wake irq\n");
1031
+
1032
+
platform_set_drvdata(pdev, chip);
1033
+
1034
+
/* Initialise charger state */
1035
+
schedule_delayed_work(&chip->status_change_work, 0);
1036
+
1037
+
return 0;
1038
+
}
1039
+
1040
+
static const struct of_device_id smb2_match_id_table[] = {
1041
+
{ .compatible = "qcom,pmi8998-charger", .data = "pmi8998" },
1042
+
{ .compatible = "qcom,pm660-charger", .data = "pm660" },
1043
+
{ /* sentinal */ }
1044
+
};
1045
+
MODULE_DEVICE_TABLE(of, smb2_match_id_table);
1046
+
1047
+
static struct platform_driver qcom_spmi_smb2 = {
1048
+
.probe = smb2_probe,
1049
+
.driver = {
1050
+
.name = "qcom-pmi8998/pm660-charger",
1051
+
.of_match_table = smb2_match_id_table,
1052
+
},
1053
+
};
1054
+
1055
+
module_platform_driver(qcom_spmi_smb2);
1056
+
1057
+
MODULE_AUTHOR("Caleb Connolly <caleb.connolly@linaro.org>");
1058
+
MODULE_DESCRIPTION("Qualcomm SMB2 Charger Driver");
1059
+
MODULE_LICENSE("GPL");
+1
-1
drivers/power/supply/rk817_charger.c
+1
-1
drivers/power/supply/rk817_charger.c
+1
-1
drivers/power/supply/rt5033_battery.c
+1
-1
drivers/power/supply/rt5033_battery.c
+1
-1
drivers/power/supply/rt9455_charger.c
+1
-1
drivers/power/supply/rt9455_charger.c
+2
-2
drivers/power/supply/rt9467-charger.c
+2
-2
drivers/power/supply/rt9467-charger.c
···
1192
1192
i2c_set_clientdata(i2c, data);
1193
1193
1194
1194
/* Default pull charge enable gpio to make 'CHG_EN' by SW control only */
1195
-
ceb_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_LOW);
1195
+
ceb_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH);
1196
1196
if (IS_ERR(ceb_gpio))
1197
1197
return dev_err_probe(dev, PTR_ERR(ceb_gpio),
1198
1198
"Failed to config charge enable gpio\n");
···
1272
1272
.name = "rt9467-charger",
1273
1273
.of_match_table = rt9467_charger_of_match_table,
1274
1274
},
1275
-
.probe_new = rt9467_charger_probe,
1275
+
.probe = rt9467_charger_probe,
1276
1276
};
1277
1277
module_i2c_driver(rt9467_charger_driver);
1278
1278
+1
-1
drivers/power/supply/rt9471.c
+1
-1
drivers/power/supply/rt9471.c
+1
-1
drivers/power/supply/sbs-battery.c
+1
-1
drivers/power/supply/sbs-battery.c
+1
-1
drivers/power/supply/sbs-charger.c
+1
-1
drivers/power/supply/sbs-charger.c
+1
-1
drivers/power/supply/sbs-manager.c
+1
-1
drivers/power/supply/sbs-manager.c
+1
-1
drivers/power/supply/smb347-charger.c
+1
-1
drivers/power/supply/smb347-charger.c
+1
-7
drivers/power/supply/twl4030_madc_battery.c
+1
-7
drivers/power/supply/twl4030_madc_battery.c
···
168
168
return 0;
169
169
}
170
170
171
-
static void twl4030_madc_bat_ext_changed(struct power_supply *psy)
172
-
{
173
-
power_supply_changed(psy);
174
-
}
175
-
176
171
static const struct power_supply_desc twl4030_madc_bat_desc = {
177
172
.name = "twl4030_battery",
178
173
.type = POWER_SUPPLY_TYPE_BATTERY,
179
174
.properties = twl4030_madc_bat_props,
180
175
.num_properties = ARRAY_SIZE(twl4030_madc_bat_props),
181
176
.get_property = twl4030_madc_bat_get_property,
182
-
.external_power_changed = twl4030_madc_bat_ext_changed,
183
-
177
+
.external_power_changed = power_supply_changed,
184
178
};
185
179
186
180
static int twl4030_cmp(const void *a, const void *b)
+1
-1
drivers/power/supply/ucs1002_power.c
+1
-1
drivers/power/supply/ucs1002_power.c