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gpu: nova-core: falcon: pad firmware DMA object size to required block alignment

Commit a88831502c8f ("gpu: nova-core: falcon: use dma::Coherent")
dropped the nova-local `DmaObject` device memory type for the
kernel-global `Coherent` one.

This switch had a side-effect: `DmaObject` always aligned the requested
size to `PAGE_SIZE`, and also reported that adjusted size when queried.
`Coherent`, on the other hand, does page-align allocation sizes but only
allows CPU access on the exact size provided by the caller.

This change runs into a limitation of falcon DMA copies, namely that DMA
accesses are done on blocks of exactly 256 bytes. If the provided data
does not have a length that is a multiple of 256, `dma_wr` returns
an error.

It was expected that all firmwares would present the proper adjusted
size, but this is not the case at least on my GA107:

NovaCore 0000:08:00.0: DMA transfer goes beyond range of DMA object
NovaCore 0000:08:00.0: Failed to load FWSEC firmware: EINVAL
NovaCore 0000:08:00.0: probe with driver NovaCore failed with error -22

Fix this by padding the `Coherent`'s size to `MEM_BLOCK_ALIGNMENT` (i.e.
256) when allocating it and filling it with zeroes, before copying the
firmware on top of it.

Fixes: a88831502c8f ("gpu: nova-core: falcon: use dma::Coherent")
Reviewed-by: John Hubbard <jhubbard@nvidia.com>
Reviewed-by: Gary Guo <gary@garyguo.net>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Link: https://patch.msgid.link/20260405-falcon-dma-roundup-v2-1-4af5b2ff9c16@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>

authored by

Alexandre Courbot and committed by
Danilo Krummrich 0e0ffbcd 8e6c3478

+19 -2
+19 -2
drivers/gpu/nova-core/falcon.rs
··· 11 11 }, 12 12 dma::{ 13 13 Coherent, 14 + CoherentBox, 14 15 DmaAddress, 15 16 DmaMask, // 16 17 }, ··· 614 613 bar: &Bar0, 615 614 fw: &F, 616 615 ) -> Result { 617 - // Create DMA object with firmware content as the source of the DMA engine. 618 - let dma_obj = Coherent::from_slice(dev, fw.as_slice(), GFP_KERNEL)?; 616 + // DMA object with firmware content as the source of the DMA engine. 617 + let dma_obj = { 618 + let fw_slice = fw.as_slice(); 619 + 620 + // DMA copies are done in chunks of `MEM_BLOCK_ALIGNMENT`, so pad the length 621 + // accordingly and fill with `0`. 622 + let mut dma_obj = CoherentBox::zeroed_slice( 623 + dev, 624 + fw_slice.len().next_multiple_of(MEM_BLOCK_ALIGNMENT), 625 + GFP_KERNEL, 626 + )?; 627 + 628 + // PANIC: `dma_obj` has been created with a length equal to or larger than 629 + // `fw_slice.len()`, so the range `..fw_slice.len()` is valid. 630 + dma_obj[..fw_slice.len()].copy_from_slice(fw_slice); 631 + 632 + dma_obj.into() 633 + }; 619 634 620 635 self.dma_reset(bar); 621 636 bar.update(regs::NV_PFALCON_FBIF_TRANSCFG::of::<E>().at(0), |v| {