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Merge branch 'mymerge' of ssh://ozlabs.org/home/sfr/kernel-sfr

+109 -180
+92 -44
include/asm-ppc/dma-mapping.h include/asm-powerpc/dma-mapping.h
··· 1 1 /* 2 - * This is based on both include/asm-sh/dma-mapping.h and 3 - * include/asm-ppc/pci.h 2 + * Copyright (C) 2004 IBM 3 + * 4 + * Implements the generic device dma API for powerpc. 5 + * the pci and vio busses 4 6 */ 5 - #ifndef __ASM_PPC_DMA_MAPPING_H 6 - #define __ASM_PPC_DMA_MAPPING_H 7 + #ifndef _ASM_DMA_MAPPING_H 8 + #define _ASM_DMA_MAPPING_H 7 9 8 10 #include <linux/config.h> 11 + #include <linux/types.h> 12 + #include <linux/cache.h> 9 13 /* need struct page definitions */ 10 14 #include <linux/mm.h> 11 15 #include <asm/scatterlist.h> 12 16 #include <asm/io.h> 17 + #include <asm/bug.h> 18 + 19 + #define DMA_ERROR_CODE (~(dma_addr_t)0x0) 13 20 14 21 #ifdef CONFIG_NOT_COHERENT_CACHE 15 22 /* ··· 31 24 extern void __dma_sync(void *vaddr, size_t size, int direction); 32 25 extern void __dma_sync_page(struct page *page, unsigned long offset, 33 26 size_t size, int direction); 34 - #define dma_cache_inv(_start,_size) \ 35 - invalidate_dcache_range(_start, (_start + _size)) 36 - #define dma_cache_wback(_start,_size) \ 37 - clean_dcache_range(_start, (_start + _size)) 38 - #define dma_cache_wback_inv(_start,_size) \ 39 - flush_dcache_range(_start, (_start + _size)) 40 27 41 28 #else /* ! CONFIG_NOT_COHERENT_CACHE */ 42 29 /* 43 30 * Cache coherent cores. 44 31 */ 45 - 46 - #define dma_cache_inv(_start,_size) do { } while (0) 47 - #define dma_cache_wback(_start,_size) do { } while (0) 48 - #define dma_cache_wback_inv(_start,_size) do { } while (0) 49 32 50 33 #define __dma_alloc_coherent(gfp, size, handle) NULL 51 34 #define __dma_free_coherent(size, addr) do { } while (0) ··· 43 46 #define __dma_sync_page(pg, off, sz, rw) do { } while (0) 44 47 45 48 #endif /* ! CONFIG_NOT_COHERENT_CACHE */ 49 + 50 + #ifdef CONFIG_PPC64 51 + 52 + extern int dma_supported(struct device *dev, u64 mask); 53 + extern int dma_set_mask(struct device *dev, u64 dma_mask); 54 + extern void *dma_alloc_coherent(struct device *dev, size_t size, 55 + dma_addr_t *dma_handle, gfp_t flag); 56 + extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 57 + dma_addr_t dma_handle); 58 + extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, 59 + size_t size, enum dma_data_direction direction); 60 + extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, 61 + size_t size, enum dma_data_direction direction); 62 + extern dma_addr_t dma_map_page(struct device *dev, struct page *page, 63 + unsigned long offset, size_t size, 64 + enum dma_data_direction direction); 65 + extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, 66 + size_t size, enum dma_data_direction direction); 67 + extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 68 + enum dma_data_direction direction); 69 + extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, 70 + int nhwentries, enum dma_data_direction direction); 71 + 72 + #else /* CONFIG_PPC64 */ 46 73 47 74 #define dma_supported(dev, mask) (1) 48 75 ··· 165 144 /* We don't do anything here. */ 166 145 #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) 167 146 168 - static inline void 169 - dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, 170 - size_t size, 171 - enum dma_data_direction direction) 147 + #endif /* CONFIG_PPC64 */ 148 + 149 + static inline void dma_sync_single_for_cpu(struct device *dev, 150 + dma_addr_t dma_handle, size_t size, 151 + enum dma_data_direction direction) 172 152 { 173 153 BUG_ON(direction == DMA_NONE); 174 - 175 154 __dma_sync(bus_to_virt(dma_handle), size, direction); 176 155 } 177 156 178 - static inline void 179 - dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, 180 - size_t size, 181 - enum dma_data_direction direction) 157 + static inline void dma_sync_single_for_device(struct device *dev, 158 + dma_addr_t dma_handle, size_t size, 159 + enum dma_data_direction direction) 182 160 { 183 161 BUG_ON(direction == DMA_NONE); 184 - 185 162 __dma_sync(bus_to_virt(dma_handle), size, direction); 186 163 } 187 164 188 - static inline void 189 - dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, 190 - enum dma_data_direction direction) 165 + static inline void dma_sync_sg_for_cpu(struct device *dev, 166 + struct scatterlist *sg, int nents, 167 + enum dma_data_direction direction) 191 168 { 192 169 int i; 193 170 ··· 195 176 __dma_sync_page(sg->page, sg->offset, sg->length, direction); 196 177 } 197 178 198 - static inline void 199 - dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, 200 - enum dma_data_direction direction) 179 + static inline void dma_sync_sg_for_device(struct device *dev, 180 + struct scatterlist *sg, int nents, 181 + enum dma_data_direction direction) 201 182 { 202 183 int i; 203 184 ··· 205 186 206 187 for (i = 0; i < nents; i++, sg++) 207 188 __dma_sync_page(sg->page, sg->offset, sg->length, direction); 189 + } 190 + 191 + static inline int dma_mapping_error(dma_addr_t dma_addr) 192 + { 193 + #ifdef CONFIG_PPC64 194 + return (dma_addr == DMA_ERROR_CODE); 195 + #else 196 + return 0; 197 + #endif 208 198 } 209 199 210 200 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) ··· 226 198 227 199 static inline int dma_get_cache_alignment(void) 228 200 { 201 + #ifdef CONFIG_PPC64 202 + /* no easy way to get cache size on all processors, so return 203 + * the maximum possible, to be safe */ 204 + return (1 << L1_CACHE_SHIFT_MAX); 205 + #else 229 206 /* 230 207 * Each processor family will define its own L1_CACHE_SHIFT, 231 208 * L1_CACHE_BYTES wraps to this, so this is always safe. 232 209 */ 233 210 return L1_CACHE_BYTES; 211 + #endif 234 212 } 235 213 236 - static inline void 237 - dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, 238 - unsigned long offset, size_t size, 239 - enum dma_data_direction direction) 214 + static inline void dma_sync_single_range_for_cpu(struct device *dev, 215 + dma_addr_t dma_handle, unsigned long offset, size_t size, 216 + enum dma_data_direction direction) 240 217 { 241 218 /* just sync everything for now */ 242 219 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); 243 220 } 244 221 245 - static inline void 246 - dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, 247 - unsigned long offset, size_t size, 248 - enum dma_data_direction direction) 222 + static inline void dma_sync_single_range_for_device(struct device *dev, 223 + dma_addr_t dma_handle, unsigned long offset, size_t size, 224 + enum dma_data_direction direction) 249 225 { 250 226 /* just sync everything for now */ 251 227 dma_sync_single_for_device(dev, dma_handle, offset + size, direction); 252 228 } 253 229 254 230 static inline void dma_cache_sync(void *vaddr, size_t size, 255 - enum dma_data_direction direction) 231 + enum dma_data_direction direction) 256 232 { 233 + BUG_ON(direction == DMA_NONE); 257 234 __dma_sync(vaddr, size, (int)direction); 258 235 } 259 236 260 - static inline int dma_mapping_error(dma_addr_t dma_addr) 261 - { 262 - return 0; 263 - } 237 + /* 238 + * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO 239 + */ 240 + struct dma_mapping_ops { 241 + void * (*alloc_coherent)(struct device *dev, size_t size, 242 + dma_addr_t *dma_handle, gfp_t flag); 243 + void (*free_coherent)(struct device *dev, size_t size, 244 + void *vaddr, dma_addr_t dma_handle); 245 + dma_addr_t (*map_single)(struct device *dev, void *ptr, 246 + size_t size, enum dma_data_direction direction); 247 + void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, 248 + size_t size, enum dma_data_direction direction); 249 + int (*map_sg)(struct device *dev, struct scatterlist *sg, 250 + int nents, enum dma_data_direction direction); 251 + void (*unmap_sg)(struct device *dev, struct scatterlist *sg, 252 + int nents, enum dma_data_direction direction); 253 + int (*dma_supported)(struct device *dev, u64 mask); 254 + int (*dac_dma_supported)(struct device *dev, u64 mask); 255 + }; 264 256 265 - #endif /* __ASM_PPC_DMA_MAPPING_H */ 257 + #endif /* _ASM_DMA_MAPPING_H */
+17
include/asm-ppc/io.h
··· 545 545 #include <asm/mpc8260_pci9.h> 546 546 #endif 547 547 548 + #ifdef CONFIG_NOT_COHERENT_CACHE 549 + 550 + #define dma_cache_inv(_start,_size) \ 551 + invalidate_dcache_range(_start, (_start + _size)) 552 + #define dma_cache_wback(_start,_size) \ 553 + clean_dcache_range(_start, (_start + _size)) 554 + #define dma_cache_wback_inv(_start,_size) \ 555 + flush_dcache_range(_start, (_start + _size)) 556 + 557 + #else 558 + 559 + #define dma_cache_inv(_start,_size) do { } while (0) 560 + #define dma_cache_wback(_start,_size) do { } while (0) 561 + #define dma_cache_wback_inv(_start,_size) do { } while (0) 562 + 563 + #endif 564 + 548 565 /* 549 566 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 550 567 * access
-136
include/asm-ppc64/dma-mapping.h
··· 1 - /* Copyright (C) 2004 IBM 2 - * 3 - * Implements the generic device dma API for ppc64. Handles 4 - * the pci and vio busses 5 - */ 6 - 7 - #ifndef _ASM_DMA_MAPPING_H 8 - #define _ASM_DMA_MAPPING_H 9 - 10 - #include <linux/types.h> 11 - #include <linux/cache.h> 12 - /* need struct page definitions */ 13 - #include <linux/mm.h> 14 - #include <asm/scatterlist.h> 15 - #include <asm/bug.h> 16 - 17 - #define DMA_ERROR_CODE (~(dma_addr_t)0x0) 18 - 19 - extern int dma_supported(struct device *dev, u64 mask); 20 - extern int dma_set_mask(struct device *dev, u64 dma_mask); 21 - extern void *dma_alloc_coherent(struct device *dev, size_t size, 22 - dma_addr_t *dma_handle, gfp_t flag); 23 - extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 24 - dma_addr_t dma_handle); 25 - extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, 26 - size_t size, enum dma_data_direction direction); 27 - extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, 28 - size_t size, enum dma_data_direction direction); 29 - extern dma_addr_t dma_map_page(struct device *dev, struct page *page, 30 - unsigned long offset, size_t size, 31 - enum dma_data_direction direction); 32 - extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, 33 - size_t size, enum dma_data_direction direction); 34 - extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 35 - enum dma_data_direction direction); 36 - extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, 37 - int nhwentries, enum dma_data_direction direction); 38 - 39 - static inline void 40 - dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, 41 - enum dma_data_direction direction) 42 - { 43 - BUG_ON(direction == DMA_NONE); 44 - /* nothing to do */ 45 - } 46 - 47 - static inline void 48 - dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, 49 - enum dma_data_direction direction) 50 - { 51 - BUG_ON(direction == DMA_NONE); 52 - /* nothing to do */ 53 - } 54 - 55 - static inline void 56 - dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, 57 - enum dma_data_direction direction) 58 - { 59 - BUG_ON(direction == DMA_NONE); 60 - /* nothing to do */ 61 - } 62 - 63 - static inline void 64 - dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, 65 - enum dma_data_direction direction) 66 - { 67 - BUG_ON(direction == DMA_NONE); 68 - /* nothing to do */ 69 - } 70 - 71 - static inline int dma_mapping_error(dma_addr_t dma_addr) 72 - { 73 - return (dma_addr == DMA_ERROR_CODE); 74 - } 75 - 76 - /* Now for the API extensions over the pci_ one */ 77 - 78 - #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 79 - #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 80 - #define dma_is_consistent(d) (1) 81 - 82 - static inline int 83 - dma_get_cache_alignment(void) 84 - { 85 - /* no easy way to get cache size on all processors, so return 86 - * the maximum possible, to be safe */ 87 - return (1 << L1_CACHE_SHIFT_MAX); 88 - } 89 - 90 - static inline void 91 - dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, 92 - unsigned long offset, size_t size, 93 - enum dma_data_direction direction) 94 - { 95 - BUG_ON(direction == DMA_NONE); 96 - /* nothing to do */ 97 - } 98 - 99 - static inline void 100 - dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, 101 - unsigned long offset, size_t size, 102 - enum dma_data_direction direction) 103 - { 104 - BUG_ON(direction == DMA_NONE); 105 - /* nothing to do */ 106 - } 107 - 108 - static inline void 109 - dma_cache_sync(void *vaddr, size_t size, 110 - enum dma_data_direction direction) 111 - { 112 - BUG_ON(direction == DMA_NONE); 113 - /* nothing to do */ 114 - } 115 - 116 - /* 117 - * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO 118 - */ 119 - struct dma_mapping_ops { 120 - void * (*alloc_coherent)(struct device *dev, size_t size, 121 - dma_addr_t *dma_handle, gfp_t flag); 122 - void (*free_coherent)(struct device *dev, size_t size, 123 - void *vaddr, dma_addr_t dma_handle); 124 - dma_addr_t (*map_single)(struct device *dev, void *ptr, 125 - size_t size, enum dma_data_direction direction); 126 - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, 127 - size_t size, enum dma_data_direction direction); 128 - int (*map_sg)(struct device *dev, struct scatterlist *sg, 129 - int nents, enum dma_data_direction direction); 130 - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, 131 - int nents, enum dma_data_direction direction); 132 - int (*dma_supported)(struct device *dev, u64 mask); 133 - int (*dac_dma_supported)(struct device *dev, u64 mask); 134 - }; 135 - 136 - #endif /* _ASM_DMA_MAPPING_H */