pmdomain: mediatek: Move ctl sequences out of power_on/off functions

In preparation to support power domains of new SoCs and the modem
power domains for both new and already supported chips, move the
generic control power sequences out of the scpsys_power_on() and
scpsys_power_off() and put them in new scpsys_ctl_pwrseq_on(),
scpsys_ctl_pewseq_off() functions.

Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

authored by

AngeloGioacchino Del Regno and committed by

Ulf Hansson 10 months ago 0e8e6b5f ad4bbdc5

+38 -19

1 changed file

expand all

drivers

pmdomain

mediatek

mtk-pm-domains.c

+38 -19

drivers/pmdomain/mediatek/mtk-pm-domains.c

··· 244 244 return supply ? regulator_disable(supply) : 0; 245 245 } 246 246 247 + static int scpsys_ctl_pwrseq_on(struct scpsys_domain *pd) 248 + { 249 + struct scpsys *scpsys = pd->scpsys; 250 + bool tmp; 251 + int ret; 252 + 253 + /* subsys power on */ 254 + regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); 255 + regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); 256 + 257 + /* wait until PWR_ACK = 1 */ 258 + ret = readx_poll_timeout(scpsys_domain_is_on, pd, tmp, tmp, MTK_POLL_DELAY_US, 259 + MTK_POLL_TIMEOUT); 260 + if (ret < 0) 261 + return ret; 262 + 263 + regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); 264 + regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); 265 + regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); 266 + 267 + return 0; 268 + } 269 + 270 + static void scpsys_ctl_pwrseq_off(struct scpsys_domain *pd) 271 + { 272 + struct scpsys *scpsys = pd->scpsys; 273 + 274 + /* subsys power off */ 275 + regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); 276 + regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); 277 + regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); 278 + regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); 279 + regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); 280 + } 281 + 247 282 static int scpsys_power_on(struct generic_pm_domain *genpd) 248 283 { 249 284 struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd); 250 285 struct scpsys *scpsys = pd->scpsys; 251 - bool tmp; 252 286 int ret; 253 287 254 288 ret = scpsys_regulator_enable(pd->supply); ··· 297 263 regmap_clear_bits(scpsys->base, pd->data->ext_buck_iso_offs, 298 264 pd->data->ext_buck_iso_mask); 299 265 300 - /* subsys power on */ 301 - regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); 302 - regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); 303 - 304 - /* wait until PWR_ACK = 1 */ 305 - ret = readx_poll_timeout(scpsys_domain_is_on, pd, tmp, tmp, MTK_POLL_DELAY_US, 306 - MTK_POLL_TIMEOUT); 307 - if (ret < 0) 266 + ret = scpsys_ctl_pwrseq_on(pd); 267 + if (ret) 308 268 goto err_pwr_ack; 309 - 310 - regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); 311 - regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); 312 - regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); 313 269 314 270 /* 315 271 * In few Mediatek platforms(e.g. MT6779), the bus protect policy is ··· 366 342 367 343 clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); 368 344 369 - /* subsys power off */ 370 - regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); 371 - regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); 372 - regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); 373 - regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); 374 - regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); 345 + scpsys_ctl_pwrseq_off(pd); 375 346 376 347 /* wait until PWR_ACK = 0 */ 377 348 ret = readx_poll_timeout(scpsys_domain_is_on, pd, tmp, !tmp, MTK_POLL_DELAY_US,

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