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PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to dw_pcie_rp::use_imsi_rx for clarity

The current "has_msi_ctrl" flag name is misleading because it suggests the
presence of any MSI controller, while it is specifically set for platforms
that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
device tree properties, indicating they rely on the iMSI-RX module for MSI
functionality.

Rename it to "use_imsi_rx" to make the intent clear:
- When true: Platform uses the iMSI-RX module for MSI handling
- When false: Platform has other MSI controller support (ITS/MBI, external
MSI controller)

No functional changes, only improves code readability and eliminates
naming confusion.

Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
[mani: renamed 'uses_imsi_rx' to 'use_imsi_rx' per https://lore.kernel.org/linux-pci/09f9acc1-d1ad-4971-8488-f0268cf08799@rock-chips.com]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/20260121-remove_cap_clean_up-v1-2-e78115e5d467@oss.qualcomm.com

authored by

Qiang Yu and committed by
Manivannan Sadhasivam 0ecd890e 8a214f64

+11 -11
+8 -8
drivers/pci/controller/dwc/pcie-designware-host.c
··· 255 255 u64 msi_target = (u64)pp->msi_data; 256 256 u32 ctrl, num_ctrls; 257 257 258 - if (!pci_msi_enabled() || !pp->has_msi_ctrl) 258 + if (!pci_msi_enabled() || !pp->use_imsi_rx) 259 259 return; 260 260 261 261 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; ··· 603 603 } 604 604 605 605 if (pci_msi_enabled()) { 606 - pp->has_msi_ctrl = !(pp->ops->msi_init || 606 + pp->use_imsi_rx = !(pp->ops->msi_init || 607 607 of_property_present(np, "msi-parent") || 608 608 of_property_present(np, "msi-map")); 609 609 610 610 /* 611 - * For the has_msi_ctrl case the default assignment is handled 611 + * For the use_imsi_rx case the default assignment is handled 612 612 * in the dw_pcie_msi_host_init(). 613 613 */ 614 - if (!pp->has_msi_ctrl && !pp->num_vectors) { 614 + if (!pp->use_imsi_rx && !pp->num_vectors) { 615 615 pp->num_vectors = MSI_DEF_NUM_VECTORS; 616 616 } else if (pp->num_vectors > MAX_MSI_IRQS) { 617 617 dev_err(dev, "Invalid number of vectors\n"); ··· 623 623 ret = pp->ops->msi_init(pp); 624 624 if (ret < 0) 625 625 goto err_deinit_host; 626 - } else if (pp->has_msi_ctrl) { 626 + } else if (pp->use_imsi_rx) { 627 627 ret = dw_pcie_msi_host_init(pp); 628 628 if (ret < 0) 629 629 goto err_deinit_host; ··· 701 701 dw_pcie_edma_remove(pci); 702 702 703 703 err_free_msi: 704 - if (pp->has_msi_ctrl) 704 + if (pp->use_imsi_rx) 705 705 dw_pcie_free_msi(pp); 706 706 707 707 err_deinit_host: ··· 729 729 730 730 dw_pcie_edma_remove(pci); 731 731 732 - if (pp->has_msi_ctrl) 732 + if (pp->use_imsi_rx) 733 733 dw_pcie_free_msi(pp); 734 734 735 735 if (pp->ops->deinit) ··· 1170 1170 * the MSI and MSI-X capabilities of the Root Port to allow the drivers 1171 1171 * to fall back to INTx instead. 1172 1172 */ 1173 - if (pp->has_msi_ctrl) { 1173 + if (pp->use_imsi_rx) { 1174 1174 dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI); 1175 1175 dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX); 1176 1176 }
+1 -1
drivers/pci/controller/dwc/pcie-designware.h
··· 416 416 }; 417 417 418 418 struct dw_pcie_rp { 419 - bool has_msi_ctrl:1; 419 + bool use_imsi_rx:1; 420 420 bool cfg0_io_shared:1; 421 421 u64 cfg0_base; 422 422 void __iomem *va_cfg0_base;
+2 -2
drivers/pci/controller/dwc/pcie-qcom.c
··· 1633 1633 { 1634 1634 struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr; 1635 1635 1636 - if (pp && pp->has_msi_ctrl) 1636 + if (pp && pp->use_imsi_rx) 1637 1637 dw_pcie_free_msi(pp); 1638 1638 } 1639 1639 ··· 1657 1657 if (ret) 1658 1658 return ret; 1659 1659 1660 - pp->has_msi_ctrl = true; 1660 + pp->use_imsi_rx = true; 1661 1661 dw_pcie_msi_init(pp); 1662 1662 1663 1663 return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);