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drm/amdgpu: Remove nbiov7.9 replay count reporting

Direct pcie replay count reporting is not available on nbio v7.9.
Reporting is done through firmware.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Fixes: 50709d18f4a6 ("drm/amdgpu: Add pci replay count to nbio v7.9")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Lijo Lazar and committed by
Alex Deucher
0f566f0e 196aefea

-20
-20
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
··· 31 31 32 32 #define NPS_MODE_MASK 0x000000FFL 33 33 34 - /* Core 0 Port 0 counter */ 35 - #define smnPCIEP_NAK_COUNTER 0x1A340218 36 - 37 34 static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev) 38 35 { 39 36 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, ··· 464 467 } 465 468 } 466 469 467 - static u64 nbio_v7_9_get_pcie_replay_count(struct amdgpu_device *adev) 468 - { 469 - u32 val, nak_r, nak_g; 470 - 471 - if (adev->flags & AMD_IS_APU) 472 - return 0; 473 - 474 - /* Get the number of NAKs received and generated */ 475 - val = RREG32_PCIE(smnPCIEP_NAK_COUNTER); 476 - nak_r = val & 0xFFFF; 477 - nak_g = val >> 16; 478 - 479 - /* Add the total number of NAKs, i.e the number of replays */ 480 - return (nak_r + nak_g); 481 - } 482 - 483 470 #define MMIO_REG_HOLE_OFFSET 0x1A000 484 471 485 472 static void nbio_v7_9_set_reg_remap(struct amdgpu_device *adev) ··· 505 524 .get_memory_partition_mode = nbio_v7_9_get_memory_partition_mode, 506 525 .is_nps_switch_requested = nbio_v7_9_is_nps_switch_requested, 507 526 .init_registers = nbio_v7_9_init_registers, 508 - .get_pcie_replay_count = nbio_v7_9_get_pcie_replay_count, 509 527 .set_reg_remap = nbio_v7_9_set_reg_remap, 510 528 }; 511 529