Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: amd: acp: Add ACP7.0 match entries for Cirrus
Merge series from Simon Trimmer <simont@opensource.cirrus.com>:
This patch series adds a number of ACP7.0 match table entries that are
being used in customer products.
Some of the configurations are very similar so the series begins with
renaming and sorting the existing structures so that the end result is
easier to manage.
+304
-48
+304
-48
sound/soc/amd/acp/amd-acp70-acpi-match.c
+304
-48
sound/soc/amd/acp/amd-acp70-acpi-match.c
···
187
187
},
188
188
};
189
189
190
-
static const struct snd_soc_acpi_adr_device cs42l43_0_adr[] = {
190
+
static const struct snd_soc_acpi_adr_device cs35l56x4_l1u3210_adr[] = {
191
+
{
192
+
.adr = 0x00013301FA355601ull,
193
+
.num_endpoints = 1,
194
+
.endpoints = &spk_l_endpoint,
195
+
.name_prefix = "AMP1"
196
+
},
197
+
{
198
+
.adr = 0x00013201FA355601ull,
199
+
.num_endpoints = 1,
200
+
.endpoints = &spk_r_endpoint,
201
+
.name_prefix = "AMP2"
202
+
},
203
+
{
204
+
.adr = 0x00013101FA355601ull,
205
+
.num_endpoints = 1,
206
+
.endpoints = &spk_2_endpoint,
207
+
.name_prefix = "AMP3"
208
+
},
209
+
{
210
+
.adr = 0x00013001FA355601ull,
211
+
.num_endpoints = 1,
212
+
.endpoints = &spk_3_endpoint,
213
+
.name_prefix = "AMP4"
214
+
},
215
+
};
216
+
217
+
static const struct snd_soc_acpi_adr_device cs35l63x2_l0u01_adr[] = {
218
+
{
219
+
.adr = 0x00003001FA356301ull,
220
+
.num_endpoints = 1,
221
+
.endpoints = &spk_l_endpoint,
222
+
.name_prefix = "AMP1"
223
+
},
224
+
{
225
+
.adr = 0x00003101FA356301ull,
226
+
.num_endpoints = 1,
227
+
.endpoints = &spk_r_endpoint,
228
+
.name_prefix = "AMP2"
229
+
},
230
+
};
231
+
232
+
static const struct snd_soc_acpi_adr_device cs35l63x2_l1u01_adr[] = {
233
+
{
234
+
.adr = 0x00013001FA356301ull,
235
+
.num_endpoints = 1,
236
+
.endpoints = &spk_l_endpoint,
237
+
.name_prefix = "AMP1"
238
+
},
239
+
{
240
+
.adr = 0x00013101FA356301ull,
241
+
.num_endpoints = 1,
242
+
.endpoints = &spk_r_endpoint,
243
+
.name_prefix = "AMP2"
244
+
},
245
+
};
246
+
247
+
static const struct snd_soc_acpi_adr_device cs35l63x2_l1u13_adr[] = {
248
+
{
249
+
.adr = 0x00013101FA356301ull,
250
+
.num_endpoints = 1,
251
+
.endpoints = &spk_l_endpoint,
252
+
.name_prefix = "AMP1"
253
+
},
254
+
{
255
+
.adr = 0x00013301FA356301ull,
256
+
.num_endpoints = 1,
257
+
.endpoints = &spk_r_endpoint,
258
+
.name_prefix = "AMP2"
259
+
},
260
+
};
261
+
262
+
static const struct snd_soc_acpi_adr_device cs35l63x4_l0u0246_adr[] = {
263
+
{
264
+
.adr = 0x00003001FA356301ull,
265
+
.num_endpoints = 1,
266
+
.endpoints = &spk_l_endpoint,
267
+
.name_prefix = "AMP1"
268
+
},
269
+
{
270
+
.adr = 0x00003201FA356301ull,
271
+
.num_endpoints = 1,
272
+
.endpoints = &spk_r_endpoint,
273
+
.name_prefix = "AMP2"
274
+
},
275
+
{
276
+
.adr = 0x00003401FA356301ull,
277
+
.num_endpoints = 1,
278
+
.endpoints = &spk_2_endpoint,
279
+
.name_prefix = "AMP3"
280
+
},
281
+
{
282
+
.adr = 0x00003601FA356301ull,
283
+
.num_endpoints = 1,
284
+
.endpoints = &spk_3_endpoint,
285
+
.name_prefix = "AMP4"
286
+
},
287
+
};
288
+
289
+
static const struct snd_soc_acpi_adr_device cs42l43_l0u0_adr[] = {
191
290
{
192
291
.adr = 0x00003001FA424301ull,
193
292
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints),
···
295
196
}
296
197
};
297
198
298
-
static const struct snd_soc_acpi_adr_device cs42l43_1_cs35l56x4_1_adr[] = {
199
+
static const struct snd_soc_acpi_adr_device cs42l43_l0u1_adr[] = {
200
+
{
201
+
.adr = 0x00003101FA424301ull,
202
+
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints),
203
+
.endpoints = cs42l43_endpoints,
204
+
.name_prefix = "cs42l43"
205
+
}
206
+
};
207
+
208
+
static const struct snd_soc_acpi_adr_device cs42l43b_l0u1_adr[] = {
209
+
{
210
+
.adr = 0x00003101FA2A3B01ull,
211
+
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints),
212
+
.endpoints = cs42l43_endpoints,
213
+
.name_prefix = "cs42l43"
214
+
}
215
+
};
216
+
217
+
static const struct snd_soc_acpi_adr_device cs42l43_l1u0_cs35l56x4_l1u0123_adr[] = {
299
218
{
300
219
.adr = 0x00013001FA424301ull,
301
220
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints),
···
346
229
},
347
230
};
348
231
349
-
static const struct snd_soc_acpi_adr_device cs35l56x4_1_adr[] = {
232
+
static const struct snd_soc_acpi_adr_device cs42l45_l0u0_adr[] = {
350
233
{
351
-
.adr = 0x00013301FA355601ull,
352
-
.num_endpoints = 1,
353
-
.endpoints = &spk_l_endpoint,
354
-
.name_prefix = "AMP1"
355
-
},
356
-
{
357
-
.adr = 0x00013201FA355601ull,
358
-
.num_endpoints = 1,
359
-
.endpoints = &spk_r_endpoint,
360
-
.name_prefix = "AMP2"
361
-
},
362
-
{
363
-
.adr = 0x00013101FA355601ull,
364
-
.num_endpoints = 1,
365
-
.endpoints = &spk_2_endpoint,
366
-
.name_prefix = "AMP3"
367
-
},
368
-
{
369
-
.adr = 0x00013001FA355601ull,
370
-
.num_endpoints = 1,
371
-
.endpoints = &spk_3_endpoint,
372
-
.name_prefix = "AMP4"
373
-
},
234
+
.adr = 0x00003001FA424501ull,
235
+
/* Re-use endpoints, but cs42l45 has no speaker */
236
+
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints) - 1,
237
+
.endpoints = cs42l43_endpoints,
238
+
.name_prefix = "cs42l45"
239
+
}
374
240
};
375
241
376
-
static const struct snd_soc_acpi_link_adr acp70_cs42l43_l1_cs35l56x4_l1[] = {
242
+
static const struct snd_soc_acpi_adr_device cs42l45_l1u0_adr[] = {
243
+
{
244
+
.adr = 0x00013001FA424501ull,
245
+
/* Re-use endpoints, but cs42l45 has no speaker */
246
+
.num_endpoints = ARRAY_SIZE(cs42l43_endpoints) - 1,
247
+
.endpoints = cs42l43_endpoints,
248
+
.name_prefix = "cs42l45"
249
+
}
250
+
};
251
+
252
+
static const struct snd_soc_acpi_link_adr acp70_cs35l56x4_l1u3210[] = {
377
253
{
378
254
.mask = BIT(1),
379
-
.num_adr = ARRAY_SIZE(cs42l43_1_cs35l56x4_1_adr),
380
-
.adr_d = cs42l43_1_cs35l56x4_1_adr,
255
+
.num_adr = ARRAY_SIZE(cs35l56x4_l1u3210_adr),
256
+
.adr_d = cs35l56x4_l1u3210_adr,
381
257
},
382
258
{}
383
259
};
384
260
385
-
static const struct snd_soc_acpi_link_adr acp70_cs42l43_l0_cs35l56x4_l1[] = {
261
+
static const struct snd_soc_acpi_link_adr acp70_cs35l63x4_l0u0246[] = {
386
262
{
387
263
.mask = BIT(0),
388
-
.num_adr = ARRAY_SIZE(cs42l43_0_adr),
389
-
.adr_d = cs42l43_0_adr,
390
-
},
391
-
{
392
-
.mask = BIT(1),
393
-
.num_adr = ARRAY_SIZE(cs35l56x4_1_adr),
394
-
.adr_d = cs35l56x4_1_adr,
264
+
.num_adr = ARRAY_SIZE(cs35l63x4_l0u0246_adr),
265
+
.adr_d = cs35l63x4_l0u0246_adr,
395
266
},
396
267
{}
397
268
};
398
269
399
-
static const struct snd_soc_acpi_link_adr acp70_cs35l56x4_l1[] = {
270
+
static const struct snd_soc_acpi_link_adr acp70_cs42l43_l0u1[] = {
271
+
{
272
+
.mask = BIT(0),
273
+
.num_adr = ARRAY_SIZE(cs42l43_l0u1_adr),
274
+
.adr_d = cs42l43_l0u1_adr,
275
+
},
276
+
{}
277
+
};
278
+
279
+
static const struct snd_soc_acpi_link_adr acp70_cs42l43b_l0u1[] = {
280
+
{
281
+
.mask = BIT(0),
282
+
.num_adr = ARRAY_SIZE(cs42l43b_l0u1_adr),
283
+
.adr_d = cs42l43b_l0u1_adr,
284
+
},
285
+
{}
286
+
};
287
+
288
+
static const struct snd_soc_acpi_link_adr acp70_cs42l43_l0u0_cs35l56x4_l1u3210[] = {
289
+
{
290
+
.mask = BIT(0),
291
+
.num_adr = ARRAY_SIZE(cs42l43_l0u0_adr),
292
+
.adr_d = cs42l43_l0u0_adr,
293
+
},
400
294
{
401
295
.mask = BIT(1),
402
-
.num_adr = ARRAY_SIZE(cs35l56x4_1_adr),
403
-
.adr_d = cs35l56x4_1_adr,
296
+
.num_adr = ARRAY_SIZE(cs35l56x4_l1u3210_adr),
297
+
.adr_d = cs35l56x4_l1u3210_adr,
298
+
},
299
+
{}
300
+
};
301
+
302
+
static const struct snd_soc_acpi_link_adr acp70_cs42l43_l1u0_cs35l56x4_l1u0123[] = {
303
+
{
304
+
.mask = BIT(1),
305
+
.num_adr = ARRAY_SIZE(cs42l43_l1u0_cs35l56x4_l1u0123_adr),
306
+
.adr_d = cs42l43_l1u0_cs35l56x4_l1u0123_adr,
307
+
},
308
+
{}
309
+
};
310
+
311
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l0u0[] = {
312
+
{
313
+
.mask = BIT(0),
314
+
.num_adr = ARRAY_SIZE(cs42l45_l0u0_adr),
315
+
.adr_d = cs42l45_l0u0_adr,
316
+
},
317
+
{}
318
+
};
319
+
320
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l0u0_cs35l63x2_l1u01[] = {
321
+
{
322
+
.mask = BIT(0),
323
+
.num_adr = ARRAY_SIZE(cs42l45_l0u0_adr),
324
+
.adr_d = cs42l45_l0u0_adr,
325
+
},
326
+
{
327
+
.mask = BIT(1),
328
+
.num_adr = ARRAY_SIZE(cs35l63x2_l1u01_adr),
329
+
.adr_d = cs35l63x2_l1u01_adr,
330
+
},
331
+
{}
332
+
};
333
+
334
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l0u0_cs35l63x2_l1u13[] = {
335
+
{
336
+
.mask = BIT(0),
337
+
.num_adr = ARRAY_SIZE(cs42l45_l0u0_adr),
338
+
.adr_d = cs42l45_l0u0_adr,
339
+
},
340
+
{
341
+
.mask = BIT(1),
342
+
.num_adr = ARRAY_SIZE(cs35l63x2_l1u13_adr),
343
+
.adr_d = cs35l63x2_l1u13_adr,
344
+
},
345
+
{}
346
+
};
347
+
348
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l1u0[] = {
349
+
{
350
+
.mask = BIT(1),
351
+
.num_adr = ARRAY_SIZE(cs42l45_l1u0_adr),
352
+
.adr_d = cs42l45_l1u0_adr,
353
+
},
354
+
{}
355
+
};
356
+
357
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l1u0_cs35l63x2_l0u01[] = {
358
+
{
359
+
.mask = BIT(1),
360
+
.num_adr = ARRAY_SIZE(cs42l45_l1u0_adr),
361
+
.adr_d = cs42l45_l1u0_adr,
362
+
},
363
+
{
364
+
.mask = BIT(0),
365
+
.num_adr = ARRAY_SIZE(cs35l63x2_l0u01_adr),
366
+
.adr_d = cs35l63x2_l0u01_adr,
367
+
},
368
+
{}
369
+
};
370
+
371
+
static const struct snd_soc_acpi_link_adr acp70_cs42l45_l1u0_cs35l63x4_l0u0246[] = {
372
+
{
373
+
.mask = BIT(1),
374
+
.num_adr = ARRAY_SIZE(cs42l45_l1u0_adr),
375
+
.adr_d = cs42l45_l1u0_adr,
376
+
},
377
+
{
378
+
.mask = BIT(0),
379
+
.num_adr = ARRAY_SIZE(cs35l63x4_l0u0246_adr),
380
+
.adr_d = cs35l63x4_l0u0246_adr,
404
381
},
405
382
{}
406
383
};
···
538
327
.drv_name = "amd_sdw",
539
328
},
540
329
{
541
-
.link_mask = BIT(0),
542
-
.links = acp70_rt722_only,
543
-
.drv_name = "amd_sdw",
544
-
},
545
-
{
546
330
.link_mask = BIT(0) | BIT(1),
547
331
.links = acp70_4_in_1_sdca,
548
332
.drv_name = "amd_sdw",
549
333
},
550
334
{
551
335
.link_mask = BIT(0) | BIT(1),
552
-
.links = acp70_cs42l43_l0_cs35l56x4_l1,
336
+
.links = acp70_cs42l43_l0u0_cs35l56x4_l1u3210,
337
+
.drv_name = "amd_sdw",
338
+
},
339
+
{
340
+
.link_mask = BIT(0) | BIT(1),
341
+
.links = acp70_cs42l45_l1u0_cs35l63x4_l0u0246,
342
+
.drv_name = "amd_sdw",
343
+
},
344
+
{
345
+
.link_mask = BIT(0) | BIT(1),
346
+
.links = acp70_cs42l45_l0u0_cs35l63x2_l1u01,
347
+
.drv_name = "amd_sdw",
348
+
},
349
+
{
350
+
.link_mask = BIT(0) | BIT(1),
351
+
.links = acp70_cs42l45_l0u0_cs35l63x2_l1u13,
352
+
.drv_name = "amd_sdw",
353
+
},
354
+
{
355
+
.link_mask = BIT(0) | BIT(1),
356
+
.links = acp70_cs42l45_l1u0_cs35l63x2_l0u01,
553
357
.drv_name = "amd_sdw",
554
358
},
555
359
{
556
360
.link_mask = BIT(1),
557
-
.links = acp70_cs42l43_l1_cs35l56x4_l1,
361
+
.links = acp70_cs42l43_l1u0_cs35l56x4_l1u0123,
558
362
.drv_name = "amd_sdw",
559
363
},
560
364
{
561
365
.link_mask = BIT(1),
562
-
.links = acp70_cs35l56x4_l1,
366
+
.links = acp70_cs35l56x4_l1u3210,
367
+
.drv_name = "amd_sdw",
368
+
},
369
+
{
370
+
.link_mask = BIT(0),
371
+
.links = acp70_cs35l63x4_l0u0246,
372
+
.drv_name = "amd_sdw",
373
+
},
374
+
{
375
+
.link_mask = BIT(0),
376
+
.links = acp70_rt722_only,
377
+
.drv_name = "amd_sdw",
378
+
},
379
+
{
380
+
.link_mask = BIT(0),
381
+
.links = acp70_cs42l43_l0u1,
382
+
.drv_name = "amd_sdw",
383
+
},
384
+
{
385
+
.link_mask = BIT(0),
386
+
.links = acp70_cs42l43b_l0u1,
387
+
.drv_name = "amd_sdw",
388
+
},
389
+
{
390
+
.link_mask = BIT(0),
391
+
.links = acp70_cs42l45_l0u0,
392
+
.drv_name = "amd_sdw",
393
+
},
394
+
{
395
+
.link_mask = BIT(1),
396
+
.links = acp70_cs42l45_l1u0,
563
397
.drv_name = "amd_sdw",
564
398
},
565
399
{