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Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt

Allwinner device tree changes for 6.16

Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1

Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.

Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100

Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)

Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)

Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6

* tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
arm64: dts: allwinner: a100: add Liontron H-A133L board support
dt-bindings: arm: sunxi: Add Liontron H-A133L board name
dt-bindings: vendor-prefixes: Add Liontron name
ARM: dts: bananapi: add support for PHY LEDs
arm64: dts: allwinner: a100: set maximum MMC frequency
arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board
arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board
arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC
dt-bindings: sram: sunxi-sram: Add A523 compatible
arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard
arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64
arm64: dts: allwinner: correct the model name for Radxa Cubie A5E
ARM: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: h616: enable Mali GPU for all boards
arm64: dts: allwinner: h616: Add Mali GPU node
arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX
arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
arm/arm64: dts: allwinner: Use preferred node names for cooling maps
arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
...

Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+2180 -17
+25
Documentation/devicetree/bindings/arm/sunxi.yaml
··· 492 492 - const: lamobo,lamobo-r1 493 493 - const: allwinner,sun7i-a20 494 494 495 + - description: Liontron H-A133L 496 + items: 497 + - const: liontron,h-a133l 498 + - const: allwinner,sun50i-a100 499 + 495 500 - description: HAOYU Electronics Marsboard A10 496 501 items: 497 502 - const: haoyu,a10-marsboard ··· 850 845 - const: allwinner,r7-tv-dongle 851 846 - const: allwinner,sun5i-a10s 852 847 848 + - description: Radxa Cubie A5E 849 + items: 850 + - const: radxa,cubie-a5e 851 + - const: allwinner,sun55i-a527 852 + 853 853 - description: Remix Mini PC 854 854 items: 855 855 - const: jide,remix-mini-pc ··· 976 966 - const: hechuang,x96-mate 977 967 - const: allwinner,sun50i-h616 978 968 969 + - description: X96Q Pro+ 970 + items: 971 + - const: amediatech,x96q-pro-plus 972 + - const: allwinner,sun55i-h728 973 + 979 974 - description: Xunlong OrangePi 980 975 items: 981 976 - const: xunlong,orangepi ··· 1094 1079 - description: Xunlong OrangePi Zero 3 1095 1080 items: 1096 1081 - const: xunlong,orangepi-zero3 1082 + - const: allwinner,sun50i-h618 1083 + 1084 + - description: YuzukiHD Avaota A1 1085 + items: 1086 + - const: yuzukihd,avaota-a1 1087 + - const: allwinner,sun55i-t527 1088 + 1089 + - description: YuzukiHD Chameleon 1090 + items: 1091 + - const: yuzukihd,chameleon 1097 1092 - const: allwinner,sun50i-h618 1098 1093 1099 1094 additionalProperties: true
+1
Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
··· 50 50 - enum: 51 51 - allwinner,sun50i-a100-system-control 52 52 - allwinner,sun50i-h6-system-control 53 + - allwinner,sun55i-a523-system-control 53 54 - const: allwinner,sun50i-a64-system-control 54 55 55 56 reg:
+4
Documentation/devicetree/bindings/vendor-prefixes.yaml
··· 864 864 description: Linux-specific binding 865 865 "^linx,.*": 866 866 description: Linx Technologies 867 + "^liontron,.*": 868 + description: Shenzhen Liontron Technology Co., Ltd 867 869 "^liteon,.*": 868 870 description: LITE-ON Technology Corp. 869 871 "^litex,.*": ··· 1757 1755 description: Y Soft Corporation a.s. 1758 1756 "^yuridenki,.*": 1759 1757 description: Yuridenki-Shokai Co. Ltd. 1758 + "^yuzukihd,.*": 1759 + description: YuzukiHD Open Source Hardware 1760 1760 "^zarlink,.*": 1761 1761 description: Zarlink Semiconductor 1762 1762 "^zealz,.*":
+27
arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts
··· 48 48 49 49 #include <dt-bindings/gpio/gpio.h> 50 50 #include <dt-bindings/interrupt-controller/irq.h> 51 + #include <dt-bindings/leds/common.h> 51 52 52 53 / { 53 54 model = "LeMaker Banana Pi"; ··· 170 169 &gmac_mdio { 171 170 phy1: ethernet-phy@1 { 172 171 reg = <1>; 172 + 173 + leds { 174 + #address-cells = <1>; 175 + #size-cells = <0>; 176 + 177 + led@0 { 178 + reg = <0>; 179 + color = <LED_COLOR_ID_GREEN>; 180 + function = LED_FUNCTION_LAN; 181 + linux,default-trigger = "netdev"; 182 + }; 183 + 184 + led@1 { 185 + reg = <1>; 186 + color = <LED_COLOR_ID_AMBER>; 187 + function = LED_FUNCTION_LAN; 188 + linux,default-trigger = "netdev"; 189 + }; 190 + 191 + led@2 { 192 + reg = <2>; 193 + color = <LED_COLOR_ID_BLUE>; 194 + function = LED_FUNCTION_LAN; 195 + linux,default-trigger = "netdev"; 196 + }; 197 + }; 173 198 }; 174 199 }; 175 200
+2 -2
arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
··· 1225 1225 }; 1226 1226 1227 1227 cooling-maps { 1228 - cpu-hot-limit { 1228 + map0 { 1229 1229 trip = <&cpu0_hot>; 1230 1230 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 1231 1231 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ··· 1255 1255 }; 1256 1256 1257 1257 cooling-maps { 1258 - cpu-hot-limit { 1258 + map0 { 1259 1259 trip = <&cpu1_hot>; 1260 1260 cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 1261 1261 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+1 -1
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
··· 94 94 non-removable; 95 95 status = "okay"; 96 96 97 - brcmf: bcrmf@1 { 97 + brcmf: wifi@1 { 98 98 reg = <1>; 99 99 compatible = "brcm,bcm4329-fmac"; 100 100 interrupt-parent = <&pio>;
+1 -1
arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
··· 262 262 }; 263 263 264 264 cooling-maps { 265 - cpu-hot-limit { 265 + map0 { 266 266 trip = <&cpu_hot_trip>; 267 267 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 268 268 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+1 -1
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
··· 146 146 }; 147 147 148 148 cooling-maps { 149 - cpu-hot-limit { 149 + map0 { 150 150 trip = <&cpu_hot_trip>; 151 151 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 152 152 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+5
arch/arm64/boot/dts/allwinner/Makefile
··· 18 18 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb 19 19 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h64-remix-mini-pc.dtb 20 20 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb 21 + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a133-liontron-h-a133l.dtb 21 22 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb 22 23 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb 23 24 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb ··· 49 48 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb 50 49 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb 51 50 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb 51 + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-yuzukihd-chameleon.dtb 52 52 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb 53 53 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb 54 54 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb 55 55 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb 56 + dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb 57 + dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb 58 + dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
+3
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
··· 252 252 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 253 253 pinctrl-names = "default"; 254 254 pinctrl-0 = <&mmc0_pins>; 255 + max-frequency = <150000000>; 255 256 status = "disabled"; 256 257 #address-cells = <1>; 257 258 #size-cells = <0>; ··· 268 267 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 269 268 pinctrl-names = "default"; 270 269 pinctrl-0 = <&mmc1_pins>; 270 + max-frequency = <150000000>; 271 271 status = "disabled"; 272 272 #address-cells = <1>; 273 273 #size-cells = <0>; ··· 284 282 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 285 283 pinctrl-names = "default"; 286 284 pinctrl-0 = <&mmc2_pins>; 285 + max-frequency = <150000000>; 287 286 status = "disabled"; 288 287 #address-cells = <1>; 289 288 #size-cells = <0>;
+211
arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2025 Arm Ltd. 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "sun50i-a100.dtsi" 9 + #include "sun50i-a100-cpu-opp.dtsi" 10 + 11 + #include <dt-bindings/gpio/gpio.h> 12 + #include <dt-bindings/leds/common.h> 13 + 14 + /{ 15 + model = "Liontron H-A133L"; 16 + compatible = "liontron,h-a133l", "allwinner,sun50i-a100"; 17 + 18 + aliases { 19 + serial0 = &uart0; 20 + }; 21 + 22 + chosen { 23 + stdout-path = "serial0:115200n8"; 24 + }; 25 + 26 + leds { 27 + compatible = "gpio-leds"; 28 + 29 + led { 30 + function = LED_FUNCTION_POWER; 31 + color = <LED_COLOR_ID_BLUE>; 32 + gpios = <&pio 7 16 GPIO_ACTIVE_LOW>; /* PH16 */ 33 + }; 34 + }; 35 + 36 + reg_vcc5v: vcc5v { 37 + /* board wide 5V supply from a 12V->5V regulator */ 38 + compatible = "regulator-fixed"; 39 + regulator-name = "vcc-5v"; 40 + regulator-min-microvolt = <5000000>; 41 + regulator-max-microvolt = <5000000>; 42 + regulator-always-on; 43 + }; 44 + 45 + reg_usb1_vbus: regulator-usb1-vbus { 46 + compatible = "regulator-fixed"; 47 + regulator-name = "usb1-vbus"; 48 + regulator-min-microvolt = <5000000>; 49 + regulator-max-microvolt = <5000000>; 50 + vin-supply = <&reg_vcc5v>; 51 + enable-active-high; 52 + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ 53 + }; 54 + }; 55 + 56 + &cpu0 { 57 + cpu-supply = <&reg_dcdc2>; 58 + }; 59 + 60 + &ehci0 { 61 + status = "okay"; 62 + }; 63 + 64 + &ehci1 { 65 + status = "okay"; 66 + }; 67 + 68 + &mmc0 { 69 + vmmc-supply = <&reg_dcdc1>; 70 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 71 + bus-width = <4>; 72 + status = "okay"; 73 + }; 74 + 75 + &mmc2 { 76 + vmmc-supply = <&reg_dcdc1>; 77 + vqmmc-supply = <&reg_eldo1>; 78 + cap-mmc-hw-reset; 79 + non-removable; 80 + bus-width = <8>; 81 + mmc-ddr-1_8v; 82 + mmc-hs200-1_8v; 83 + status = "okay"; 84 + }; 85 + 86 + &ohci0 { 87 + status = "okay"; 88 + }; 89 + 90 + &ohci1 { 91 + status = "okay"; 92 + }; 93 + 94 + &pio { 95 + vcc-pb-supply = <&reg_dcdc1>; 96 + vcc-pc-supply = <&reg_eldo1>; 97 + vcc-pf-supply = <&reg_dcdc1>; 98 + vcc-ph-supply = <&reg_dcdc1>; 99 + }; 100 + 101 + &r_i2c0 { 102 + status = "okay"; 103 + 104 + axp803: pmic@34 { 105 + compatible = "x-powers,axp803"; 106 + reg = <0x34>; 107 + interrupt-parent = <&r_intc>; 108 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 109 + }; 110 + }; 111 + 112 + #include "axp803.dtsi" 113 + 114 + &ac_power_supply { 115 + status = "okay"; 116 + }; 117 + 118 + &reg_aldo1 { 119 + regulator-always-on; 120 + regulator-min-microvolt = <1800000>; 121 + regulator-max-microvolt = <1800000>; 122 + regulator-name = "vcc-codec-avcc"; 123 + }; 124 + 125 + &reg_aldo2 { 126 + regulator-always-on; 127 + regulator-min-microvolt = <1800000>; 128 + regulator-max-microvolt = <1800000>; 129 + regulator-name = "vcc-dram-1"; 130 + }; 131 + 132 + &reg_aldo3 { 133 + regulator-always-on; 134 + regulator-min-microvolt = <3300000>; 135 + regulator-max-microvolt = <3300000>; 136 + regulator-name = "vcc-usb-pl"; 137 + }; 138 + 139 + &reg_dcdc1 { 140 + regulator-always-on; 141 + regulator-min-microvolt = <3300000>; 142 + regulator-max-microvolt = <3300000>; 143 + regulator-name = "vcc-io-usb-pd-emmc"; 144 + }; 145 + 146 + &reg_dcdc2 { 147 + regulator-always-on; 148 + regulator-min-microvolt = <810000>; 149 + regulator-max-microvolt = <1200000>; 150 + regulator-name = "vdd-cpux"; 151 + }; 152 + 153 + &reg_dcdc3 { 154 + regulator-always-on; 155 + regulator-min-microvolt = <900000>; 156 + regulator-max-microvolt = <900000>; 157 + regulator-name = "vdd-usb-cpus"; 158 + }; 159 + 160 + &reg_dcdc4 { 161 + regulator-always-on; 162 + regulator-min-microvolt = <950000>; 163 + regulator-max-microvolt = <950000>; 164 + regulator-name = "vdd-sys"; 165 + }; 166 + 167 + &reg_dcdc5 { 168 + regulator-always-on; 169 + regulator-min-microvolt = <1100000>; 170 + regulator-max-microvolt = <1100000>; 171 + regulator-name = "vcc-dram"; 172 + }; 173 + 174 + /* DCDC6 unused */ 175 + /* DLDO3 unused */ 176 + /* DLDO4 unused */ 177 + 178 + &reg_eldo1 { 179 + regulator-min-microvolt = <1800000>; 180 + regulator-max-microvolt = <1800000>; 181 + regulator-name = "vcc-pc-emmc"; 182 + }; 183 + 184 + /* ELDO2 unused */ 185 + /* ELDO3 unused */ 186 + 187 + &reg_fldo1 { 188 + regulator-always-on; 189 + regulator-min-microvolt = <900000>; 190 + regulator-max-microvolt = <900000>; 191 + regulator-name = "vdd-cpus-usb"; 192 + }; 193 + 194 + /* reg_drivevbus unused */ 195 + /* dc1sw unused */ 196 + 197 + &uart0 { 198 + pinctrl-names = "default"; 199 + pinctrl-0 = <&uart0_pb_pins>; 200 + status = "okay"; 201 + }; 202 + 203 + &usb_otg { 204 + dr_mode = "host"; /* USB A type receptacle, always powered */ 205 + status = "okay"; 206 + }; 207 + 208 + &usbphy { 209 + usb1_vbus-supply = <&reg_usb1_vbus>; 210 + status = "okay"; 211 + };
+12
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
··· 124 124 status = "okay"; 125 125 }; 126 126 127 + /* On Wifi/BT connector */ 128 + &mmc1 { 129 + pinctrl-names = "default"; 130 + pinctrl-0 = <&mmc1_pins>; 131 + vmmc-supply = <&reg_dldo4>; 132 + vqmmc-supply = <&reg_eldo1>; 133 + bus-width = <4>; 134 + non-removable; 135 + status = "disabled"; 136 + }; 137 + 127 138 &ohci0 { 128 139 status = "okay"; 129 140 }; ··· 297 286 &uart1 { 298 287 pinctrl-names = "default"; 299 288 pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 289 + uart-has-rtscts; 300 290 status = "disabled"; 301 291 }; 302 292
+19
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
··· 103 103 }; 104 104 }; 105 105 106 + /* On Wifi/BT connector */ 107 + &mmc1 { 108 + pinctrl-names = "default"; 109 + pinctrl-0 = <&mmc1_pins>; 110 + vmmc-supply = <&reg_dldo4>; 111 + vqmmc-supply = <&reg_eldo1>; 112 + bus-width = <4>; 113 + non-removable; 114 + status = "disabled"; 115 + }; 116 + 106 117 &mmc2 { 107 118 pinctrl-names = "default"; 108 119 pinctrl-0 = <&mmc2_pins>; ··· 184 173 pinctrl-names = "default"; 185 174 pinctrl-0 = <&uart0_pb_pins>; 186 175 status = "okay"; 176 + }; 177 + 178 + /* On Wifi/BT connector, with RTS/CTS */ 179 + &uart1 { 180 + pinctrl-names = "default"; 181 + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 182 + uart-has-rtscts; 183 + status = "disabled"; 187 184 }; 188 185 189 186 /* On Pi-2 connector */
+5
arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts
··· 79 79 status = "okay"; 80 80 }; 81 81 82 + &gpu { 83 + mali-supply = <&reg_dcdc1>; 84 + status = "okay"; 85 + }; 86 + 82 87 &ir { 83 88 status = "okay"; 84 89 };
+1 -5
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
··· 16 16 reg = <0>; 17 17 enable-method = "psci"; 18 18 clocks = <&ccu CLK_CPUX>; 19 - clock-latency-ns = <244144>; /* 8 32k periods */ 20 19 #cooling-cells = <2>; 21 20 }; 22 21 ··· 25 26 reg = <1>; 26 27 enable-method = "psci"; 27 28 clocks = <&ccu CLK_CPUX>; 28 - clock-latency-ns = <244144>; /* 8 32k periods */ 29 29 #cooling-cells = <2>; 30 30 }; 31 31 ··· 34 36 reg = <2>; 35 37 enable-method = "psci"; 36 38 clocks = <&ccu CLK_CPUX>; 37 - clock-latency-ns = <244144>; /* 8 32k periods */ 38 39 #cooling-cells = <2>; 39 40 }; 40 41 ··· 43 46 reg = <3>; 44 47 enable-method = "psci"; 45 48 clocks = <&ccu CLK_CPUX>; 46 - clock-latency-ns = <244144>; /* 8 32k periods */ 47 49 #cooling-cells = <2>; 48 50 }; 49 51 }; ··· 203 207 }; 204 208 205 209 cooling-maps { 206 - cpu-hot-limit { 210 + map0 { 207 211 trip = <&cpu_hot_trip>; 208 212 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 209 213 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
··· 144 144 non-removable; 145 145 status = "okay"; 146 146 147 - brcm: sdio-wifi@1 { 147 + brcm: wifi@1 { 148 148 reg = <1>; 149 149 compatible = "brcm,bcm4329-fmac"; 150 150 interrupt-parent = <&r_pio>;
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
··· 28 28 non-removable; 29 29 status = "okay"; 30 30 31 - brcm: sdio-wifi@1 { 31 + brcm: wifi@1 { 32 32 reg = <1>; 33 33 compatible = "brcm,bcm4329-fmac"; 34 34 interrupt-parent = <&r_pio>;
-4
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
··· 27 27 reg = <0>; 28 28 enable-method = "psci"; 29 29 clocks = <&ccu CLK_CPUX>; 30 - clock-latency-ns = <244144>; /* 8 32k periods */ 31 30 #cooling-cells = <2>; 32 31 i-cache-size = <0x8000>; 33 32 i-cache-line-size = <64>; ··· 43 44 reg = <1>; 44 45 enable-method = "psci"; 45 46 clocks = <&ccu CLK_CPUX>; 46 - clock-latency-ns = <244144>; /* 8 32k periods */ 47 47 #cooling-cells = <2>; 48 48 i-cache-size = <0x8000>; 49 49 i-cache-line-size = <64>; ··· 59 61 reg = <2>; 60 62 enable-method = "psci"; 61 63 clocks = <&ccu CLK_CPUX>; 62 - clock-latency-ns = <244144>; /* 8 32k periods */ 63 64 #cooling-cells = <2>; 64 65 i-cache-size = <0x8000>; 65 66 i-cache-line-size = <64>; ··· 75 78 reg = <3>; 76 79 enable-method = "psci"; 77 80 clocks = <&ccu CLK_CPUX>; 78 - clock-latency-ns = <244144>; /* 8 32k periods */ 79 81 #cooling-cells = <2>; 80 82 i-cache-size = <0x8000>; 81 83 i-cache-line-size = <64>;
+5
arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
··· 67 67 cpu-supply = <&reg_dcdc2>; 68 68 }; 69 69 70 + &gpu { 71 + mali-supply = <&reg_dcdc1>; 72 + status = "okay"; 73 + }; 74 + 70 75 &mmc0 { 71 76 vmmc-supply = <&reg_dldo1>; 72 77 /* Card detection pin is not connected */
+4
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
··· 77 77 status = "okay"; 78 78 }; 79 79 80 + &gpu { 81 + status = "okay"; 82 + }; 83 + 80 84 &mdio0 { 81 85 ext_rgmii_phy: ethernet-phy@1 { 82 86 compatible = "ethernet-phy-ieee802.3-c22";
+4
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
··· 24 24 phy-supply = <&reg_dcdce>; 25 25 }; 26 26 27 + &gpu { 28 + mali-supply = <&reg_dcdcc>; 29 + }; 30 + 27 31 &mmc0 { 28 32 vmmc-supply = <&reg_dcdce>; 29 33 };
+5
arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
··· 50 50 status = "okay"; 51 51 }; 52 52 53 + &gpu { 54 + mali-supply = <&reg_dcdcc>; 55 + status = "okay"; 56 + }; 57 + 53 58 &ir { 54 59 status = "okay"; 55 60 };
+21
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
··· 150 150 #size-cells = <1>; 151 151 ranges = <0x0 0x0 0x0 0x40000000>; 152 152 153 + gpu: gpu@1800000 { 154 + compatible = "allwinner,sun50i-h616-mali", 155 + "arm,mali-bifrost"; 156 + reg = <0x1800000 0x40000>; 157 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 158 + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 159 + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 160 + interrupt-names = "job", "mmu", "gpu"; 161 + clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>; 162 + clock-names = "core", "bus"; 163 + power-domains = <&prcm_ppu 2>; 164 + resets = <&ccu RST_BUS_GPU>; 165 + status = "disabled"; 166 + }; 167 + 153 168 crypto: crypto@1904000 { 154 169 compatible = "allwinner,sun50i-h616-crypto"; 155 170 reg = <0x01904000 0x800>; ··· 887 872 clock-names = "hosc", "losc", "iosc", "pll-periph"; 888 873 #clock-cells = <1>; 889 874 #reset-cells = <1>; 875 + }; 876 + 877 + prcm_ppu: power-controller@7010250 { 878 + compatible = "allwinner,sun50i-h616-prcm-ppu"; 879 + reg = <0x07010250 0x10>; 880 + #power-domain-cells = <1>; 890 881 }; 891 882 892 883 nmi_intc: interrupt-controller@7010320 {
+5
arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
··· 10 10 cpu-supply = <&reg_dcdc2>; 11 11 }; 12 12 13 + &gpu { 14 + mali-supply = <&reg_dcdc1>; 15 + status = "okay"; 16 + }; 17 + 13 18 &mmc2 { 14 19 pinctrl-names = "default"; 15 20 pinctrl-0 = <&mmc2_pins>;
+5
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
··· 69 69 70 70 /* USB 2 & 3 are on the FPC connector (or the exansion board) */ 71 71 72 + &gpu { 73 + mali-supply = <&reg_dcdc1>; 74 + status = "okay"; 75 + }; 76 + 72 77 &mmc0 { 73 78 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 74 79 bus-width = <4>;
+4
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
··· 27 27 motorcomm,clk-out-frequency-hz = <125000000>; 28 28 }; 29 29 30 + &gpu { 31 + mali-supply = <&reg_dcdc1>; 32 + }; 33 + 30 34 &mmc0 { 31 35 /* 32 36 * The schematic shows the card detect pin wired up to PF6, via an
+5
arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts
··· 69 69 status = "okay"; 70 70 }; 71 71 72 + &gpu { 73 + mali-supply = <&reg_dcdc1>; 74 + status = "okay"; 75 + }; 76 + 72 77 &ir { 73 78 status = "okay"; 74 79 };
+222
arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright (C) 2024 Arm Ltd. 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "sun50i-h616.dtsi" 9 + #include "sun50i-h616-cpu-opp.dtsi" 10 + 11 + #include <dt-bindings/gpio/gpio.h> 12 + #include <dt-bindings/interrupt-controller/arm-gic.h> 13 + 14 + / { 15 + model = "Yuzuki Chameleon"; 16 + compatible = "yuzukihd,chameleon", "allwinner,sun50i-h618"; 17 + 18 + aliases { 19 + ethernet1 = &sdio_wifi; 20 + serial0 = &uart0; 21 + }; 22 + 23 + chosen { 24 + stdout-path = "serial0:115200n8"; 25 + }; 26 + 27 + reg_vcc5v: vcc5v { 28 + /* board wide 5V supply directly from the USB-C socket */ 29 + compatible = "regulator-fixed"; 30 + regulator-name = "vcc-5v"; 31 + regulator-min-microvolt = <5000000>; 32 + regulator-max-microvolt = <5000000>; 33 + regulator-always-on; 34 + }; 35 + 36 + wifi_pwrseq: pwrseq { 37 + compatible = "mmc-pwrseq-simple"; 38 + clocks = <&rtc CLK_OSC32K_FANOUT>; 39 + clock-names = "ext_clock"; 40 + pinctrl-0 = <&x32clk_fanout_pin>; 41 + pinctrl-names = "default"; 42 + reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11 */ 43 + }; 44 + }; 45 + 46 + &codec { 47 + allwinner,audio-routing = "Line Out", "LINEOUT"; 48 + status = "okay"; 49 + }; 50 + 51 + &cpu0 { 52 + cpu-supply = <&reg_dcdc2>; 53 + }; 54 + 55 + &ehci0 { 56 + status = "okay"; 57 + }; 58 + 59 + &ehci1 { 60 + status = "okay"; 61 + }; 62 + 63 + &ehci2 { 64 + status = "okay"; 65 + }; 66 + 67 + &ehci3 { 68 + status = "okay"; 69 + }; 70 + 71 + &mmc0 { 72 + bus-width = <4>; 73 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 74 + disable-wp; 75 + vmmc-supply = <&reg_dldo1>; 76 + status = "okay"; 77 + }; 78 + 79 + &mmc1 { 80 + bus-width = <4>; 81 + mmc-pwrseq = <&wifi_pwrseq>; 82 + non-removable; 83 + vmmc-supply = <&reg_dldo1>; 84 + vqmmc-supply = <&reg_dldo1>; 85 + status = "okay"; 86 + 87 + sdio_wifi: wifi@1 { 88 + reg = <1>; 89 + interrupt-parent = <&pio>; 90 + interrupts = <6 12 IRQ_TYPE_LEVEL_LOW>; /* PG12 */ 91 + interrupt-names = "host-wake"; 92 + }; 93 + }; 94 + 95 + &mmc2 { 96 + bus-width = <8>; 97 + cap-mmc-hw-reset; 98 + mmc-ddr-3_3v; 99 + non-removable; 100 + vmmc-supply = <&reg_dldo1>; 101 + vqmmc-supply = <&reg_dldo1>; 102 + status = "okay"; 103 + }; 104 + 105 + &ohci0 { 106 + status = "okay"; 107 + }; 108 + 109 + &ohci1 { 110 + status = "okay"; 111 + }; 112 + 113 + &ohci2 { 114 + status = "okay"; 115 + }; 116 + 117 + &ohci3 { 118 + status = "okay"; 119 + }; 120 + 121 + &pio { 122 + vcc-pc-supply = <&reg_dldo1>; 123 + vcc-pf-supply = <&reg_dldo1>; /* via VCC_IO */ 124 + vcc-pg-supply = <&reg_dldo1>; 125 + vcc-ph-supply = <&reg_dldo1>; /* via VCC_IO */ 126 + vcc-pi-supply = <&reg_dldo1>; 127 + }; 128 + 129 + &r_i2c { 130 + status = "okay"; 131 + 132 + axp313: pmic@36 { 133 + compatible = "x-powers,axp313a"; 134 + reg = <0x36>; 135 + #interrupt-cells = <1>; 136 + interrupt-controller; 137 + interrupt-parent = <&pio>; 138 + interrupts = <2 2 IRQ_TYPE_LEVEL_LOW>; /* PC2 */ 139 + 140 + vin1-supply = <&reg_vcc5v>; 141 + vin2-supply = <&reg_vcc5v>; 142 + vin3-supply = <&reg_vcc5v>; 143 + 144 + regulators { 145 + /* Supplies VCC-PLL, so needs to be always on. */ 146 + reg_aldo1: aldo1 { 147 + regulator-always-on; 148 + regulator-min-microvolt = <1800000>; 149 + regulator-max-microvolt = <1800000>; 150 + regulator-name = "vcc1v8"; 151 + }; 152 + 153 + /* Supplies VCC-IO, so needs to be always on. */ 154 + reg_dldo1: dldo1 { 155 + regulator-always-on; 156 + regulator-min-microvolt = <3300000>; 157 + regulator-max-microvolt = <3300000>; 158 + regulator-name = "vcc3v3"; 159 + }; 160 + 161 + reg_dcdc1: dcdc1 { 162 + regulator-always-on; 163 + regulator-min-microvolt = <810000>; 164 + regulator-max-microvolt = <990000>; 165 + regulator-name = "vdd-gpu-sys"; 166 + }; 167 + 168 + reg_dcdc2: dcdc2 { 169 + regulator-always-on; 170 + regulator-min-microvolt = <810000>; 171 + regulator-max-microvolt = <1100000>; 172 + regulator-name = "vdd-cpu"; 173 + }; 174 + 175 + reg_dcdc3: dcdc3 { 176 + regulator-always-on; 177 + regulator-min-microvolt = <1500000>; 178 + regulator-max-microvolt = <1500000>; 179 + regulator-name = "vdd-dram"; 180 + }; 181 + }; 182 + }; 183 + }; 184 + 185 + &uart0 { 186 + pinctrl-names = "default"; 187 + pinctrl-0 = <&uart0_ph_pins>; 188 + status = "okay"; 189 + }; 190 + 191 + /* Connected to the Bluetooth UART pins of the XR829 Wifi/BT chip. */ 192 + &uart1 { 193 + pinctrl-names = "default"; 194 + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 195 + uart-has-rtscts; 196 + status = "okay"; 197 + }; 198 + 199 + &usbotg { 200 + /* 201 + * PHY0 pins are connected to a USB-C socket, but a role switch 202 + * is not implemented: both CC pins are pulled to GND. 203 + * The VBUS pins power the device, so a fixed peripheral mode 204 + * is the best choice. 205 + * The board can be powered via GPIOs, in this case port0 *can* 206 + * act as a host (with a cable/adapter ignoring CC), as VBUS is 207 + * then provided by the GPIOs. Any user of this setup would 208 + * need to adjust the DT accordingly: dr_mode set to "host", 209 + * enabling OHCI0 and EHCI0. 210 + */ 211 + dr_mode = "peripheral"; 212 + status = "okay"; 213 + }; 214 + 215 + &usbphy { 216 + usb0_id_det-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */ 217 + usb0_vbus-supply = <&reg_vcc5v>; 218 + usb1_vbus-supply = <&reg_vcc5v>; 219 + usb2_vbus-supply = <&reg_vcc5v>; 220 + usb3_vbus-supply = <&reg_vcc5v>; 221 + status = "okay"; 222 + };
+9 -1
arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
··· 184 184 }; 185 185 186 186 &codec { 187 - allwinner,audio-routing = "Line Out", "LINEOUT"; 187 + /* Both speakers and headphone jack connected to 74HC4052D analog mux*/ 188 + allwinner,audio-routing = "Speaker", "LINEOUT", 189 + "Headphone", "LINEOUT"; 188 190 allwinner,pa-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; // PI5 191 + hp-det-gpios = <&pio 8 3 GPIO_ACTIVE_HIGH>; // PI3 189 192 status = "okay"; 190 193 }; 191 194 ··· 197 194 }; 198 195 199 196 &ehci0 { 197 + status = "okay"; 198 + }; 199 + 200 + &gpu { 201 + mali-supply = <&reg_dcdc2>; 200 202 status = "okay"; 201 203 }; 202 204
+639
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 + // Copyright (C) 2023-2024 Arm Ltd. 3 + 4 + #include <dt-bindings/interrupt-controller/arm-gic.h> 5 + #include <dt-bindings/clock/sun6i-rtc.h> 6 + #include <dt-bindings/clock/sun55i-a523-ccu.h> 7 + #include <dt-bindings/clock/sun55i-a523-r-ccu.h> 8 + #include <dt-bindings/reset/sun55i-a523-ccu.h> 9 + #include <dt-bindings/reset/sun55i-a523-r-ccu.h> 10 + 11 + / { 12 + interrupt-parent = <&gic>; 13 + #address-cells = <2>; 14 + #size-cells = <2>; 15 + 16 + cpus { 17 + #address-cells = <1>; 18 + #size-cells = <0>; 19 + 20 + cpu0: cpu@0 { 21 + compatible = "arm,cortex-a55"; 22 + device_type = "cpu"; 23 + reg = <0x000>; 24 + enable-method = "psci"; 25 + }; 26 + 27 + cpu1: cpu@100 { 28 + compatible = "arm,cortex-a55"; 29 + device_type = "cpu"; 30 + reg = <0x100>; 31 + enable-method = "psci"; 32 + }; 33 + 34 + cpu2: cpu@200 { 35 + compatible = "arm,cortex-a55"; 36 + device_type = "cpu"; 37 + reg = <0x200>; 38 + enable-method = "psci"; 39 + }; 40 + 41 + cpu3: cpu@300 { 42 + compatible = "arm,cortex-a55"; 43 + device_type = "cpu"; 44 + reg = <0x300>; 45 + enable-method = "psci"; 46 + }; 47 + 48 + cpu4: cpu@400 { 49 + compatible = "arm,cortex-a55"; 50 + device_type = "cpu"; 51 + reg = <0x400>; 52 + enable-method = "psci"; 53 + }; 54 + 55 + cpu5: cpu@500 { 56 + compatible = "arm,cortex-a55"; 57 + device_type = "cpu"; 58 + reg = <0x500>; 59 + enable-method = "psci"; 60 + }; 61 + 62 + cpu6: cpu@600 { 63 + compatible = "arm,cortex-a55"; 64 + device_type = "cpu"; 65 + reg = <0x600>; 66 + enable-method = "psci"; 67 + }; 68 + 69 + cpu7: cpu@700 { 70 + compatible = "arm,cortex-a55"; 71 + device_type = "cpu"; 72 + reg = <0x700>; 73 + enable-method = "psci"; 74 + }; 75 + }; 76 + 77 + osc24M: osc24M-clk { 78 + #clock-cells = <0>; 79 + compatible = "fixed-clock"; 80 + clock-frequency = <24000000>; 81 + clock-output-names = "osc24M"; 82 + }; 83 + 84 + pmu { 85 + compatible = "arm,cortex-a55-pmu"; 86 + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 87 + }; 88 + 89 + psci { 90 + compatible = "arm,psci-0.2"; 91 + method = "smc"; 92 + }; 93 + 94 + timer { 95 + compatible = "arm,armv8-timer"; 96 + arm,no-tick-in-suspend; 97 + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, 98 + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, 99 + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, 100 + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; 101 + }; 102 + 103 + soc { 104 + compatible = "simple-bus"; 105 + #address-cells = <1>; 106 + #size-cells = <1>; 107 + ranges = <0x0 0x0 0x0 0x40000000>; 108 + 109 + pio: pinctrl@2000000 { 110 + compatible = "allwinner,sun55i-a523-pinctrl"; 111 + reg = <0x2000000 0x800>; 112 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 113 + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 114 + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 115 + <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, 116 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, 117 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, 118 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, 119 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 120 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 121 + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 122 + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; 123 + clock-names = "apb", "hosc", "losc"; 124 + gpio-controller; 125 + #gpio-cells = <3>; 126 + interrupt-controller; 127 + #interrupt-cells = <3>; 128 + 129 + rgmii0_pins: rgmii0-pins { 130 + pins = "PH0", "PH1", "PH2", "PH3", "PH4", 131 + "PH5", "PH6", "PH7", "PH9", "PH10", 132 + "PH14", "PH15", "PH16", "PH17", "PH18"; 133 + allwinner,pinmux = <5>; 134 + function = "emac0"; 135 + drive-strength = <40>; 136 + bias-disable; 137 + }; 138 + 139 + mmc0_pins: mmc0-pins { 140 + pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5"; 141 + allwinner,pinmux = <2>; 142 + function = "mmc0"; 143 + drive-strength = <30>; 144 + bias-pull-up; 145 + }; 146 + 147 + /omit-if-no-ref/ 148 + mmc1_pins: mmc1-pins { 149 + pins = "PG0" ,"PG1", "PG2", "PG3", "PG4", "PG5"; 150 + allwinner,pinmux = <2>; 151 + function = "mmc1"; 152 + drive-strength = <30>; 153 + bias-pull-up; 154 + }; 155 + 156 + mmc2_pins: mmc2-pins { 157 + pins = "PC0", "PC1" ,"PC5", "PC6", "PC8", 158 + "PC9", "PC10", "PC11", "PC13", "PC14", 159 + "PC15", "PC16"; 160 + allwinner,pinmux = <3>; 161 + function = "mmc2"; 162 + drive-strength = <30>; 163 + bias-pull-up; 164 + }; 165 + 166 + uart0_pb_pins: uart0-pb-pins { 167 + pins = "PB9", "PB10"; 168 + allwinner,pinmux = <2>; 169 + function = "uart0"; 170 + }; 171 + }; 172 + 173 + ccu: clock-controller@2001000 { 174 + compatible = "allwinner,sun55i-a523-ccu"; 175 + reg = <0x02001000 0x1000>; 176 + clocks = <&osc24M>, <&rtc CLK_OSC32K>, 177 + <&rtc CLK_IOSC>, <&rtc CLK_OSC32K_FANOUT>; 178 + clock-names = "hosc", "losc", 179 + "iosc", "losc-fanout"; 180 + #clock-cells = <1>; 181 + #reset-cells = <1>; 182 + }; 183 + 184 + mmc0: mmc@4020000 { 185 + compatible = "allwinner,sun55i-a523-mmc", 186 + "allwinner,sun20i-d1-mmc"; 187 + reg = <0x04020000 0x1000>; 188 + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 189 + clock-names = "ahb", "mmc"; 190 + resets = <&ccu RST_BUS_MMC0>; 191 + reset-names = "ahb"; 192 + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 193 + pinctrl-names = "default"; 194 + pinctrl-0 = <&mmc0_pins>; 195 + status = "disabled"; 196 + 197 + max-frequency = <150000000>; 198 + cap-sd-highspeed; 199 + cap-mmc-highspeed; 200 + cap-sdio-irq; 201 + #address-cells = <1>; 202 + #size-cells = <0>; 203 + }; 204 + 205 + mmc1: mmc@4021000 { 206 + compatible = "allwinner,sun55i-a523-mmc", 207 + "allwinner,sun20i-d1-mmc"; 208 + reg = <0x04021000 0x1000>; 209 + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 210 + clock-names = "ahb", "mmc"; 211 + resets = <&ccu RST_BUS_MMC1>; 212 + reset-names = "ahb"; 213 + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 214 + pinctrl-names = "default"; 215 + pinctrl-0 = <&mmc1_pins>; 216 + status = "disabled"; 217 + 218 + max-frequency = <150000000>; 219 + cap-sd-highspeed; 220 + cap-mmc-highspeed; 221 + cap-sdio-irq; 222 + #address-cells = <1>; 223 + #size-cells = <0>; 224 + }; 225 + 226 + mmc2: mmc@4022000 { 227 + compatible = "allwinner,sun55i-a523-mmc", 228 + "allwinner,sun20i-d1-mmc"; 229 + reg = <0x04022000 0x1000>; 230 + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 231 + clock-names = "ahb", "mmc"; 232 + resets = <&ccu RST_BUS_MMC2>; 233 + reset-names = "ahb"; 234 + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 235 + pinctrl-names = "default"; 236 + pinctrl-0 = <&mmc2_pins>; 237 + status = "disabled"; 238 + 239 + max-frequency = <150000000>; 240 + cap-sd-highspeed; 241 + cap-mmc-highspeed; 242 + cap-sdio-irq; 243 + #address-cells = <1>; 244 + #size-cells = <0>; 245 + }; 246 + 247 + wdt: watchdog@2050000 { 248 + compatible = "allwinner,sun55i-a523-wdt"; 249 + reg = <0x2050000 0x20>; 250 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 251 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 252 + clock-names = "hosc", "losc"; 253 + status = "okay"; 254 + }; 255 + 256 + uart0: serial@2500000 { 257 + compatible = "snps,dw-apb-uart"; 258 + reg = <0x02500000 0x400>; 259 + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 260 + reg-shift = <2>; 261 + reg-io-width = <4>; 262 + clocks = <&ccu CLK_BUS_UART0>; 263 + resets = <&ccu RST_BUS_UART0>; 264 + status = "disabled"; 265 + }; 266 + 267 + uart1: serial@2500400 { 268 + compatible = "snps,dw-apb-uart"; 269 + reg = <0x02500400 0x400>; 270 + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 271 + reg-shift = <2>; 272 + reg-io-width = <4>; 273 + clocks = <&ccu CLK_BUS_UART1>; 274 + resets = <&ccu RST_BUS_UART1>; 275 + status = "disabled"; 276 + }; 277 + 278 + uart2: serial@2500800 { 279 + compatible = "snps,dw-apb-uart"; 280 + reg = <0x02500800 0x400>; 281 + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 282 + reg-shift = <2>; 283 + reg-io-width = <4>; 284 + clocks = <&ccu CLK_BUS_UART2>; 285 + resets = <&ccu RST_BUS_UART2>; 286 + status = "disabled"; 287 + }; 288 + 289 + uart3: serial@2500c00 { 290 + compatible = "snps,dw-apb-uart"; 291 + reg = <0x02500c00 0x400>; 292 + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 293 + reg-shift = <2>; 294 + reg-io-width = <4>; 295 + clocks = <&ccu CLK_BUS_UART3>; 296 + resets = <&ccu RST_BUS_UART3>; 297 + status = "disabled"; 298 + }; 299 + 300 + uart4: serial@2501000 { 301 + compatible = "snps,dw-apb-uart"; 302 + reg = <0x02501000 0x400>; 303 + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 304 + reg-shift = <2>; 305 + reg-io-width = <4>; 306 + clocks = <&ccu CLK_BUS_UART4>; 307 + resets = <&ccu RST_BUS_UART4>; 308 + status = "disabled"; 309 + }; 310 + 311 + uart5: serial@2501400 { 312 + compatible = "snps,dw-apb-uart"; 313 + reg = <0x02501400 0x400>; 314 + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 315 + reg-shift = <2>; 316 + reg-io-width = <4>; 317 + clocks = <&ccu CLK_BUS_UART5>; 318 + resets = <&ccu RST_BUS_UART5>; 319 + status = "disabled"; 320 + }; 321 + 322 + uart6: serial@2501800 { 323 + compatible = "snps,dw-apb-uart"; 324 + reg = <0x02501800 0x400>; 325 + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 326 + reg-shift = <2>; 327 + reg-io-width = <4>; 328 + clocks = <&ccu CLK_BUS_UART6>; 329 + resets = <&ccu RST_BUS_UART6>; 330 + status = "disabled"; 331 + }; 332 + 333 + uart7: serial@2501c00 { 334 + compatible = "snps,dw-apb-uart"; 335 + reg = <0x02501c00 0x400>; 336 + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 337 + reg-shift = <2>; 338 + reg-io-width = <4>; 339 + clocks = <&ccu CLK_BUS_UART7>; 340 + resets = <&ccu RST_BUS_UART7>; 341 + status = "disabled"; 342 + }; 343 + 344 + i2c0: i2c@2502000 { 345 + compatible = "allwinner,sun55i-a523-i2c", 346 + "allwinner,sun8i-v536-i2c", 347 + "allwinner,sun6i-a31-i2c"; 348 + reg = <0x2502000 0x400>; 349 + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 350 + clocks = <&ccu CLK_BUS_I2C0>; 351 + resets = <&ccu RST_BUS_I2C0>; 352 + status = "disabled"; 353 + #address-cells = <1>; 354 + #size-cells = <0>; 355 + }; 356 + 357 + i2c1: i2c@2502400 { 358 + compatible = "allwinner,sun55i-a523-i2c", 359 + "allwinner,sun8i-v536-i2c", 360 + "allwinner,sun6i-a31-i2c"; 361 + reg = <0x2502400 0x400>; 362 + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 363 + clocks = <&ccu CLK_BUS_I2C1>; 364 + resets = <&ccu RST_BUS_I2C1>; 365 + status = "disabled"; 366 + #address-cells = <1>; 367 + #size-cells = <0>; 368 + }; 369 + 370 + i2c2: i2c@2502800 { 371 + compatible = "allwinner,sun55i-a523-i2c", 372 + "allwinner,sun8i-v536-i2c", 373 + "allwinner,sun6i-a31-i2c"; 374 + reg = <0x2502800 0x400>; 375 + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 376 + clocks = <&ccu CLK_BUS_I2C2>; 377 + resets = <&ccu RST_BUS_I2C2>; 378 + status = "disabled"; 379 + #address-cells = <1>; 380 + #size-cells = <0>; 381 + }; 382 + 383 + i2c3: i2c@2502c00 { 384 + compatible = "allwinner,sun55i-a523-i2c", 385 + "allwinner,sun8i-v536-i2c", 386 + "allwinner,sun6i-a31-i2c"; 387 + reg = <0x2502c00 0x400>; 388 + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 389 + clocks = <&ccu CLK_BUS_I2C3>; 390 + resets = <&ccu RST_BUS_I2C3>; 391 + status = "disabled"; 392 + #address-cells = <1>; 393 + #size-cells = <0>; 394 + }; 395 + 396 + i2c4: i2c@2503000 { 397 + compatible = "allwinner,sun55i-a523-i2c", 398 + "allwinner,sun8i-v536-i2c", 399 + "allwinner,sun6i-a31-i2c"; 400 + reg = <0x2503000 0x400>; 401 + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 402 + clocks = <&ccu CLK_BUS_I2C4>; 403 + resets = <&ccu RST_BUS_I2C4>; 404 + status = "disabled"; 405 + #address-cells = <1>; 406 + #size-cells = <0>; 407 + }; 408 + 409 + i2c5: i2c@2503400 { 410 + compatible = "allwinner,sun55i-a523-i2c", 411 + "allwinner,sun8i-v536-i2c", 412 + "allwinner,sun6i-a31-i2c"; 413 + reg = <0x2503400 0x400>; 414 + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 415 + clocks = <&ccu CLK_BUS_I2C5>; 416 + resets = <&ccu RST_BUS_I2C5>; 417 + status = "disabled"; 418 + #address-cells = <1>; 419 + #size-cells = <0>; 420 + }; 421 + 422 + syscon: syscon@3000000 { 423 + compatible = "allwinner,sun55i-a523-system-control", 424 + "allwinner,sun50i-a64-system-control"; 425 + reg = <0x03000000 0x1000>; 426 + #address-cells = <1>; 427 + #size-cells = <1>; 428 + ranges; 429 + }; 430 + 431 + gic: interrupt-controller@3400000 { 432 + compatible = "arm,gic-v3"; 433 + #address-cells = <1>; 434 + #interrupt-cells = <3>; 435 + #size-cells = <1>; 436 + ranges; 437 + interrupt-controller; 438 + reg = <0x3400000 0x10000>, 439 + <0x3460000 0x100000>; 440 + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 441 + dma-noncoherent; 442 + 443 + its: msi-controller@3440000 { 444 + compatible = "arm,gic-v3-its"; 445 + reg = <0x3440000 0x20000>; 446 + msi-controller; 447 + #msi-cells = <1>; 448 + dma-noncoherent; 449 + }; 450 + }; 451 + 452 + usb_otg: usb@4100000 { 453 + compatible = "allwinner,sun55i-a523-musb", 454 + "allwinner,sun8i-a33-musb"; 455 + reg = <0x4100000 0x400>; 456 + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 457 + interrupt-names = "mc"; 458 + clocks = <&ccu CLK_BUS_OTG>; 459 + resets = <&ccu RST_BUS_OTG>; 460 + extcon = <&usbphy 0>; 461 + phys = <&usbphy 0>; 462 + phy-names = "usb"; 463 + status = "disabled"; 464 + }; 465 + 466 + usbphy: phy@4100400 { 467 + compatible = "allwinner,sun55i-a523-usb-phy", 468 + "allwinner,sun20i-d1-usb-phy"; 469 + reg = <0x4100400 0x100>, 470 + <0x4101800 0x100>, 471 + <0x4200800 0x100>; 472 + reg-names = "phy_ctrl", 473 + "pmu0", 474 + "pmu1"; 475 + clocks = <&osc24M>, 476 + <&osc24M>; 477 + clock-names = "usb0_phy", 478 + "usb1_phy"; 479 + resets = <&ccu RST_USB_PHY0>, 480 + <&ccu RST_USB_PHY1>; 481 + reset-names = "usb0_reset", 482 + "usb1_reset"; 483 + status = "disabled"; 484 + #phy-cells = <1>; 485 + }; 486 + 487 + ehci0: usb@4101000 { 488 + compatible = "allwinner,sun55i-a523-ehci", 489 + "generic-ehci"; 490 + reg = <0x4101000 0x100>; 491 + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 492 + clocks = <&ccu CLK_BUS_OHCI0>, 493 + <&ccu CLK_BUS_EHCI0>, 494 + <&ccu CLK_USB_OHCI0>; 495 + resets = <&ccu RST_BUS_OHCI0>, 496 + <&ccu RST_BUS_EHCI0>; 497 + phys = <&usbphy 0>; 498 + phy-names = "usb"; 499 + status = "disabled"; 500 + }; 501 + 502 + ohci0: usb@4101400 { 503 + compatible = "allwinner,sun55i-a523-ohci", 504 + "generic-ohci"; 505 + reg = <0x4101400 0x100>; 506 + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 507 + clocks = <&ccu CLK_BUS_OHCI0>, 508 + <&ccu CLK_USB_OHCI0>; 509 + resets = <&ccu RST_BUS_OHCI0>; 510 + phys = <&usbphy 0>; 511 + phy-names = "usb"; 512 + status = "disabled"; 513 + }; 514 + 515 + ehci1: usb@4200000 { 516 + compatible = "allwinner,sun55i-a523-ehci", 517 + "generic-ehci"; 518 + reg = <0x4200000 0x100>; 519 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 520 + clocks = <&ccu CLK_BUS_OHCI1>, 521 + <&ccu CLK_BUS_EHCI1>, 522 + <&ccu CLK_USB_OHCI1>; 523 + resets = <&ccu RST_BUS_OHCI1>, 524 + <&ccu RST_BUS_EHCI1>; 525 + phys = <&usbphy 1>; 526 + phy-names = "usb"; 527 + status = "disabled"; 528 + }; 529 + 530 + ohci1: usb@4200400 { 531 + compatible = "allwinner,sun55i-a523-ohci", 532 + "generic-ohci"; 533 + reg = <0x4200400 0x100>; 534 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 535 + clocks = <&ccu CLK_BUS_OHCI1>, 536 + <&ccu CLK_USB_OHCI1>; 537 + resets = <&ccu RST_BUS_OHCI1>; 538 + phys = <&usbphy 1>; 539 + phy-names = "usb"; 540 + status = "disabled"; 541 + }; 542 + 543 + emac0: ethernet@4500000 { 544 + compatible = "allwinner,sun55i-a523-emac0", 545 + "allwinner,sun50i-a64-emac"; 546 + reg = <0x04500000 0x10000>; 547 + clocks = <&ccu CLK_BUS_EMAC0>; 548 + clock-names = "stmmaceth"; 549 + resets = <&ccu RST_BUS_EMAC0>; 550 + reset-names = "stmmaceth"; 551 + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 552 + interrupt-names = "macirq"; 553 + pinctrl-names = "default"; 554 + pinctrl-0 = <&rgmii0_pins>; 555 + syscon = <&syscon>; 556 + status = "disabled"; 557 + 558 + mdio0: mdio { 559 + compatible = "snps,dwmac-mdio"; 560 + #address-cells = <1>; 561 + #size-cells = <0>; 562 + }; 563 + }; 564 + 565 + r_ccu: clock-controller@7010000 { 566 + compatible = "allwinner,sun55i-a523-r-ccu"; 567 + reg = <0x7010000 0x250>; 568 + clocks = <&osc24M>, 569 + <&rtc CLK_OSC32K>, 570 + <&rtc CLK_IOSC>, 571 + <&ccu CLK_PLL_PERIPH0_200M>, 572 + <&ccu CLK_PLL_AUDIO0_4X>; 573 + clock-names = "hosc", 574 + "losc", 575 + "iosc", 576 + "pll-periph", 577 + "pll-audio"; 578 + #clock-cells = <1>; 579 + #reset-cells = <1>; 580 + }; 581 + 582 + nmi_intc: interrupt-controller@7010320 { 583 + compatible = "allwinner,sun55i-a523-nmi"; 584 + reg = <0x07010320 0xc>; 585 + interrupt-controller; 586 + #interrupt-cells = <2>; 587 + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 588 + }; 589 + 590 + r_pio: pinctrl@7022000 { 591 + compatible = "allwinner,sun55i-a523-r-pinctrl"; 592 + reg = <0x7022000 0x800>; 593 + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, 594 + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 595 + clocks = <&r_ccu CLK_R_APB0>, 596 + <&osc24M>, 597 + <&rtc CLK_OSC32K>; 598 + clock-names = "apb", "hosc", "losc"; 599 + gpio-controller; 600 + #gpio-cells = <3>; 601 + interrupt-controller; 602 + #interrupt-cells = <3>; 603 + 604 + r_i2c_pins: r-i2c-pins { 605 + pins = "PL0" ,"PL1"; 606 + allwinner,pinmux = <2>; 607 + function = "r_i2c0"; 608 + }; 609 + }; 610 + 611 + r_i2c0: i2c@7081400 { 612 + compatible = "allwinner,sun55i-a523-i2c", 613 + "allwinner,sun8i-v536-i2c", 614 + "allwinner,sun6i-a31-i2c"; 615 + reg = <0x07081400 0x400>; 616 + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 617 + clocks = <&r_ccu CLK_BUS_R_I2C0>; 618 + resets = <&r_ccu RST_BUS_R_I2C0>; 619 + pinctrl-names = "default"; 620 + pinctrl-0 = <&r_i2c_pins>; 621 + status = "disabled"; 622 + 623 + #address-cells = <1>; 624 + #size-cells = <0>; 625 + }; 626 + 627 + rtc: rtc@7090000 { 628 + compatible = "allwinner,sun55i-a523-rtc", 629 + "allwinner,sun50i-r329-rtc"; 630 + reg = <0x7090000 0x400>; 631 + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 632 + clocks = <&r_ccu CLK_BUS_R_RTC>, 633 + <&osc24M>, 634 + <&r_ccu CLK_R_AHB>; 635 + clock-names = "bus", "hosc", "ahb"; 636 + #clock-cells = <1>; 637 + }; 638 + }; 639 + };
+318
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 + // Copyright (C) 2025 Arm Ltd. 3 + 4 + /dts-v1/; 5 + 6 + #include "sun55i-a523.dtsi" 7 + 8 + #include <dt-bindings/gpio/gpio.h> 9 + 10 + / { 11 + model = "Radxa Cubie A5E"; 12 + compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527"; 13 + 14 + aliases { 15 + ethernet0 = &emac0; 16 + serial0 = &uart0; 17 + }; 18 + 19 + chosen { 20 + stdout-path = "serial0:115200n8"; 21 + }; 22 + 23 + ext_osc32k: ext-osc32k-clk { 24 + #clock-cells = <0>; 25 + compatible = "fixed-clock"; 26 + clock-frequency = <32768>; 27 + clock-output-names = "ext_osc32k"; 28 + }; 29 + 30 + reg_vcc5v: vcc5v { 31 + /* board wide 5V supply from the USB-C connector */ 32 + compatible = "regulator-fixed"; 33 + regulator-name = "vcc-5v"; 34 + regulator-min-microvolt = <5000000>; 35 + regulator-max-microvolt = <5000000>; 36 + regulator-always-on; 37 + }; 38 + 39 + reg_usb_vbus: vbus { 40 + compatible = "regulator-fixed"; 41 + regulator-name = "usb-vbus"; 42 + regulator-min-microvolt = <5000000>; 43 + regulator-max-microvolt = <5000000>; 44 + vin-supply = <&reg_vcc5v>; 45 + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ 46 + enable-active-high; 47 + }; 48 + }; 49 + 50 + &ehci0 { 51 + status = "okay"; 52 + }; 53 + 54 + &ehci1 { 55 + status = "okay"; 56 + }; 57 + 58 + &emac0 { 59 + phy-mode = "rgmii-id"; 60 + phy-handle = <&ext_rgmii_phy>; 61 + phy-supply = <&reg_cldo3>; 62 + 63 + allwinner,tx-delay-ps = <300>; 64 + allwinner,rx-delay-ps = <400>; 65 + 66 + status = "okay"; 67 + }; 68 + 69 + &mdio0 { 70 + ext_rgmii_phy: ethernet-phy@1 { 71 + compatible = "ethernet-phy-ieee802.3-c22"; 72 + reg = <1>; 73 + }; 74 + }; 75 + 76 + &mmc0 { 77 + vmmc-supply = <&reg_cldo3>; 78 + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ 79 + bus-width = <4>; 80 + status = "okay"; 81 + }; 82 + 83 + &ohci0 { 84 + status = "okay"; 85 + }; 86 + 87 + &ohci1 { 88 + status = "okay"; 89 + }; 90 + 91 + &pio { 92 + vcc-pb-supply = <&reg_cldo3>; /* via VCC-IO */ 93 + vcc-pc-supply = <&reg_cldo1>; 94 + vcc-pd-supply = <&reg_cldo3>; 95 + vcc-pe-supply = <&reg_aldo2>; 96 + vcc-pf-supply = <&reg_cldo3>; /* actually switchable */ 97 + vcc-pg-supply = <&reg_bldo1>; 98 + vcc-ph-supply = <&reg_cldo3>; /* via VCC-IO */ 99 + vcc-pi-supply = <&reg_cldo3>; 100 + vcc-pj-supply = <&reg_cldo4>; 101 + vcc-pk-supply = <&reg_cldo1>; 102 + }; 103 + 104 + &r_i2c0 { 105 + status = "okay"; 106 + 107 + axp717: pmic@34 { 108 + compatible = "x-powers,axp717"; 109 + reg = <0x34>; 110 + interrupt-controller; 111 + #interrupt-cells = <1>; 112 + interrupt-parent = <&nmi_intc>; 113 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 114 + 115 + vin1-supply = <&reg_vcc5v>; 116 + vin2-supply = <&reg_vcc5v>; 117 + vin3-supply = <&reg_vcc5v>; 118 + vin4-supply = <&reg_vcc5v>; 119 + aldoin-supply = <&reg_vcc5v>; 120 + bldoin-supply = <&reg_vcc5v>; 121 + cldoin-supply = <&reg_vcc5v>; 122 + 123 + regulators { 124 + /* Supplies the "little" cluster (1.4 GHz cores) */ 125 + reg_dcdc1: dcdc1 { 126 + regulator-always-on; 127 + regulator-min-microvolt = <900000>; 128 + regulator-max-microvolt = <1160000>; 129 + regulator-name = "vdd-cpul"; 130 + }; 131 + 132 + reg_dcdc2: dcdc2 { 133 + regulator-always-on; 134 + regulator-min-microvolt = <920000>; 135 + regulator-max-microvolt = <920000>; 136 + regulator-name = "vdd-gpu-sys"; 137 + }; 138 + 139 + reg_dcdc3: dcdc3 { 140 + regulator-always-on; 141 + regulator-min-microvolt = <1100000>; 142 + regulator-max-microvolt = <1100000>; 143 + regulator-name = "vdd-dram"; 144 + }; 145 + 146 + reg_aldo1: aldo1 { 147 + /* not connected */ 148 + }; 149 + 150 + reg_aldo2: aldo2 { 151 + regulator-min-microvolt = <1800000>; 152 + regulator-max-microvolt = <1800000>; 153 + regulator-name = "vcc-pe"; 154 + }; 155 + 156 + reg_aldo3: aldo3 { 157 + /* supplies the I2C pins for this PMIC */ 158 + regulator-always-on; 159 + regulator-min-microvolt = <3300000>; 160 + regulator-max-microvolt = <3300000>; 161 + regulator-name = "vcc-pl-usb"; 162 + }; 163 + 164 + reg_aldo4: aldo4 { 165 + regulator-always-on; 166 + regulator-min-microvolt = <1800000>; 167 + regulator-max-microvolt = <1800000>; 168 + regulator-name = "vcc-pll-dxco-avcc"; 169 + }; 170 + 171 + reg_bldo1: bldo1 { 172 + regulator-min-microvolt = <1800000>; 173 + regulator-max-microvolt = <1800000>; 174 + regulator-name = "vcc-pg-iowifi"; 175 + }; 176 + 177 + reg_bldo2: bldo2 { 178 + regulator-always-on; 179 + regulator-min-microvolt = <1800000>; 180 + regulator-max-microvolt = <1800000>; 181 + regulator-name = "vcc-pm-lpddr4"; 182 + }; 183 + 184 + reg_bldo3: bldo3 { 185 + regulator-min-microvolt = <3300000>; 186 + regulator-max-microvolt = <3300000>; 187 + regulator-name = "vcc-mipi-cam"; 188 + }; 189 + 190 + reg_bldo4: bldo4 { 191 + /* not connected */ 192 + }; 193 + 194 + reg_cldo1: cldo1 { 195 + regulator-min-microvolt = <1800000>; 196 + regulator-max-microvolt = <1800000>; 197 + regulator-name = "vcc-pc-and-their-dog"; 198 + }; 199 + 200 + reg_cldo2: cldo2 { 201 + /* not connected */ 202 + }; 203 + 204 + reg_cldo3: cldo3 { 205 + /* IO, USB-2, 3V3, card, NAND, sensor, PI */ 206 + regulator-always-on; 207 + regulator-min-microvolt = <3300000>; 208 + regulator-max-microvolt = <3300000>; 209 + regulator-name = "vcc-io-mmc-spi-ana"; 210 + }; 211 + 212 + reg_cldo4: cldo4 { 213 + regulator-min-microvolt = <3300000>; 214 + regulator-max-microvolt = <3300000>; 215 + regulator-name = "vcc-pj-phy"; 216 + }; 217 + 218 + reg_cpusldo: cpusldo { 219 + /* supplies the management core */ 220 + regulator-always-on; 221 + regulator-min-microvolt = <900000>; 222 + regulator-max-microvolt = <900000>; 223 + regulator-name = "vdd-cpus"; 224 + }; 225 + }; 226 + }; 227 + 228 + axp323: pmic@36 { 229 + compatible = "x-powers,axp323"; 230 + reg = <0x36>; 231 + #interrupt-cells = <1>; 232 + interrupt-controller; 233 + interrupt-parent = <&nmi_intc>; 234 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 235 + status = "okay"; 236 + 237 + vin1-supply = <&reg_vcc5v>; 238 + vin2-supply = <&reg_vcc5v>; 239 + vin3-supply = <&reg_vcc5v>; 240 + 241 + regulators { 242 + aldo1 { 243 + regulator-min-microvolt = <1800000>; 244 + regulator-max-microvolt = <1800000>; 245 + regulator-name = "vcc-mipi-dsi"; 246 + }; 247 + 248 + dldo1 { 249 + /* not connected */ 250 + }; 251 + 252 + /* Supplies the "big" cluster (1.8 GHz cores) */ 253 + reg_dcdc1_323: dcdc1 { 254 + regulator-always-on; 255 + regulator-min-microvolt = <900000>; 256 + regulator-max-microvolt = <1160000>; 257 + regulator-name = "vdd-cpub"; 258 + }; 259 + 260 + /* DCDC2 is polyphased with DCDC1 */ 261 + 262 + /* RISC-V management core supply */ 263 + reg_dcdc3_323: dcdc3 { 264 + regulator-always-on; 265 + regulator-min-microvolt = <900000>; 266 + regulator-max-microvolt = <900000>; 267 + regulator-name = "vdd-dnr"; 268 + }; 269 + }; 270 + }; 271 + }; 272 + 273 + &r_pio { 274 + /* 275 + * Specifying the supply would create a circular dependency. 276 + * 277 + * vcc-pl-supply = <&reg_aldo3>; 278 + */ 279 + vcc-pm-supply = <&reg_aldo3>; 280 + }; 281 + 282 + &uart0 { 283 + pinctrl-names = "default"; 284 + pinctrl-0 = <&uart0_pb_pins>; 285 + status = "okay"; 286 + }; 287 + 288 + &usb_otg { 289 + /* 290 + * The USB-C port is the primary power supply, so in this configuration 291 + * relies on the other end of the USB cable to supply the VBUS power. 292 + * So use this port in peripheral mode. 293 + * It is possible to supply the board with the 5V pins on the GPIO 294 + * header, and since the DCIN_5V line is hardwired to the USB-C VBUS 295 + * pins, the port turns into a host port, unconditionally supplying 296 + * power. The dr_mode property should be changed to "host" here, if 297 + * users choose this setup. 298 + */ 299 + dr_mode = "peripheral"; 300 + status = "okay"; 301 + }; 302 + 303 + /* 304 + * The schematic describes USB0_ID (PL10), measuring VBUS_5V, which looks to 305 + * be always on. Also there is USB-VBUSDET (PL2), which is measuring the same 306 + * VBUS_5V. There is also DCIN_DET, which measures DCIN_5V, so the power 307 + * input rail. 308 + * None of them seem to make any sense in relation to detecting USB devices 309 + * or whether there is power provided via any USB pins: they would always 310 + * report high, otherwise the system wouldn't be running. 311 + * The AXP717C provides proper USB-C CC pin functionality, but the PMIC is 312 + * not connected to those pins of the USB-C connector. 313 + */ 314 + &usbphy { 315 + usb0_vbus-supply = <&reg_vcc5v>; 316 + usb1_vbus-supply = <&reg_usb_vbus>; 317 + status = "okay"; 318 + };
+287
arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 + // Copyright (C) 2024 Arm Ltd. 3 + 4 + /dts-v1/; 5 + 6 + #include "sun55i-a523.dtsi" 7 + 8 + #include <dt-bindings/gpio/gpio.h> 9 + 10 + / { 11 + model = "X96Q Pro+"; 12 + compatible = "amediatech,x96q-pro-plus", "allwinner,sun55i-h728"; 13 + 14 + aliases { 15 + serial0 = &uart0; 16 + }; 17 + 18 + chosen { 19 + stdout-path = "serial0:115200n8"; 20 + }; 21 + 22 + ext_osc32k: ext-osc32k-clk { 23 + #clock-cells = <0>; 24 + compatible = "fixed-clock"; 25 + clock-frequency = <32768>; 26 + clock-output-names = "ext_osc32k"; 27 + }; 28 + 29 + reg_vcc5v: vcc5v { 30 + /* board wide 5V supply from the barrel plug */ 31 + compatible = "regulator-fixed"; 32 + regulator-name = "vcc-5v"; 33 + regulator-min-microvolt = <5000000>; 34 + regulator-max-microvolt = <5000000>; 35 + regulator-always-on; 36 + }; 37 + 38 + reg_vcc3v3: vcc3v3 { 39 + /* 3.3V dummy supply for the SD card */ 40 + compatible = "regulator-fixed"; 41 + regulator-name = "vcc-3v3"; 42 + regulator-min-microvolt = <3300000>; 43 + regulator-max-microvolt = <3300000>; 44 + vin-supply = <&reg_vcc5v>; 45 + regulator-always-on; 46 + }; 47 + }; 48 + 49 + &ehci0 { 50 + status = "okay"; 51 + }; 52 + 53 + &ehci1 { 54 + status = "okay"; 55 + }; 56 + 57 + &mmc0 { 58 + vmmc-supply = <&reg_vcc3v3>; 59 + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ 60 + bus-width = <4>; 61 + disable-wp; 62 + status = "okay"; 63 + }; 64 + 65 + &mmc2 { 66 + vmmc-supply = <&reg_cldo3>; 67 + vqmmc-supply = <&reg_cldo1>; 68 + bus-width = <8>; 69 + non-removable; 70 + cap-mmc-hw-reset; 71 + mmc-ddr-1_8v; 72 + mmc-hs200-1_8v; 73 + status = "okay"; 74 + }; 75 + 76 + &ohci0 { 77 + status = "okay"; 78 + }; 79 + 80 + &ohci1 { 81 + status = "okay"; 82 + }; 83 + 84 + &pio { 85 + vcc-pb-supply = <&reg_cldo3>; /* via VCC-IO */ 86 + vcc-pc-supply = <&reg_cldo1>; 87 + vcc-pd-supply = <&reg_dcdc4>; 88 + vcc-pe-supply = <&reg_dcdc4>; 89 + vcc-pf-supply = <&reg_cldo3>; /* actually switchable */ 90 + vcc-pg-supply = <&reg_bldo1>; 91 + vcc-ph-supply = <&reg_cldo3>; /* via VCC-IO */ 92 + vcc-pi-supply = <&reg_dcdc4>; 93 + vcc-pj-supply = <&reg_dcdc4>; 94 + vcc-pk-supply = <&reg_bldo3>; 95 + }; 96 + 97 + &r_i2c0 { 98 + status = "okay"; 99 + 100 + axp717: pmic@34 { 101 + compatible = "x-powers,axp717"; 102 + reg = <0x34>; 103 + interrupt-controller; 104 + #interrupt-cells = <1>; 105 + interrupt-parent = <&nmi_intc>; 106 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 107 + 108 + vin1-supply = <&reg_vcc5v>; 109 + vin2-supply = <&reg_vcc5v>; 110 + vin3-supply = <&reg_vcc5v>; 111 + vin4-supply = <&reg_vcc5v>; 112 + aldoin-supply = <&reg_vcc5v>; 113 + bldoin-supply = <&reg_vcc5v>; 114 + cldoin-supply = <&reg_vcc5v>; 115 + 116 + regulators { 117 + /* Supplies the "little" cluster (1.0(?) GHz cores) */ 118 + reg_dcdc1: dcdc1 { 119 + regulator-always-on; 120 + regulator-min-microvolt = <900000>; 121 + regulator-max-microvolt = <1160000>; 122 + regulator-name = "vdd-cpul"; 123 + }; 124 + 125 + reg_dcdc2: dcdc2 { 126 + regulator-always-on; 127 + regulator-min-microvolt = <920000>; 128 + regulator-max-microvolt = <920000>; 129 + regulator-name = "vdd-gpu-sys"; 130 + }; 131 + 132 + reg_dcdc3: dcdc3 { 133 + regulator-always-on; 134 + regulator-min-microvolt = <1360000>; 135 + regulator-max-microvolt = <1360000>; 136 + regulator-name = "vdd-dram"; 137 + }; 138 + 139 + reg_dcdc4: dcdc4 { 140 + regulator-min-microvolt = <1000000>; 141 + regulator-max-microvolt = <1000000>; 142 + regulator-name = "vdd-dcdc4"; 143 + }; 144 + 145 + reg_aldo1: aldo1 { 146 + /* not connected */ 147 + }; 148 + 149 + reg_aldo2: aldo2 { 150 + /* not connected */ 151 + }; 152 + 153 + reg_aldo3: aldo3 { 154 + regulator-always-on; 155 + regulator-min-microvolt = <3300000>; 156 + regulator-max-microvolt = <3300000>; 157 + regulator-name = "vcc-aldo3"; 158 + }; 159 + 160 + reg_aldo4: aldo4 { 161 + regulator-always-on; 162 + regulator-min-microvolt = <1800000>; 163 + regulator-max-microvolt = <1800000>; 164 + regulator-name = "vcc-pll-dxco-avcc"; 165 + }; 166 + 167 + reg_bldo1: bldo1 { 168 + regulator-min-microvolt = <1800000>; 169 + regulator-max-microvolt = <1800000>; 170 + regulator-name = "vcc-pg-wifi-lvds"; 171 + }; 172 + 173 + reg_bldo2: bldo2 { 174 + regulator-always-on; 175 + regulator-min-microvolt = <1800000>; 176 + regulator-max-microvolt = <1800000>; 177 + regulator-name = "vcc-dram-1v8"; 178 + }; 179 + 180 + reg_bldo3: bldo3 { 181 + regulator-min-microvolt = <2800000>; 182 + regulator-max-microvolt = <2800000>; 183 + regulator-name = "vcc-bldo3"; 184 + }; 185 + 186 + reg_bldo4: bldo4 { 187 + /* not connected */ 188 + }; 189 + 190 + reg_cldo1: cldo1 { 191 + regulator-always-on; 192 + regulator-min-microvolt = <1800000>; 193 + regulator-max-microvolt = <1800000>; 194 + regulator-name = "vcc-codec-sd"; 195 + }; 196 + 197 + reg_cldo2: cldo2 { 198 + }; 199 + 200 + reg_cldo3: cldo3 { 201 + regulator-min-microvolt = <3300000>; 202 + regulator-max-microvolt = <3300000>; 203 + regulator-name = "vcc-codec-eth-sd"; 204 + }; 205 + 206 + reg_cldo4: cldo4 { 207 + regulator-min-microvolt = <3300000>; 208 + regulator-max-microvolt = <3300000>; 209 + regulator-name = "vcc-eth-phy"; 210 + }; 211 + 212 + reg_cpusldo: cpusldo { 213 + /* supplies the management core */ 214 + regulator-always-on; 215 + regulator-min-microvolt = <900000>; 216 + regulator-max-microvolt = <900000>; 217 + regulator-name = "vdd-cpus"; 218 + }; 219 + }; 220 + }; 221 + 222 + axp323: pmic@36 { 223 + compatible = "x-powers,axp323"; 224 + reg = <0x36>; 225 + #interrupt-cells = <1>; 226 + interrupt-controller; 227 + interrupt-parent = <&nmi_intc>; 228 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 229 + status = "okay"; 230 + 231 + vin1-supply = <&reg_vcc5v>; 232 + vin2-supply = <&reg_vcc5v>; 233 + vin3-supply = <&reg_vcc5v>; 234 + 235 + regulators { 236 + aldo1 { 237 + /* not connected */ 238 + }; 239 + 240 + dldo1 { 241 + /* not connected */ 242 + }; 243 + 244 + /* Supplies the "big" cluster (1.8 GHz cores) */ 245 + reg_dcdc1_323: dcdc1 { 246 + regulator-always-on; 247 + regulator-min-microvolt = <900000>; 248 + regulator-max-microvolt = <1160000>; 249 + regulator-name = "vdd-cpub"; 250 + }; 251 + 252 + /* DCDC2 is polyphased with DCDC1 */ 253 + 254 + reg_dcdc3_323: dcdc3 { 255 + regulator-always-on; 256 + regulator-min-microvolt = <1050000>; 257 + regulator-max-microvolt = <1050000>; 258 + regulator-name = "vdd-dcdc3"; 259 + }; 260 + }; 261 + }; 262 + }; 263 + 264 + &r_pio { 265 + /* 266 + * Specifying the supply would create a circular dependency. 267 + * 268 + * vcc-pl-supply = <&reg_aldo3>; 269 + */ 270 + vcc-pm-supply = <&reg_aldo3>; 271 + }; 272 + 273 + &uart0 { 274 + pinctrl-names = "default"; 275 + pinctrl-0 = <&uart0_pb_pins>; 276 + status = "okay"; 277 + }; 278 + 279 + &usb_otg { 280 + /* USB0 is a USB-A receptacle, always powered, so force host mode. */ 281 + dr_mode = "host"; 282 + status = "okay"; 283 + }; 284 + 285 + &usbphy { 286 + status = "okay"; 287 + };
+327
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 + // Copyright (C) 2024 Arm Ltd. 3 + 4 + /dts-v1/; 5 + 6 + #include "sun55i-a523.dtsi" 7 + 8 + #include <dt-bindings/gpio/gpio.h> 9 + 10 + / { 11 + model = "Avaota A1"; 12 + compatible = "yuzukihd,avaota-a1", "allwinner,sun55i-t527"; 13 + 14 + aliases { 15 + ethernet0 = &emac0; 16 + serial0 = &uart0; 17 + }; 18 + 19 + chosen { 20 + stdout-path = "serial0:115200n8"; 21 + }; 22 + 23 + ext_osc32k: ext-osc32k-clk { 24 + #clock-cells = <0>; 25 + compatible = "fixed-clock"; 26 + clock-frequency = <32768>; 27 + clock-output-names = "ext_osc32k"; 28 + }; 29 + 30 + reg_vcc12v: vcc12v { 31 + /* DC input jack */ 32 + compatible = "regulator-fixed"; 33 + regulator-name = "vcc-12v"; 34 + regulator-min-microvolt = <12000000>; 35 + regulator-max-microvolt = <12000000>; 36 + regulator-always-on; 37 + }; 38 + 39 + reg_vcc5v: vcc5v { 40 + /* board wide 5V supply from the 12V->5V regulator */ 41 + compatible = "regulator-fixed"; 42 + regulator-name = "vcc-5v"; 43 + regulator-min-microvolt = <5000000>; 44 + regulator-max-microvolt = <5000000>; 45 + vin-supply = <&reg_vcc12v>; 46 + regulator-always-on; 47 + }; 48 + 49 + reg_usb_vbus: vbus { 50 + compatible = "regulator-fixed"; 51 + regulator-name = "usb-vbus"; 52 + regulator-min-microvolt = <5000000>; 53 + regulator-max-microvolt = <5000000>; 54 + vin-supply = <&reg_vcc5v>; 55 + gpio = <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */ 56 + enable-active-high; 57 + }; 58 + }; 59 + 60 + &ehci0 { 61 + status = "okay"; 62 + }; 63 + 64 + &ehci1 { 65 + status = "okay"; 66 + }; 67 + 68 + &emac0 { 69 + phy-mode = "rgmii-id"; 70 + phy-handle = <&ext_rgmii_phy>; 71 + phy-supply = <&reg_dcdc4>; 72 + 73 + allwinner,tx-delay-ps = <100>; 74 + allwinner,rx-delay-ps = <300>; 75 + 76 + status = "okay"; 77 + }; 78 + 79 + &mdio0 { 80 + ext_rgmii_phy: ethernet-phy@1 { 81 + compatible = "ethernet-phy-ieee802.3-c22"; 82 + reg = <1>; 83 + }; 84 + }; 85 + 86 + &mmc0 { 87 + vmmc-supply = <&reg_cldo3>; 88 + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ 89 + bus-width = <4>; 90 + status = "okay"; 91 + }; 92 + 93 + &mmc2 { 94 + bus-width = <8>; 95 + cap-mmc-hw-reset; 96 + mmc-ddr-1_8v; 97 + mmc-hs200-1_8v; 98 + non-removable; 99 + vmmc-supply = <&reg_cldo3>; 100 + vqmmc-supply = <&reg_cldo1>; 101 + status = "okay"; 102 + }; 103 + 104 + &ohci0 { 105 + status = "okay"; 106 + }; 107 + 108 + &ohci1 { 109 + status = "okay"; 110 + }; 111 + 112 + &pio { 113 + vcc-pb-supply = <&reg_cldo3>; /* via VCC-IO */ 114 + vcc-pc-supply = <&reg_cldo1>; 115 + vcc-pd-supply = <&reg_dcdc4>; 116 + vcc-pe-supply = <&reg_dcdc4>; 117 + vcc-pf-supply = <&reg_cldo3>; /* actually switchable */ 118 + vcc-pg-supply = <&reg_bldo1>; 119 + vcc-ph-supply = <&reg_cldo3>; /* via VCC-IO */ 120 + vcc-pi-supply = <&reg_dcdc4>; 121 + vcc-pj-supply = <&reg_dcdc4>; 122 + vcc-pk-supply = <&reg_bldo3>; 123 + }; 124 + 125 + &r_i2c0 { 126 + status = "okay"; 127 + 128 + axp717: pmic@35 { 129 + compatible = "x-powers,axp717"; 130 + reg = <0x35>; 131 + interrupt-controller; 132 + #interrupt-cells = <1>; 133 + interrupt-parent = <&nmi_intc>; 134 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 135 + 136 + vin1-supply = <&reg_vcc5v>; 137 + vin2-supply = <&reg_vcc5v>; 138 + vin3-supply = <&reg_vcc5v>; 139 + vin4-supply = <&reg_vcc5v>; 140 + aldoin-supply = <&reg_vcc5v>; 141 + bldoin-supply = <&reg_vcc5v>; 142 + cldoin-supply = <&reg_vcc5v>; 143 + 144 + regulators { 145 + /* Supplies the "little" cluster (1.4 GHz cores) */ 146 + reg_dcdc1: dcdc1 { 147 + regulator-always-on; 148 + regulator-min-microvolt = <900000>; 149 + regulator-max-microvolt = <1160000>; 150 + regulator-name = "vdd-cpul"; 151 + }; 152 + 153 + reg_dcdc2: dcdc2 { 154 + regulator-always-on; 155 + regulator-min-microvolt = <920000>; 156 + regulator-max-microvolt = <920000>; 157 + regulator-name = "vdd-gpu-sys"; 158 + }; 159 + 160 + reg_dcdc3: dcdc3 { 161 + regulator-always-on; 162 + regulator-min-microvolt = <1160000>; 163 + regulator-max-microvolt = <1160000>; 164 + regulator-name = "vdd-dram"; 165 + }; 166 + 167 + reg_dcdc4: dcdc4 { 168 + regulator-always-on; 169 + regulator-min-microvolt = <3300000>; 170 + regulator-max-microvolt = <3300000>; 171 + regulator-name = "vdd-io"; 172 + }; 173 + 174 + reg_aldo1: aldo1 { 175 + /* not connected */ 176 + }; 177 + 178 + reg_aldo2: aldo2 { 179 + /* not connected */ 180 + }; 181 + 182 + reg_aldo3: aldo3 { 183 + /* supplies the I2C pins for this PMIC */ 184 + regulator-always-on; 185 + regulator-min-microvolt = <3300000>; 186 + regulator-max-microvolt = <3300000>; 187 + regulator-name = "vcc-pl-pm"; 188 + }; 189 + 190 + reg_aldo4: aldo4 { 191 + regulator-always-on; 192 + regulator-min-microvolt = <1800000>; 193 + regulator-max-microvolt = <1800000>; 194 + regulator-name = "vcc-pll-dxco-avcc"; 195 + }; 196 + 197 + reg_bldo1: bldo1 { 198 + regulator-min-microvolt = <1800000>; 199 + regulator-max-microvolt = <1800000>; 200 + regulator-name = "vcc-pg-wifi-lvds"; 201 + }; 202 + 203 + reg_bldo2: bldo2 { 204 + regulator-always-on; 205 + regulator-min-microvolt = <1800000>; 206 + regulator-max-microvolt = <1800000>; 207 + regulator-name = "vcc-dram-1v8"; 208 + }; 209 + 210 + reg_bldo3: bldo3 { 211 + regulator-min-microvolt = <1800000>; 212 + regulator-max-microvolt = <1800000>; 213 + regulator-name = "vcc-cvp-pk-vid1v8"; 214 + }; 215 + 216 + reg_bldo4: bldo4 { 217 + /* not connected */ 218 + }; 219 + 220 + reg_cldo1: cldo1 { 221 + regulator-min-microvolt = <1800000>; 222 + regulator-max-microvolt = <1800000>; 223 + regulator-name = "vcc-pc"; 224 + }; 225 + 226 + reg_cldo2: cldo2 { 227 + regulator-min-microvolt = <1800000>; 228 + regulator-max-microvolt = <1800000>; 229 + regulator-name = "vcc-efuse"; 230 + }; 231 + 232 + reg_cldo3: cldo3 { 233 + regulator-min-microvolt = <3300000>; 234 + regulator-max-microvolt = <3300000>; 235 + regulator-name = "vcc-io-mmc-spi-ana"; 236 + }; 237 + 238 + reg_cldo4: cldo4 { 239 + /* not connected */ 240 + }; 241 + 242 + reg_cpusldo: cpusldo { 243 + /* supplies the management core */ 244 + regulator-always-on; 245 + regulator-min-microvolt = <900000>; 246 + regulator-max-microvolt = <900000>; 247 + regulator-name = "vdd-cpus"; 248 + }; 249 + }; 250 + }; 251 + 252 + axp323: pmic@36 { 253 + compatible = "x-powers,axp323"; 254 + reg = <0x36>; 255 + #interrupt-cells = <1>; 256 + interrupt-controller; 257 + interrupt-parent = <&nmi_intc>; 258 + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 259 + status = "okay"; 260 + 261 + vin1-supply = <&reg_vcc5v>; 262 + vin2-supply = <&reg_vcc5v>; 263 + vin3-supply = <&reg_vcc5v>; 264 + 265 + regulators { 266 + aldo1 { 267 + /* not connected */ 268 + }; 269 + 270 + dldo1 { 271 + /* not connected */ 272 + }; 273 + 274 + /* Supplies the "big" cluster (1.8 GHz cores) */ 275 + reg_dcdc1_323: dcdc1 { 276 + regulator-always-on; 277 + regulator-min-microvolt = <900000>; 278 + regulator-max-microvolt = <1160000>; 279 + regulator-name = "vdd-cpub"; 280 + }; 281 + 282 + /* DCDC2 is polyphased with DCDC1 */ 283 + 284 + /* Some RISC-V management core related voltage */ 285 + reg_dcdc3_323: dcdc3 { 286 + regulator-always-on; 287 + regulator-min-microvolt = <900000>; 288 + regulator-max-microvolt = <900000>; 289 + regulator-name = "vdd-dnr"; 290 + }; 291 + }; 292 + }; 293 + }; 294 + 295 + &r_pio { 296 + /* 297 + * Specifying the supply would create a circular dependency. 298 + * 299 + * vcc-pl-supply = <&reg_aldo3>; 300 + */ 301 + vcc-pm-supply = <&reg_aldo3>; 302 + }; 303 + 304 + &uart0 { 305 + pinctrl-names = "default"; 306 + pinctrl-0 = <&uart0_pb_pins>; 307 + status = "okay"; 308 + }; 309 + 310 + &usb_otg { 311 + /* 312 + * The CC pins of the USB-C port have two pull-down resistors 313 + * connected to GND, which fixes this port to a peripheral role. 314 + * There is a regulator, controlled by a GPIO, to provide VBUS power 315 + * to the port, and a VBUSDET GPIO, to detect externally provided 316 + * power, but without the CC pins there is no real way to do a 317 + * runtime role detection. 318 + */ 319 + dr_mode = "peripheral"; 320 + status = "okay"; 321 + }; 322 + 323 + &usbphy { 324 + usb0_vbus-supply = <&reg_usb_vbus>; 325 + usb0_vbus_det-gpios = <&pio 8 13 GPIO_ACTIVE_HIGH>; /* PI13 */ 326 + status = "okay"; 327 + };