tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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platform/x86/intel/pmc: Find and register PMC telemetry entries

The PMC SSRAM device contains counters that are structured in Intel
Platform Monitoring Technology (PMT) telemetry regions. Look for and
register these telemetry regions from the driver so that they may be read
using the Intel PMT ABI.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-16-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

authored by

David E. Box and committed by
Hans de Goede 104f7494 642dd26f

+50
+1
drivers/platform/x86/intel/pmc/Kconfig
··· 7 7 tristate "Intel PMC Core driver" 8 8 depends on PCI 9 9 depends on ACPI 10 + depends on INTEL_PMT_TELEMETRY 10 11 help 11 12 The Intel Platform Controller Hub for Intel Core SoCs provides access 12 13 to Power Management Controller registers via various interfaces. This
+49
drivers/platform/x86/intel/pmc/core_ssram.c
··· 13 13 #include <linux/io-64-nonatomic-lo-hi.h> 14 14 15 15 #include "core.h" 16 + #include "../vsec.h" 17 + #include "../pmt/telemetry.h" 16 18 17 19 #define SSRAM_HDR_SIZE 0x100 18 20 #define SSRAM_PWRM_OFFSET 0x14 ··· 25 23 #define SSRAM_DEVID_OFFSET 0x70 26 24 27 25 DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T)); 26 + 27 + static void 28 + pmc_add_pmt(struct pmc_dev *pmcdev, u64 ssram_base, void __iomem *ssram) 29 + { 30 + struct pci_dev *pcidev = pmcdev->ssram_pcidev; 31 + struct intel_vsec_platform_info info = {}; 32 + struct intel_vsec_header *headers[2] = {}; 33 + struct intel_vsec_header header; 34 + void __iomem *dvsec; 35 + u32 dvsec_offset; 36 + u32 table, hdr; 37 + 38 + ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); 39 + if (!ssram) 40 + return; 41 + 42 + dvsec_offset = readl(ssram + SSRAM_DVSEC_OFFSET); 43 + iounmap(ssram); 44 + 45 + dvsec = ioremap(ssram_base + dvsec_offset, SSRAM_DVSEC_SIZE); 46 + if (!dvsec) 47 + return; 48 + 49 + hdr = readl(dvsec + PCI_DVSEC_HEADER1); 50 + header.id = readw(dvsec + PCI_DVSEC_HEADER2); 51 + header.rev = PCI_DVSEC_HEADER1_REV(hdr); 52 + header.length = PCI_DVSEC_HEADER1_LEN(hdr); 53 + header.num_entries = readb(dvsec + INTEL_DVSEC_ENTRIES); 54 + header.entry_size = readb(dvsec + INTEL_DVSEC_SIZE); 55 + 56 + table = readl(dvsec + INTEL_DVSEC_TABLE); 57 + header.tbir = INTEL_DVSEC_TABLE_BAR(table); 58 + header.offset = INTEL_DVSEC_TABLE_OFFSET(table); 59 + iounmap(dvsec); 60 + 61 + headers[0] = &header; 62 + info.caps = VSEC_CAP_TELEMETRY; 63 + info.headers = headers; 64 + info.base_addr = ssram_base; 65 + info.parent = &pmcdev->pdev->dev; 66 + 67 + intel_vsec_register(pcidev, &info); 68 + } 28 69 29 70 static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *list, u16 devid) 30 71 { ··· 146 101 pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET); 147 102 devid = readw(ssram + SSRAM_DEVID_OFFSET); 148 103 104 + /* Find and register and PMC telemetry entries */ 105 + pmc_add_pmt(pmcdev, ssram_base, ssram); 106 + 149 107 map = pmc_core_find_regmap(pmcdev->regmap_list, devid); 150 108 if (!map) 151 109 return -ENODEV; ··· 188 140 189 141 return ret; 190 142 } 143 + MODULE_IMPORT_NS(INTEL_VSEC);