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sata_sil24: Use memory barriers before issuing commands

The data in the cmd_block buffers may reach the main memory after the
writel() to the device ports. This patch introduces two calls to wmb()
to ensure the relative ordering.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Colin Tuckley <colin.tuckley@arm.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

authored by

Catalin Marinas and committed by
Jeff Garzik 10823452 14e45c15

+10
+10
drivers/ata/sata_sil24.c
··· 622 622 irq_enabled = readl(port + PORT_IRQ_ENABLE_SET); 623 623 writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR, port + PORT_IRQ_ENABLE_CLR); 624 624 625 + /* 626 + * The barrier is required to ensure that writes to cmd_block reach 627 + * the memory before the write to PORT_CMD_ACTIVATE. 628 + */ 629 + wmb(); 625 630 writel((u32)paddr, port + PORT_CMD_ACTIVATE); 626 631 writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); 627 632 ··· 900 895 paddr = pp->cmd_block_dma + tag * sizeof(*pp->cmd_block); 901 896 activate = port + PORT_CMD_ACTIVATE + tag * 8; 902 897 898 + /* 899 + * The barrier is required to ensure that writes to cmd_block reach 900 + * the memory before the write to PORT_CMD_ACTIVATE. 901 + */ 902 + wmb(); 903 903 writel((u32)paddr, activate); 904 904 writel((u64)paddr >> 32, activate + 4); 905 905