Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/ltphy: Hook up LT Phy Enable & Disable sequences
Hook up the LT Phy enable and disable sequences using encoder->
enable/disable_clock and reusing the TBT enable disable sequence from
cx0 PHY since it remains the same.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-18-suraj.kandpal@intel.com
+37
-4
+4
-3
drivers/gpu/drm/i915/display/intel_cx0_phy.c
+4
-3
drivers/gpu/drm/i915/display/intel_cx0_phy.c
···
18
18
#include "intel_display_utils.h"
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#include "intel_dp.h"
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#include "intel_hdmi.h"
21
+
#include "intel_lt_phy.h"
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#include "intel_panel.h"
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#include "intel_psr.h"
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#include "intel_snps_hdmi_pll.h"
···
3151
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}
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3151
}
3153
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3154
-
static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
3155
-
const struct intel_crtc_state *crtc_state)
3153
+
void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
3154
+
const struct intel_crtc_state *crtc_state)
3156
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{
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struct intel_display *display = to_intel_display(encoder);
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enum phy phy = intel_encoder_to_phy(encoder);
···
3336
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intel_cx0_get_pclk_pll_request(lane);
3337
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}
3338
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3339
-
static void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)
3338
+
void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder)
3340
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{
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struct intel_display *display = to_intel_display(encoder);
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enum phy phy = intel_encoder_to_phy(encoder);
+3
drivers/gpu/drm/i915/display/intel_cx0_phy.h
+3
drivers/gpu/drm/i915/display/intel_cx0_phy.h
···
63
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void intel_cx0_pll_power_save_wa(struct intel_display *display);
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void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder);
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#endif /* __INTEL_CX0_PHY_H__ */
+6
-1
drivers/gpu/drm/i915/display/intel_ddi.c
+6
-1
drivers/gpu/drm/i915/display/intel_ddi.c
···
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#include "intel_hotplug.h"
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#include "intel_hti.h"
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#include "intel_lspcon.h"
75
+
#include "intel_lt_phy.h"
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#include "intel_mg_phy_regs.h"
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#include "intel_modeset_lock.h"
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#include "intel_panel.h"
···
5232
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encoder->cloneable = 0;
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encoder->pipe_mask = ~0;
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-
if (DISPLAY_VER(display) >= 14) {
5234
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if (HAS_LT_PHY(display)) {
5235
+
encoder->enable_clock = intel_xe3plpd_pll_enable;
5236
+
encoder->disable_clock = intel_xe3plpd_pll_disable;
5237
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encoder->port_pll_type = intel_mtl_port_pll_type;
5238
+
} else if (DISPLAY_VER(display) >= 14) {
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encoder->enable_clock = intel_mtl_pll_enable;
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encoder->disable_clock = intel_mtl_pll_disable;
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encoder->port_pll_type = intel_mtl_port_pll_type;
+21
drivers/gpu/drm/i915/display/intel_lt_phy.c
+21
drivers/gpu/drm/i915/display/intel_lt_phy.c
···
1705
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intel_lt_phy_transaction_end(encoder, wakeref);
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}
1708
+
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void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
1710
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const struct intel_crtc_state *crtc_state)
1711
+
{
1712
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struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
1713
+
1714
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if (intel_tc_port_in_tbt_alt_mode(dig_port))
1715
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intel_mtl_tbt_pll_enable(encoder, crtc_state);
1716
+
else
1717
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intel_lt_phy_pll_enable(encoder, crtc_state);
1718
+
}
1719
+
1720
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void intel_xe3plpd_pll_disable(struct intel_encoder *encoder)
1721
+
{
1722
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struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
1723
+
1724
+
if (intel_tc_port_in_tbt_alt_mode(dig_port))
1725
+
intel_mtl_tbt_pll_disable(encoder);
1726
+
else
1727
+
intel_lt_phy_pll_disable(encoder);
1728
+
}
+3
drivers/gpu/drm/i915/display/intel_lt_phy.h
+3
drivers/gpu/drm/i915/display/intel_lt_phy.h
···
20
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struct intel_encoder *encoder);
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int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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+
void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
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+
const struct intel_crtc_state *crtc_state);
25
+
void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
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#define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35)
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