Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pinctrl-v4.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Linus writes:
"Pin control fixes for v4.19:
- Two fixes for the Intel pin controllers than cause
problems on laptops."
* tag 'pinctrl-v4.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: intel: Do pin translation in other GPIO operations as well
pinctrl: cannonlake: Fix gpio base for GPP-E
+96
-81
+1
-1
drivers/pinctrl/intel/pinctrl-cannonlake.c
+1
-1
drivers/pinctrl/intel/pinctrl-cannonlake.c
···
379
379
static const struct intel_padgroup cnlh_community3_gpps[] = {
380
380
CNL_GPP(0, 155, 178, 192), /* GPP_K */
381
381
CNL_GPP(1, 179, 202, 224), /* GPP_H */
382
-
CNL_GPP(2, 203, 215, 258), /* GPP_E */
382
+
CNL_GPP(2, 203, 215, 256), /* GPP_E */
383
383
CNL_GPP(3, 216, 239, 288), /* GPP_F */
384
384
CNL_GPP(4, 240, 248, CNL_NO_GPIO), /* SPI */
385
385
};
+95
-80
drivers/pinctrl/intel/pinctrl-intel.c
+95
-80
drivers/pinctrl/intel/pinctrl-intel.c
···
747
747
.owner = THIS_MODULE,
748
748
};
749
749
750
-
static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
751
-
{
752
-
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
753
-
void __iomem *reg;
754
-
u32 padcfg0;
755
-
756
-
reg = intel_get_padcfg(pctrl, offset, PADCFG0);
757
-
if (!reg)
758
-
return -EINVAL;
759
-
760
-
padcfg0 = readl(reg);
761
-
if (!(padcfg0 & PADCFG0_GPIOTXDIS))
762
-
return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
763
-
764
-
return !!(padcfg0 & PADCFG0_GPIORXSTATE);
765
-
}
766
-
767
-
static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
768
-
{
769
-
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
770
-
unsigned long flags;
771
-
void __iomem *reg;
772
-
u32 padcfg0;
773
-
774
-
reg = intel_get_padcfg(pctrl, offset, PADCFG0);
775
-
if (!reg)
776
-
return;
777
-
778
-
raw_spin_lock_irqsave(&pctrl->lock, flags);
779
-
padcfg0 = readl(reg);
780
-
if (value)
781
-
padcfg0 |= PADCFG0_GPIOTXSTATE;
782
-
else
783
-
padcfg0 &= ~PADCFG0_GPIOTXSTATE;
784
-
writel(padcfg0, reg);
785
-
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
786
-
}
787
-
788
-
static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
789
-
{
790
-
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
791
-
void __iomem *reg;
792
-
u32 padcfg0;
793
-
794
-
reg = intel_get_padcfg(pctrl, offset, PADCFG0);
795
-
if (!reg)
796
-
return -EINVAL;
797
-
798
-
padcfg0 = readl(reg);
799
-
800
-
if (padcfg0 & PADCFG0_PMODE_MASK)
801
-
return -EINVAL;
802
-
803
-
return !!(padcfg0 & PADCFG0_GPIOTXDIS);
804
-
}
805
-
806
-
static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
807
-
{
808
-
return pinctrl_gpio_direction_input(chip->base + offset);
809
-
}
810
-
811
-
static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
812
-
int value)
813
-
{
814
-
intel_gpio_set(chip, offset, value);
815
-
return pinctrl_gpio_direction_output(chip->base + offset);
816
-
}
817
-
818
-
static const struct gpio_chip intel_gpio_chip = {
819
-
.owner = THIS_MODULE,
820
-
.request = gpiochip_generic_request,
821
-
.free = gpiochip_generic_free,
822
-
.get_direction = intel_gpio_get_direction,
823
-
.direction_input = intel_gpio_direction_input,
824
-
.direction_output = intel_gpio_direction_output,
825
-
.get = intel_gpio_get,
826
-
.set = intel_gpio_set,
827
-
.set_config = gpiochip_generic_config,
828
-
};
829
-
830
750
/**
831
751
* intel_gpio_to_pin() - Translate from GPIO offset to pin number
832
752
* @pctrl: Pinctrl structure
···
791
871
792
872
return -EINVAL;
793
873
}
874
+
875
+
static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
876
+
{
877
+
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
878
+
void __iomem *reg;
879
+
u32 padcfg0;
880
+
int pin;
881
+
882
+
pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
883
+
if (pin < 0)
884
+
return -EINVAL;
885
+
886
+
reg = intel_get_padcfg(pctrl, pin, PADCFG0);
887
+
if (!reg)
888
+
return -EINVAL;
889
+
890
+
padcfg0 = readl(reg);
891
+
if (!(padcfg0 & PADCFG0_GPIOTXDIS))
892
+
return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
893
+
894
+
return !!(padcfg0 & PADCFG0_GPIORXSTATE);
895
+
}
896
+
897
+
static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
898
+
{
899
+
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
900
+
unsigned long flags;
901
+
void __iomem *reg;
902
+
u32 padcfg0;
903
+
int pin;
904
+
905
+
pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
906
+
if (pin < 0)
907
+
return;
908
+
909
+
reg = intel_get_padcfg(pctrl, pin, PADCFG0);
910
+
if (!reg)
911
+
return;
912
+
913
+
raw_spin_lock_irqsave(&pctrl->lock, flags);
914
+
padcfg0 = readl(reg);
915
+
if (value)
916
+
padcfg0 |= PADCFG0_GPIOTXSTATE;
917
+
else
918
+
padcfg0 &= ~PADCFG0_GPIOTXSTATE;
919
+
writel(padcfg0, reg);
920
+
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
921
+
}
922
+
923
+
static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
924
+
{
925
+
struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
926
+
void __iomem *reg;
927
+
u32 padcfg0;
928
+
int pin;
929
+
930
+
pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
931
+
if (pin < 0)
932
+
return -EINVAL;
933
+
934
+
reg = intel_get_padcfg(pctrl, pin, PADCFG0);
935
+
if (!reg)
936
+
return -EINVAL;
937
+
938
+
padcfg0 = readl(reg);
939
+
940
+
if (padcfg0 & PADCFG0_PMODE_MASK)
941
+
return -EINVAL;
942
+
943
+
return !!(padcfg0 & PADCFG0_GPIOTXDIS);
944
+
}
945
+
946
+
static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
947
+
{
948
+
return pinctrl_gpio_direction_input(chip->base + offset);
949
+
}
950
+
951
+
static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
952
+
int value)
953
+
{
954
+
intel_gpio_set(chip, offset, value);
955
+
return pinctrl_gpio_direction_output(chip->base + offset);
956
+
}
957
+
958
+
static const struct gpio_chip intel_gpio_chip = {
959
+
.owner = THIS_MODULE,
960
+
.request = gpiochip_generic_request,
961
+
.free = gpiochip_generic_free,
962
+
.get_direction = intel_gpio_get_direction,
963
+
.direction_input = intel_gpio_direction_input,
964
+
.direction_output = intel_gpio_direction_output,
965
+
.get = intel_gpio_get,
966
+
.set = intel_gpio_set,
967
+
.set_config = gpiochip_generic_config,
968
+
};
794
969
795
970
static int intel_gpio_irq_reqres(struct irq_data *d)
796
971
{