Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

remoteproc: imx_rproc: Move imx_rproc_dcfg closer to imx_rproc_of_match

Move the imx_rproc_dcfg structure definitions closer to imx_rproc_of_match
to prepare for adding start/stop/detect_mode ops for each i.MX variant.

This relocation avoids the need to declare function prototypes such as
'static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block)'
at the beginning of the file, improving code organization and readability.

No functional changes.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20250910-imx-rproc-cleanup-v2-2-10386685b8a9@nxp.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

authored by

Peng Fan and committed by
Mathieu Poirier
11a8d3cb ff24e5b2

+79 -79
+79 -79
drivers/remoteproc/imx_rproc.c
··· 285 285 { 0x80000000, 0x80000000, 0x60000000, 0 }, 286 286 }; 287 287 288 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = { 289 - .src_reg = IMX7D_SRC_SCR, 290 - .src_mask = IMX7D_M4_RST_MASK, 291 - .src_start = IMX7D_M4_START, 292 - .src_stop = IMX8M_M7_STOP, 293 - .gpr_reg = IMX8M_GPR22, 294 - .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT, 295 - .att = imx_rproc_att_imx8mn, 296 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 297 - .method = IMX_RPROC_MMIO, 298 - }; 299 - 300 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = { 301 - .att = imx_rproc_att_imx8mn, 302 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 303 - .method = IMX_RPROC_SMC, 304 - }; 305 - 306 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { 307 - .src_reg = IMX7D_SRC_SCR, 308 - .src_mask = IMX7D_M4_RST_MASK, 309 - .src_start = IMX7D_M4_START, 310 - .src_stop = IMX7D_M4_STOP, 311 - .att = imx_rproc_att_imx8mq, 312 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq), 313 - .method = IMX_RPROC_MMIO, 314 - }; 315 - 316 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = { 317 - .att = imx_rproc_att_imx8qm, 318 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8qm), 319 - .method = IMX_RPROC_SCU_API, 320 - }; 321 - 322 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = { 323 - .att = imx_rproc_att_imx8qxp, 324 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8qxp), 325 - .method = IMX_RPROC_SCU_API, 326 - }; 327 - 328 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = { 329 - .att = imx_rproc_att_imx8ulp, 330 - .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp), 331 - .method = IMX_RPROC_NONE, 332 - }; 333 - 334 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = { 335 - .att = imx_rproc_att_imx7ulp, 336 - .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp), 337 - .method = IMX_RPROC_NONE, 338 - .flags = IMX_RPROC_NEED_SYSTEM_OFF, 339 - }; 340 - 341 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { 342 - .src_reg = IMX7D_SRC_SCR, 343 - .src_mask = IMX7D_M4_RST_MASK, 344 - .src_start = IMX7D_M4_START, 345 - .src_stop = IMX7D_M4_STOP, 346 - .att = imx_rproc_att_imx7d, 347 - .att_size = ARRAY_SIZE(imx_rproc_att_imx7d), 348 - .method = IMX_RPROC_MMIO, 349 - }; 350 - 351 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = { 352 - .src_reg = IMX6SX_SRC_SCR, 353 - .src_mask = IMX6SX_M4_RST_MASK, 354 - .src_start = IMX6SX_M4_START, 355 - .src_stop = IMX6SX_M4_STOP, 356 - .att = imx_rproc_att_imx6sx, 357 - .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx), 358 - .method = IMX_RPROC_MMIO, 359 - }; 360 - 361 - static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = { 362 - .att = imx_rproc_att_imx93, 363 - .att_size = ARRAY_SIZE(imx_rproc_att_imx93), 364 - .method = IMX_RPROC_SMC, 365 - }; 366 - 367 288 static int imx_rproc_start(struct rproc *rproc) 368 289 { 369 290 struct imx_rproc *priv = rproc->priv; ··· 1142 1221 imx_rproc_free_mbox(rproc); 1143 1222 destroy_workqueue(priv->workqueue); 1144 1223 } 1224 + 1225 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = { 1226 + .src_reg = IMX7D_SRC_SCR, 1227 + .src_mask = IMX7D_M4_RST_MASK, 1228 + .src_start = IMX7D_M4_START, 1229 + .src_stop = IMX8M_M7_STOP, 1230 + .gpr_reg = IMX8M_GPR22, 1231 + .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT, 1232 + .att = imx_rproc_att_imx8mn, 1233 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1234 + .method = IMX_RPROC_MMIO, 1235 + }; 1236 + 1237 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = { 1238 + .att = imx_rproc_att_imx8mn, 1239 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1240 + .method = IMX_RPROC_SMC, 1241 + }; 1242 + 1243 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { 1244 + .src_reg = IMX7D_SRC_SCR, 1245 + .src_mask = IMX7D_M4_RST_MASK, 1246 + .src_start = IMX7D_M4_START, 1247 + .src_stop = IMX7D_M4_STOP, 1248 + .att = imx_rproc_att_imx8mq, 1249 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq), 1250 + .method = IMX_RPROC_MMIO, 1251 + }; 1252 + 1253 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = { 1254 + .att = imx_rproc_att_imx8qm, 1255 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8qm), 1256 + .method = IMX_RPROC_SCU_API, 1257 + }; 1258 + 1259 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = { 1260 + .att = imx_rproc_att_imx8qxp, 1261 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8qxp), 1262 + .method = IMX_RPROC_SCU_API, 1263 + }; 1264 + 1265 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = { 1266 + .att = imx_rproc_att_imx8ulp, 1267 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp), 1268 + .method = IMX_RPROC_NONE, 1269 + }; 1270 + 1271 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = { 1272 + .att = imx_rproc_att_imx7ulp, 1273 + .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp), 1274 + .method = IMX_RPROC_NONE, 1275 + .flags = IMX_RPROC_NEED_SYSTEM_OFF, 1276 + }; 1277 + 1278 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { 1279 + .src_reg = IMX7D_SRC_SCR, 1280 + .src_mask = IMX7D_M4_RST_MASK, 1281 + .src_start = IMX7D_M4_START, 1282 + .src_stop = IMX7D_M4_STOP, 1283 + .att = imx_rproc_att_imx7d, 1284 + .att_size = ARRAY_SIZE(imx_rproc_att_imx7d), 1285 + .method = IMX_RPROC_MMIO, 1286 + }; 1287 + 1288 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = { 1289 + .src_reg = IMX6SX_SRC_SCR, 1290 + .src_mask = IMX6SX_M4_RST_MASK, 1291 + .src_start = IMX6SX_M4_START, 1292 + .src_stop = IMX6SX_M4_STOP, 1293 + .att = imx_rproc_att_imx6sx, 1294 + .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx), 1295 + .method = IMX_RPROC_MMIO, 1296 + }; 1297 + 1298 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = { 1299 + .att = imx_rproc_att_imx93, 1300 + .att_size = ARRAY_SIZE(imx_rproc_att_imx93), 1301 + .method = IMX_RPROC_SMC, 1302 + }; 1145 1303 1146 1304 static const struct of_device_id imx_rproc_of_match[] = { 1147 1305 { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp },