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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
"One core framework fix to walk the orphan list and match up clks to
parents when clk providers register the DT provider after registering
all their clks (as they should).

Then a handful of driver fixes for the qcom, imx, and at91 drivers.

The driver fixes are relatively small fixes for incorrect register
settings or missing locks causing race conditions"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: Avoid SMMU/cx gdsc corner cases
clk: qcom: gcc-sc7180: Fix setting flag for votable GDSCs
clk: Move clk_core_reparent_orphans() under CONFIG_OF
clk: at91: fix possible deadlock
clk: walk orphan list on clock provider registration
clk: imx: pll14xx: fix clk_pll14xx_wait_lock
clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_table
clk: imx: clk-composite-8m: add lock to gate/mux

+56 -31
+1 -1
drivers/clk/at91/at91sam9260.c
··· 348 348 return; 349 349 mainxtal_name = of_clk_get_parent_name(np, i); 350 350 351 - regmap = syscon_node_to_regmap(np); 351 + regmap = device_node_to_regmap(np); 352 352 if (IS_ERR(regmap)) 353 353 return; 354 354
+1 -1
drivers/clk/at91/at91sam9rl.c
··· 83 83 return; 84 84 mainxtal_name = of_clk_get_parent_name(np, i); 85 85 86 - regmap = syscon_node_to_regmap(np); 86 + regmap = device_node_to_regmap(np); 87 87 if (IS_ERR(regmap)) 88 88 return; 89 89
+1 -1
drivers/clk/at91/at91sam9x5.c
··· 146 146 return; 147 147 mainxtal_name = of_clk_get_parent_name(np, i); 148 148 149 - regmap = syscon_node_to_regmap(np); 149 + regmap = device_node_to_regmap(np); 150 150 if (IS_ERR(regmap)) 151 151 return; 152 152
+1 -1
drivers/clk/at91/pmc.c
··· 275 275 276 276 np = of_find_matching_node(NULL, sama5d2_pmc_dt_ids); 277 277 278 - pmcreg = syscon_node_to_regmap(np); 278 + pmcreg = device_node_to_regmap(np); 279 279 if (IS_ERR(pmcreg)) 280 280 return PTR_ERR(pmcreg); 281 281
+1 -1
drivers/clk/at91/sama5d2.c
··· 162 162 return; 163 163 mainxtal_name = of_clk_get_parent_name(np, i); 164 164 165 - regmap = syscon_node_to_regmap(np); 165 + regmap = device_node_to_regmap(np); 166 166 if (IS_ERR(regmap)) 167 167 return; 168 168
+1 -1
drivers/clk/at91/sama5d4.c
··· 136 136 return; 137 137 mainxtal_name = of_clk_get_parent_name(np, i); 138 138 139 - regmap = syscon_node_to_regmap(np); 139 + regmap = device_node_to_regmap(np); 140 140 if (IS_ERR(regmap)) 141 141 return; 142 142
+40 -22
drivers/clk/clk.c
··· 3249 3249 } 3250 3250 #endif 3251 3251 3252 + static void clk_core_reparent_orphans_nolock(void) 3253 + { 3254 + struct clk_core *orphan; 3255 + struct hlist_node *tmp2; 3256 + 3257 + /* 3258 + * walk the list of orphan clocks and reparent any that newly finds a 3259 + * parent. 3260 + */ 3261 + hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { 3262 + struct clk_core *parent = __clk_init_parent(orphan); 3263 + 3264 + /* 3265 + * We need to use __clk_set_parent_before() and _after() to 3266 + * to properly migrate any prepare/enable count of the orphan 3267 + * clock. This is important for CLK_IS_CRITICAL clocks, which 3268 + * are enabled during init but might not have a parent yet. 3269 + */ 3270 + if (parent) { 3271 + /* update the clk tree topology */ 3272 + __clk_set_parent_before(orphan, parent); 3273 + __clk_set_parent_after(orphan, parent, NULL); 3274 + __clk_recalc_accuracies(orphan); 3275 + __clk_recalc_rates(orphan, 0); 3276 + } 3277 + } 3278 + } 3279 + 3252 3280 /** 3253 3281 * __clk_core_init - initialize the data structures in a struct clk_core 3254 3282 * @core: clk_core being initialized ··· 3287 3259 static int __clk_core_init(struct clk_core *core) 3288 3260 { 3289 3261 int ret; 3290 - struct clk_core *orphan; 3291 - struct hlist_node *tmp2; 3292 3262 unsigned long rate; 3293 3263 3294 3264 if (!core) ··· 3433 3407 clk_enable_unlock(flags); 3434 3408 } 3435 3409 3436 - /* 3437 - * walk the list of orphan clocks and reparent any that newly finds a 3438 - * parent. 3439 - */ 3440 - hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { 3441 - struct clk_core *parent = __clk_init_parent(orphan); 3410 + clk_core_reparent_orphans_nolock(); 3442 3411 3443 - /* 3444 - * We need to use __clk_set_parent_before() and _after() to 3445 - * to properly migrate any prepare/enable count of the orphan 3446 - * clock. This is important for CLK_IS_CRITICAL clocks, which 3447 - * are enabled during init but might not have a parent yet. 3448 - */ 3449 - if (parent) { 3450 - /* update the clk tree topology */ 3451 - __clk_set_parent_before(orphan, parent); 3452 - __clk_set_parent_after(orphan, parent, NULL); 3453 - __clk_recalc_accuracies(orphan); 3454 - __clk_recalc_rates(orphan, 0); 3455 - } 3456 - } 3457 3412 3458 3413 kref_init(&core->ref); 3459 3414 out: ··· 4186 4179 EXPORT_SYMBOL_GPL(clk_notifier_unregister); 4187 4180 4188 4181 #ifdef CONFIG_OF 4182 + static void clk_core_reparent_orphans(void) 4183 + { 4184 + clk_prepare_lock(); 4185 + clk_core_reparent_orphans_nolock(); 4186 + clk_prepare_unlock(); 4187 + } 4188 + 4189 4189 /** 4190 4190 * struct of_clk_provider - Clock provider registration structure 4191 4191 * @link: Entry in global list of clock providers ··· 4288 4274 mutex_unlock(&of_clk_mutex); 4289 4275 pr_debug("Added clock from %pOF\n", np); 4290 4276 4277 + clk_core_reparent_orphans(); 4278 + 4291 4279 ret = of_clk_set_defaults(np, true); 4292 4280 if (ret < 0) 4293 4281 of_clk_del_provider(np); ··· 4324 4308 list_add(&cp->link, &of_clk_providers); 4325 4309 mutex_unlock(&of_clk_mutex); 4326 4310 pr_debug("Added clk_hw provider from %pOF\n", np); 4311 + 4312 + clk_core_reparent_orphans(); 4327 4313 4328 4314 ret = of_clk_set_defaults(np, true); 4329 4315 if (ret < 0)
+2
drivers/clk/imx/clk-composite-8m.c
··· 142 142 mux->reg = reg; 143 143 mux->shift = PCG_PCS_SHIFT; 144 144 mux->mask = PCG_PCS_MASK; 145 + mux->lock = &imx_ccm_lock; 145 146 146 147 div = kzalloc(sizeof(*div), GFP_KERNEL); 147 148 if (!div) ··· 162 161 gate_hw = &gate->hw; 163 162 gate->reg = reg; 164 163 gate->bit_idx = PCG_CGC_SHIFT; 164 + gate->lock = &imx_ccm_lock; 165 165 166 166 hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, 167 167 mux_hw, &clk_mux_ops, div_hw,
+1
drivers/clk/imx/clk-imx7ulp.c
··· 40 40 { .val = 5, .div = 16, }, 41 41 { .val = 6, .div = 32, }, 42 42 { .val = 7, .div = 64, }, 43 + { /* sentinel */ }, 43 44 }; 44 45 45 46 static const int pcc2_uart_clk_ids[] __initconst = {
+1 -1
drivers/clk/imx/clk-pll14xx.c
··· 159 159 { 160 160 u32 val; 161 161 162 - return readl_poll_timeout(pll->base, val, val & LOCK_TIMEOUT_US, 0, 162 + return readl_poll_timeout(pll->base, val, val & LOCK_STATUS, 0, 163 163 LOCK_TIMEOUT_US); 164 164 } 165 165
+4 -2
drivers/clk/qcom/gcc-sc7180.c
··· 2186 2186 .pd = { 2187 2187 .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", 2188 2188 }, 2189 - .pwrsts = PWRSTS_OFF_ON | VOTABLE, 2189 + .pwrsts = PWRSTS_OFF_ON, 2190 + .flags = VOTABLE, 2190 2191 }; 2191 2192 2192 2193 static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = { ··· 2195 2194 .pd = { 2196 2195 .name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", 2197 2196 }, 2198 - .pwrsts = PWRSTS_OFF_ON | VOTABLE, 2197 + .pwrsts = PWRSTS_OFF_ON, 2198 + .flags = VOTABLE, 2199 2199 }; 2200 2200 2201 2201 static struct gdsc *gcc_sc7180_gdscs[] = {
+2
drivers/clk/qcom/gpucc-msm8998.c
··· 242 242 243 243 static struct gdsc gpu_cx_gdsc = { 244 244 .gdscr = 0x1004, 245 + .gds_hw_ctrl = 0x1008, 245 246 .pd = { 246 247 .name = "gpu_cx", 247 248 }, 248 249 .pwrsts = PWRSTS_OFF_ON, 250 + .flags = VOTABLE, 249 251 }; 250 252 251 253 static struct gdsc gpu_gx_gdsc = {