Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mtk-soc-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers
MediaTek driver updates for v6.11
This adds the previously missed Tone Curve Conversion (TCC)
MuteX bit to enable the same in MDP3 on the the MT8188 SoC,
disables 9-bit Alpha for display HDR support in MT8195 and
adds math operation support in the Global Command Engine for
all MediaTek SoCs, which will be used in the near future in
the ISP driver.
* tag 'mtk-soc-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
soc: mtk-cmdq: Add cmdq_pkt_logic_command to support math operation
soc: mediatek: Disable 9-bit alpha in ETHDR
soc: mediatek: mtk-mutex: Add MDP_TCC0 mod to MT8188 mutex table
Link: https://lore.kernel.org/r/20240628093801.126013-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+78
+34
drivers/soc/mediatek/mtk-cmdq-helper.c
+34
drivers/soc/mediatek/mtk-cmdq-helper.c
···
15
15
/* dedicate the last GPR_R15 to assign the register address to be poll */
16
16
#define CMDQ_POLL_ADDR_GPR (15)
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#define CMDQ_EOC_IRQ_EN BIT(0)
18
+
#define CMDQ_IMMEDIATE_VALUE 0
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#define CMDQ_REG_TYPE 1
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#define CMDQ_JUMP_RELATIVE 0
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#define CMDQ_JUMP_ABSOLUTE 1
···
45
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};
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u8 op;
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};
47
+
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+
static inline u8 cmdq_operand_get_type(struct cmdq_operand *op)
49
+
{
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+
return op->reg ? CMDQ_REG_TYPE : CMDQ_IMMEDIATE_VALUE;
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+
}
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+
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+
static inline u16 cmdq_operand_get_idx_value(struct cmdq_operand *op)
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+
{
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+
return op->reg ? op->idx : op->value;
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+
}
48
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int cmdq_dev_get_client_reg(struct device *dev,
50
59
struct cmdq_client_reg *client_reg, int idx)
···
471
460
return 0;
472
461
}
473
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EXPORT_SYMBOL(cmdq_pkt_poll_addr);
463
+
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+
int cmdq_pkt_logic_command(struct cmdq_pkt *pkt, u16 result_reg_idx,
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+
struct cmdq_operand *left_operand,
466
+
enum cmdq_logic_op s_op,
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+
struct cmdq_operand *right_operand)
468
+
{
469
+
struct cmdq_instruction inst = { {0} };
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+
471
+
if (!left_operand || !right_operand || s_op >= CMDQ_LOGIC_MAX)
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+
return -EINVAL;
473
+
474
+
inst.op = CMDQ_CODE_LOGIC;
475
+
inst.dst_t = CMDQ_REG_TYPE;
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+
inst.src_t = cmdq_operand_get_type(left_operand);
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+
inst.arg_c_t = cmdq_operand_get_type(right_operand);
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+
inst.sop = s_op;
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+
inst.reg_dst = result_reg_idx;
480
+
inst.src_reg = cmdq_operand_get_idx_value(left_operand);
481
+
inst.arg_c = cmdq_operand_get_idx_value(right_operand);
482
+
483
+
return cmdq_pkt_append_command(pkt, inst);
484
+
}
485
+
EXPORT_SYMBOL(cmdq_pkt_logic_command);
474
486
475
487
int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value)
476
488
{
+1
drivers/soc/mediatek/mtk-mmsys.c
+1
drivers/soc/mediatek/mtk-mmsys.c
···
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mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 4, ~0,
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alpha << 16 | alpha, cmdq_pkt);
239
+
mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, cmdq_pkt);
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mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx),
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alpha_sel << (19 + idx), cmdq_pkt);
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mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4,
+1
drivers/soc/mediatek/mtk-mutex.c
+1
drivers/soc/mediatek/mtk-mutex.c
···
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[MUTEX_MOD_IDX_MDP_PAD0] = MT8195_MUTEX_MOD_MDP_PAD0,
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[MUTEX_MOD_IDX_MDP_PAD2] = MT8195_MUTEX_MOD_MDP_PAD2,
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[MUTEX_MOD_IDX_MDP_PAD3] = MT8195_MUTEX_MOD_MDP_PAD3,
527
+
[MUTEX_MOD_IDX_MDP_TCC0] = MT8195_MUTEX_MOD_MDP_TCC0,
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[MUTEX_MOD_IDX_MDP_WROT0] = MT8195_MUTEX_MOD_MDP_WROT0,
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[MUTEX_MOD_IDX_MDP_WROT2] = MT8195_MUTEX_MOD_MDP_WROT2,
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[MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3,
+42
include/linux/soc/mediatek/mtk-cmdq.h
+42
include/linux/soc/mediatek/mtk-cmdq.h
···
25
25
26
26
struct cmdq_pkt;
27
27
28
+
enum cmdq_logic_op {
29
+
CMDQ_LOGIC_ASSIGN = 0,
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+
CMDQ_LOGIC_ADD = 1,
31
+
CMDQ_LOGIC_SUBTRACT = 2,
32
+
CMDQ_LOGIC_MULTIPLY = 3,
33
+
CMDQ_LOGIC_XOR = 8,
34
+
CMDQ_LOGIC_NOT = 9,
35
+
CMDQ_LOGIC_OR = 10,
36
+
CMDQ_LOGIC_AND = 11,
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+
CMDQ_LOGIC_LEFT_SHIFT = 12,
38
+
CMDQ_LOGIC_RIGHT_SHIFT = 13,
39
+
CMDQ_LOGIC_MAX,
40
+
};
41
+
42
+
struct cmdq_operand {
43
+
/* register type */
44
+
bool reg;
45
+
union {
46
+
/* index */
47
+
u16 idx;
48
+
/* value */
49
+
u16 value;
50
+
};
51
+
};
52
+
28
53
struct cmdq_client_reg {
29
54
u8 subsys;
30
55
u16 offset;
···
296
271
*/
297
272
int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
298
273
u16 offset, u32 value, u32 mask);
274
+
275
+
/**
276
+
* cmdq_pkt_logic_command() - Append logic command to the CMDQ packet, ask GCE to
277
+
* execute an instruction that store the result of logic operation
278
+
* with left and right operand into result_reg_idx.
279
+
* @pkt: the CMDQ packet
280
+
* @result_reg_idx: SPR index that store operation result of left_operand and right_operand
281
+
* @left_operand: left operand
282
+
* @s_op: the logic operator enum
283
+
* @right_operand: right operand
284
+
*
285
+
* Return: 0 for success; else the error code is returned
286
+
*/
287
+
int cmdq_pkt_logic_command(struct cmdq_pkt *pkt, u16 result_reg_idx,
288
+
struct cmdq_operand *left_operand,
289
+
enum cmdq_logic_op s_op,
290
+
struct cmdq_operand *right_operand);
299
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300
292
/**
301
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* cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE