Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/dsi: use intel_de_wait_custom() instead of wait_for_us()
Prefer the register read specific wait function over i915 wait_for_us().
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/1fe3d5ac314dd644573e9f59941e4c7f1d57b05d.1753956266.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+28
-13
+28
-13
drivers/gpu/drm/i915/display/icl_dsi.c
+28
-13
drivers/gpu/drm/i915/display/icl_dsi.c
···
137
137
/* wait for LP TX in progress bit to be cleared */
138
138
for_each_dsi_port(port, intel_dsi->ports) {
139
139
dsi_trans = dsi_port_to_transcoder(port);
140
-
if (wait_for_us(!(intel_de_read(display, DSI_LP_MSG(dsi_trans)) &
141
-
LPTX_IN_PROGRESS), 20))
140
+
141
+
ret = intel_de_wait_custom(display, DSI_LP_MSG(dsi_trans),
142
+
LPTX_IN_PROGRESS, 0,
143
+
20, 0, NULL);
144
+
if (ret)
142
145
drm_err(display->drm, "LPTX bit not cleared\n");
143
146
}
144
147
}
···
519
516
struct intel_display *display = to_intel_display(encoder);
520
517
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
521
518
enum port port;
519
+
int ret;
522
520
523
521
for_each_dsi_port(port, intel_dsi->ports) {
524
522
intel_de_rmw(display, DDI_BUF_CTL(port), 0, DDI_BUF_CTL_ENABLE);
525
523
526
-
if (wait_for_us(!(intel_de_read(display, DDI_BUF_CTL(port)) &
527
-
DDI_BUF_IS_IDLE),
528
-
500))
524
+
ret = intel_de_wait_custom(display, DDI_BUF_CTL(port),
525
+
DDI_BUF_IS_IDLE, 0,
526
+
500, 0, NULL);
527
+
if (ret)
529
528
drm_err(display->drm, "DDI port:%c buffer idle\n",
530
529
port_name(port));
531
530
}
···
843
838
844
839
/* wait for link ready */
845
840
for_each_dsi_port(port, intel_dsi->ports) {
841
+
int ret;
842
+
846
843
dsi_trans = dsi_port_to_transcoder(port);
847
-
if (wait_for_us((intel_de_read(display, DSI_TRANS_FUNC_CONF(dsi_trans)) &
848
-
LINK_READY), 2500))
844
+
845
+
ret = intel_de_wait_custom(display, DSI_TRANS_FUNC_CONF(dsi_trans),
846
+
LINK_READY, LINK_READY,
847
+
2500, 0, NULL);
848
+
if (ret)
849
849
drm_err(display->drm, "DSI link not ready\n");
850
850
}
851
851
}
···
1331
1321
enum port port;
1332
1322
enum transcoder dsi_trans;
1333
1323
u32 tmp;
1324
+
int ret;
1334
1325
1335
1326
/* disable periodic update mode */
1336
1327
if (is_cmd_mode(intel_dsi)) {
···
1348
1337
tmp &= ~LINK_ULPS_TYPE_LP11;
1349
1338
intel_de_write(display, DSI_LP_MSG(dsi_trans), tmp);
1350
1339
1351
-
if (wait_for_us((intel_de_read(display, DSI_LP_MSG(dsi_trans)) &
1352
-
LINK_IN_ULPS),
1353
-
10))
1340
+
ret = intel_de_wait_custom(display, DSI_LP_MSG(dsi_trans),
1341
+
LINK_IN_ULPS, LINK_IN_ULPS,
1342
+
10, 0, NULL);
1343
+
if (ret)
1354
1344
drm_err(display->drm, "DSI link not in ULPS\n");
1355
1345
}
1356
1346
···
1379
1367
struct intel_display *display = to_intel_display(encoder);
1380
1368
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1381
1369
enum port port;
1370
+
int ret;
1382
1371
1383
1372
gen11_dsi_ungate_clocks(encoder);
1384
1373
for_each_dsi_port(port, intel_dsi->ports) {
1385
1374
intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);
1386
1375
1387
-
if (wait_for_us((intel_de_read(display, DDI_BUF_CTL(port)) &
1388
-
DDI_BUF_IS_IDLE),
1389
-
8))
1376
+
ret = intel_de_wait_custom(display, DDI_BUF_CTL(port),
1377
+
DDI_BUF_IS_IDLE, DDI_BUF_IS_IDLE,
1378
+
8, 0, NULL);
1379
+
1380
+
if (ret)
1390
1381
drm_err(display->drm,
1391
1382
"DDI port:%c buffer not idle\n",
1392
1383
port_name(port));