tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'powerpc-5.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"One fix for a boot hang on some Freescale machines when PREEMPT is
enabled.

Two CVE fixes for bugs in our handling of FP registers and
transactional memory, both of which can result in corrupted FP state,
or FP state leaking between processes.

Thanks to: Chris Packham, Christophe Leroy, Gustavo Romero, Michael
Neuling"

* tag 'powerpc-5.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/tm: Fix restoring FP/VMX facility incorrectly on interrupts
powerpc/tm: Fix FP/VMX unavailable exceptions inside a transaction
powerpc/64e: Drop stale call to smp_processor_id() which hangs SMP startup

Linus Torvalds 13da6ac1 d41a3eff

+4 -18
+4 -17
arch/powerpc/kernel/process.c
··· 101 101 } 102 102 } 103 103 104 - static bool tm_active_with_fp(struct task_struct *tsk) 105 - { 106 - return MSR_TM_ACTIVE(tsk->thread.regs->msr) && 107 - (tsk->thread.ckpt_regs.msr & MSR_FP); 108 - } 109 - 110 - static bool tm_active_with_altivec(struct task_struct *tsk) 111 - { 112 - return MSR_TM_ACTIVE(tsk->thread.regs->msr) && 113 - (tsk->thread.ckpt_regs.msr & MSR_VEC); 114 - } 115 104 #else 116 105 static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 117 - static inline bool tm_active_with_fp(struct task_struct *tsk) { return false; } 118 - static inline bool tm_active_with_altivec(struct task_struct *tsk) { return false; } 119 106 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 120 107 121 108 bool strict_msr_control; ··· 239 252 240 253 static int restore_fp(struct task_struct *tsk) 241 254 { 242 - if (tsk->thread.load_fp || tm_active_with_fp(tsk)) { 255 + if (tsk->thread.load_fp) { 243 256 load_fp_state(&current->thread.fp_state); 244 257 current->thread.load_fp++; 245 258 return 1; ··· 321 334 322 335 static int restore_altivec(struct task_struct *tsk) 323 336 { 324 - if (cpu_has_feature(CPU_FTR_ALTIVEC) && 325 - (tsk->thread.load_vec || tm_active_with_altivec(tsk))) { 337 + if (cpu_has_feature(CPU_FTR_ALTIVEC) && (tsk->thread.load_vec)) { 326 338 load_vr_state(&tsk->thread.vr_state); 327 339 tsk->thread.used_vr = 1; 328 340 tsk->thread.load_vec++; ··· 483 497 if (!tsk->thread.regs) 484 498 return; 485 499 500 + check_if_tm_restore_required(tsk); 501 + 486 502 usermsr = tsk->thread.regs->msr; 487 503 488 504 if ((usermsr & msr_all_available) == 0) 489 505 return; 490 506 491 507 msr_check_and_set(msr_all_available); 492 - check_if_tm_restore_required(tsk); 493 508 494 509 WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 495 510
-1
arch/powerpc/mm/nohash/tlb.c
··· 630 630 #ifdef CONFIG_PPC_FSL_BOOK3E 631 631 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { 632 632 unsigned int num_cams; 633 - int __maybe_unused cpu = smp_processor_id(); 634 633 bool map = true; 635 634 636 635 /* use a quarter of the TLBCAM for bolted linear map */