RDMA/bnxt_re: Refactor bnxt_qplib_create_qp() function

+185 -16

drivers/infiniband/hw/bnxt_re/ib_verbs.c

··· 995 995 dev_err(rdev_to_dev(rdev), "Failed to delete unique GID, rc: %d\n", rc); 996 996 } 997 997 998 + static void bnxt_re_qp_free_umem(struct bnxt_re_qp *qp) 999 + { 1000 + ib_umem_release(qp->rumem); 1001 + ib_umem_release(qp->sumem); 1002 + } 1003 + 998 1004 /* Queue Pairs */ 999 1005 int bnxt_re_destroy_qp(struct ib_qp *ib_qp, struct ib_udata *udata) 1000 1006 { ··· 1047 1041 if (qp->qplib_qp.type == CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE) 1048 1042 bnxt_re_del_unique_gid(rdev); 1049 1043 1050 - ib_umem_release(qp->rumem); 1051 - ib_umem_release(qp->sumem); 1044 + bnxt_re_qp_free_umem(qp); 1052 1045 1053 1046 /* Flush all the entries of notification queue associated with 1054 1047 * given qp. ··· 1191 1186 } 1192 1187 1193 1188 qplib_qp->dpi = &cntx->dpi; 1189 + qplib_qp->is_user = true; 1194 1190 return 0; 1195 1191 rqfail: 1196 1192 ib_umem_release(qp->sumem); ··· 1249 1243 return NULL; 1250 1244 } 1251 1245 1246 + static int bnxt_re_qp_alloc_init_xrrq(struct bnxt_re_qp *qp) 1247 + { 1248 + struct bnxt_qplib_res *res = &qp->rdev->qplib_res; 1249 + struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp; 1250 + struct bnxt_qplib_hwq_attr hwq_attr = {}; 1251 + struct bnxt_qplib_sg_info sginfo = {}; 1252 + struct bnxt_qplib_hwq *irrq, *orrq; 1253 + int rc, req_size; 1254 + 1255 + orrq = &qplib_qp->orrq; 1256 + orrq->max_elements = 1257 + ORD_LIMIT_TO_ORRQ_SLOTS(qplib_qp->max_rd_atomic); 1258 + req_size = orrq->max_elements * 1259 + BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1260 + req_size &= ~(PAGE_SIZE - 1); 1261 + sginfo.pgsize = req_size; 1262 + sginfo.pgshft = PAGE_SHIFT; 1263 + 1264 + hwq_attr.res = res; 1265 + hwq_attr.sginfo = &sginfo; 1266 + hwq_attr.depth = orrq->max_elements; 1267 + hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE; 1268 + hwq_attr.aux_stride = 0; 1269 + hwq_attr.aux_depth = 0; 1270 + hwq_attr.type = HWQ_TYPE_CTX; 1271 + rc = bnxt_qplib_alloc_init_hwq(orrq, &hwq_attr); 1272 + if (rc) 1273 + return rc; 1274 + 1275 + irrq = &qplib_qp->irrq; 1276 + irrq->max_elements = 1277 + IRD_LIMIT_TO_IRRQ_SLOTS(qplib_qp->max_dest_rd_atomic); 1278 + req_size = irrq->max_elements * 1279 + BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1280 + req_size &= ~(PAGE_SIZE - 1); 1281 + sginfo.pgsize = req_size; 1282 + hwq_attr.sginfo = &sginfo; 1283 + hwq_attr.depth = irrq->max_elements; 1284 + hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE; 1285 + rc = bnxt_qplib_alloc_init_hwq(irrq, &hwq_attr); 1286 + if (rc) 1287 + goto free_orrq_hwq; 1288 + return 0; 1289 + free_orrq_hwq: 1290 + bnxt_qplib_free_hwq(res, orrq); 1291 + return rc; 1292 + } 1293 + 1294 + static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp) 1295 + { 1296 + struct bnxt_qplib_res *res = &qp->rdev->qplib_res; 1297 + struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp; 1298 + struct bnxt_qplib_hwq_attr hwq_attr = {}; 1299 + struct bnxt_qplib_q *sq = &qplib_qp->sq; 1300 + struct bnxt_qplib_q *rq = &qplib_qp->rq; 1301 + u8 wqe_mode = qplib_qp->wqe_mode; 1302 + u8 pg_sz_lvl; 1303 + int rc; 1304 + 1305 + hwq_attr.res = res; 1306 + hwq_attr.sginfo = &sq->sg_info; 1307 + hwq_attr.stride = bnxt_qplib_get_stride(); 1308 + hwq_attr.depth = bnxt_qplib_get_depth(sq, wqe_mode, true); 1309 + hwq_attr.aux_stride = qplib_qp->psn_sz; 1310 + hwq_attr.aux_depth = (qplib_qp->psn_sz) ? 1311 + bnxt_qplib_set_sq_size(sq, wqe_mode) : 0; 1312 + if (qplib_qp->is_host_msn_tbl && qplib_qp->psn_sz) 1313 + hwq_attr.aux_depth = qplib_qp->msn_tbl_sz; 1314 + hwq_attr.type = HWQ_TYPE_QUEUE; 1315 + rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr); 1316 + if (rc) 1317 + return rc; 1318 + 1319 + pg_sz_lvl = bnxt_qplib_base_pg_size(&sq->hwq) << CMDQ_CREATE_QP_SQ_PG_SIZE_SFT; 1320 + pg_sz_lvl |= ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK) << 1321 + CMDQ_CREATE_QP_SQ_LVL_SFT); 1322 + sq->hwq.pg_sz_lvl = pg_sz_lvl; 1323 + 1324 + hwq_attr.res = res; 1325 + hwq_attr.sginfo = &rq->sg_info; 1326 + hwq_attr.stride = bnxt_qplib_get_stride(); 1327 + hwq_attr.depth = bnxt_qplib_get_depth(rq, qplib_qp->wqe_mode, false); 1328 + hwq_attr.aux_stride = 0; 1329 + hwq_attr.aux_depth = 0; 1330 + hwq_attr.type = HWQ_TYPE_QUEUE; 1331 + rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr); 1332 + if (rc) 1333 + goto free_sq_hwq; 1334 + pg_sz_lvl = bnxt_qplib_base_pg_size(&rq->hwq) << 1335 + CMDQ_CREATE_QP_RQ_PG_SIZE_SFT; 1336 + pg_sz_lvl |= ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) << 1337 + CMDQ_CREATE_QP_RQ_LVL_SFT); 1338 + rq->hwq.pg_sz_lvl = pg_sz_lvl; 1339 + 1340 + if (qplib_qp->psn_sz) { 1341 + rc = bnxt_re_qp_alloc_init_xrrq(qp); 1342 + if (rc) 1343 + goto free_rq_hwq; 1344 + } 1345 + 1346 + return 0; 1347 + free_rq_hwq: 1348 + bnxt_qplib_free_hwq(res, &rq->hwq); 1349 + free_sq_hwq: 1350 + bnxt_qplib_free_hwq(res, &sq->hwq); 1351 + return rc; 1352 + } 1353 + 1252 1354 static struct bnxt_re_qp *bnxt_re_create_shadow_qp 1253 1355 (struct bnxt_re_pd *pd, 1254 1356 struct bnxt_qplib_res *qp1_res, ··· 1378 1264 qp->qplib_qp.pd = &pd->qplib_pd; 1379 1265 qp->qplib_qp.qp_handle = (u64)(unsigned long)(&qp->qplib_qp); 1380 1266 qp->qplib_qp.type = IB_QPT_UD; 1267 + qp->qplib_qp.cctx = rdev->chip_ctx; 1381 1268 1382 1269 qp->qplib_qp.max_inline_data = 0; 1383 1270 qp->qplib_qp.sig_type = true; ··· 1411 1296 qp->qplib_qp.rq_hdr_buf_size = BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6; 1412 1297 qp->qplib_qp.dpi = &rdev->dpi_privileged; 1413 1298 1414 - rc = bnxt_qplib_create_qp(qp1_res, &qp->qplib_qp); 1299 + rc = bnxt_re_setup_qp_hwqs(qp); 1415 1300 if (rc) 1416 1301 goto fail; 1302 + 1303 + rc = bnxt_qplib_create_qp(qp1_res, &qp->qplib_qp); 1304 + if (rc) 1305 + goto free_hwq; 1417 1306 1418 1307 spin_lock_init(&qp->sq_lock); 1419 1308 INIT_LIST_HEAD(&qp->list); ··· 1426 1307 atomic_inc(&rdev->stats.res.qp_count); 1427 1308 mutex_unlock(&rdev->qp_lock); 1428 1309 return qp; 1310 + 1311 + free_hwq: 1312 + bnxt_qplib_free_qp_res(&rdev->qplib_res, &qp->qplib_qp); 1429 1313 fail: 1430 1314 kfree(qp); 1431 1315 return NULL; ··· 1599 1477 return qptype; 1600 1478 } 1601 1479 1480 + static void bnxt_re_qp_calculate_msn_psn_size(struct bnxt_re_qp *qp) 1481 + { 1482 + struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp; 1483 + struct bnxt_qplib_q *sq = &qplib_qp->sq; 1484 + struct bnxt_re_dev *rdev = qp->rdev; 1485 + u8 wqe_mode = qplib_qp->wqe_mode; 1486 + 1487 + if (rdev->dev_attr) 1488 + qplib_qp->is_host_msn_tbl = 1489 + _is_host_msn_table(rdev->dev_attr->dev_cap_flags2); 1490 + 1491 + if (qplib_qp->type == CMDQ_CREATE_QP_TYPE_RC) { 1492 + qplib_qp->psn_sz = bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ? 1493 + sizeof(struct sq_psn_search_ext) : 1494 + sizeof(struct sq_psn_search); 1495 + if (qplib_qp->is_host_msn_tbl) { 1496 + qplib_qp->psn_sz = sizeof(struct sq_msn_search); 1497 + qplib_qp->msn = 0; 1498 + } 1499 + } 1500 + 1501 + /* Update msn tbl size */ 1502 + if (qplib_qp->is_host_msn_tbl && qplib_qp->psn_sz) { 1503 + if (wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) 1504 + qplib_qp->msn_tbl_sz = 1505 + roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, wqe_mode)); 1506 + else 1507 + qplib_qp->msn_tbl_sz = 1508 + roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, wqe_mode)) / 2; 1509 + qplib_qp->msn = 0; 1510 + } 1511 + } 1512 + 1602 1513 static int bnxt_re_init_qp_attr(struct bnxt_re_qp *qp, struct bnxt_re_pd *pd, 1603 1514 struct ib_qp_init_attr *init_attr, 1604 1515 struct bnxt_re_ucontext *uctx, ··· 1654 1499 qplqp->max_inline_data = init_attr->cap.max_inline_data; 1655 1500 qplqp->sig_type = init_attr->sq_sig_type == IB_SIGNAL_ALL_WR; 1656 1501 qptype = bnxt_re_init_qp_type(rdev, init_attr); 1657 - if (qptype < 0) { 1658 - rc = qptype; 1659 - goto out; 1660 - } 1502 + if (qptype < 0) 1503 + return qptype; 1661 1504 qplqp->type = (u8)qptype; 1662 1505 qplqp->wqe_mode = bnxt_re_is_var_size_supported(rdev, uctx); 1506 + qplqp->dev_cap_flags = dev_attr->dev_cap_flags; 1507 + qplqp->cctx = rdev->chip_ctx; 1663 1508 if (init_attr->qp_type == IB_QPT_RC) { 1664 1509 qplqp->max_rd_atomic = dev_attr->max_qp_rd_atom; 1665 1510 qplqp->max_dest_rd_atomic = dev_attr->max_qp_init_rd_atom; ··· 1689 1534 /* Setup RQ/SRQ */ 1690 1535 rc = bnxt_re_init_rq_attr(qp, init_attr, uctx); 1691 1536 if (rc) 1692 - goto out; 1537 + return rc; 1693 1538 if (init_attr->qp_type == IB_QPT_GSI) 1694 1539 bnxt_re_adjust_gsi_rq_attr(qp); 1695 1540 1696 1541 /* Setup SQ */ 1697 1542 rc = bnxt_re_init_sq_attr(qp, init_attr, uctx, ureq); 1698 1543 if (rc) 1699 - goto out; 1544 + return rc; 1700 1545 if (init_attr->qp_type == IB_QPT_GSI) 1701 1546 bnxt_re_adjust_gsi_sq_attr(qp, init_attr, uctx); 1702 1547 1703 - if (uctx) /* This will update DPI and qp_handle */ 1548 + if (uctx) { /* This will update DPI and qp_handle */ 1704 1549 rc = bnxt_re_init_user_qp(rdev, pd, qp, uctx, ureq); 1705 - out: 1550 + if (rc) 1551 + return rc; 1552 + } 1553 + 1554 + bnxt_re_qp_calculate_msn_psn_size(qp); 1555 + 1556 + rc = bnxt_re_setup_qp_hwqs(qp); 1557 + if (rc) 1558 + goto free_umem; 1559 + 1560 + return 0; 1561 + free_umem: 1562 + bnxt_re_qp_free_umem(qp); 1706 1563 return rc; 1707 1564 } 1708 1565 ··· 1771 1604 1772 1605 rdev = qp->rdev; 1773 1606 qplqp = &qp->qplib_qp; 1607 + qplqp->cctx = rdev->chip_ctx; 1774 1608 1775 1609 qplqp->rq_hdr_buf_size = BNXT_QPLIB_MAX_QP1_RQ_HDR_SIZE_V2; 1776 1610 qplqp->sq_hdr_buf_size = BNXT_QPLIB_MAX_QP1_SQ_HDR_SIZE_V2; ··· 1877 1709 if (rc == -ENODEV) 1878 1710 goto qp_destroy; 1879 1711 if (rc) 1880 - goto fail; 1712 + goto free_hwq; 1881 1713 } else { 1882 1714 rc = bnxt_qplib_create_qp(&rdev->qplib_res, &qp->qplib_qp); 1883 1715 if (rc) { 1884 1716 ibdev_err(&rdev->ibdev, "Failed to create HW QP"); 1885 - goto free_umem; 1717 + goto free_hwq; 1886 1718 } 1719 + 1887 1720 if (udata) { 1888 1721 struct bnxt_re_qp_resp resp; 1889 1722 ··· 1933 1764 return 0; 1934 1765 qp_destroy: 1935 1766 bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp); 1936 - free_umem: 1937 - ib_umem_release(qp->rumem); 1938 - ib_umem_release(qp->sumem); 1767 + free_hwq: 1768 + bnxt_qplib_free_qp_res(&rdev->qplib_res, &qp->qplib_qp); 1769 + bnxt_re_qp_free_umem(qp); 1939 1770 fail: 1940 1771 return rc; 1941 1772 }

+96 -209

drivers/infiniband/hw/bnxt_re/qplib_fp.c

··· 792 792 return 0; 793 793 } 794 794 795 - /* QP */ 796 - 797 795 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que) 798 796 { 799 797 int indx; ··· 810 812 return 0; 811 813 } 812 814 815 + static int bnxt_re_setup_qp_swqs(struct bnxt_qplib_qp *qplqp) 816 + { 817 + struct bnxt_qplib_q *sq = &qplqp->sq; 818 + struct bnxt_qplib_q *rq = &qplqp->rq; 819 + int rc; 820 + 821 + if (qplqp->is_user) 822 + return 0; 823 + 824 + rc = bnxt_qplib_alloc_init_swq(sq); 825 + if (rc) 826 + return rc; 827 + 828 + if (!qplqp->srq) { 829 + rc = bnxt_qplib_alloc_init_swq(rq); 830 + if (rc) 831 + goto free_sq_swq; 832 + } 833 + 834 + return 0; 835 + free_sq_swq: 836 + kfree(sq->swq); 837 + return rc; 838 + } 839 + 840 + static void bnxt_qp_init_dbinfo(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 841 + { 842 + struct bnxt_qplib_q *sq = &qp->sq; 843 + struct bnxt_qplib_q *rq = &qp->rq; 844 + 845 + sq->dbinfo.hwq = &sq->hwq; 846 + sq->dbinfo.xid = qp->id; 847 + sq->dbinfo.db = qp->dpi->dbr; 848 + sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 849 + sq->dbinfo.flags = 0; 850 + if (rq->max_wqe) { 851 + rq->dbinfo.hwq = &rq->hwq; 852 + rq->dbinfo.xid = qp->id; 853 + rq->dbinfo.db = qp->dpi->dbr; 854 + rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 855 + rq->dbinfo.flags = 0; 856 + } 857 + } 858 + 859 + static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size) 860 + { 861 + struct bnxt_qplib_hwq *sq_hwq; 862 + struct bnxt_qplib_q *sq; 863 + u64 fpsne, psn_pg; 864 + u16 indx_pad = 0; 865 + 866 + sq = &qp->sq; 867 + sq_hwq = &sq->hwq; 868 + /* First psn entry */ 869 + fpsne = (u64)bnxt_qplib_get_qe(sq_hwq, sq_hwq->depth, &psn_pg); 870 + if (!IS_ALIGNED(fpsne, PAGE_SIZE)) 871 + indx_pad = (fpsne & ~PAGE_MASK) / size; 872 + sq_hwq->pad_pgofft = indx_pad; 873 + sq_hwq->pad_pg = (u64 *)psn_pg; 874 + sq_hwq->pad_stride = size; 875 + } 876 + 877 + /* QP */ 813 878 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 814 879 { 815 - struct bnxt_qplib_hwq_attr hwq_attr = {}; 816 880 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 817 881 struct creq_create_qp1_resp resp = {}; 818 882 struct bnxt_qplib_cmdqmsg msg = {}; ··· 883 823 struct cmdq_create_qp1 req = {}; 884 824 struct bnxt_qplib_pbl *pbl; 885 825 u32 qp_flags = 0; 886 - u8 pg_sz_lvl; 887 826 u32 tbl_indx; 888 827 int rc; 889 828 ··· 896 837 req.qp_handle = cpu_to_le64(qp->qp_handle); 897 838 898 839 /* SQ */ 899 - hwq_attr.res = res; 900 - hwq_attr.sginfo = &sq->sg_info; 901 - hwq_attr.stride = sizeof(struct sq_sge); 902 - hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, false); 903 - hwq_attr.type = HWQ_TYPE_QUEUE; 904 - rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr); 905 - if (rc) 906 - return rc; 840 + sq->max_sw_wqe = bnxt_qplib_get_depth(sq, qp->wqe_mode, true); 841 + req.sq_size = cpu_to_le32(sq->max_sw_wqe); 842 + req.sq_pg_size_sq_lvl = sq->hwq.pg_sz_lvl; 907 843 908 - rc = bnxt_qplib_alloc_init_swq(sq); 909 - if (rc) 910 - goto fail_sq; 911 - 912 - req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 913 844 pbl = &sq->hwq.pbl[PBL_LVL_0]; 914 845 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 915 - pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) << 916 - CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT); 917 - pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK); 918 - req.sq_pg_size_sq_lvl = pg_sz_lvl; 919 846 req.sq_fwo_sq_sge = 920 847 cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) << 921 848 CMDQ_CREATE_QP1_SQ_SGE_SFT); ··· 910 865 /* RQ */ 911 866 if (rq->max_wqe) { 912 867 rq->dbinfo.flags = 0; 913 - hwq_attr.res = res; 914 - hwq_attr.sginfo = &rq->sg_info; 915 - hwq_attr.stride = sizeof(struct sq_sge); 916 - hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false); 917 - hwq_attr.type = HWQ_TYPE_QUEUE; 918 - rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr); 919 - if (rc) 920 - goto sq_swq; 921 - rc = bnxt_qplib_alloc_init_swq(rq); 922 - if (rc) 923 - goto fail_rq; 924 868 req.rq_size = cpu_to_le32(rq->max_wqe); 925 869 pbl = &rq->hwq.pbl[PBL_LVL_0]; 926 870 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 927 - pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) << 928 - CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT); 929 - pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK); 930 - req.rq_pg_size_rq_lvl = pg_sz_lvl; 871 + req.rq_pg_size_rq_lvl = rq->hwq.pg_sz_lvl; 931 872 req.rq_fwo_rq_sge = 932 873 cpu_to_le16((rq->max_sge & 933 874 CMDQ_CREATE_QP1_RQ_SGE_MASK) << ··· 924 893 rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); 925 894 if (rc) { 926 895 rc = -ENOMEM; 927 - goto rq_rwq; 896 + return rc; 928 897 } 929 898 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE; 930 899 req.qp_flags = cpu_to_le32(qp_flags); ··· 937 906 938 907 qp->id = le32_to_cpu(resp.xid); 939 908 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 940 - qp->cctx = res->cctx; 941 - sq->dbinfo.hwq = &sq->hwq; 942 - sq->dbinfo.xid = qp->id; 943 - sq->dbinfo.db = qp->dpi->dbr; 944 - sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 945 - if (rq->max_wqe) { 946 - rq->dbinfo.hwq = &rq->hwq; 947 - rq->dbinfo.xid = qp->id; 948 - rq->dbinfo.db = qp->dpi->dbr; 949 - rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 950 - } 909 + 910 + rc = bnxt_re_setup_qp_swqs(qp); 911 + if (rc) 912 + goto destroy_qp; 913 + bnxt_qp_init_dbinfo(res, qp); 914 + 951 915 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 952 916 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 953 917 rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp; 954 918 955 919 return 0; 956 920 921 + destroy_qp: 922 + bnxt_qplib_destroy_qp(res, qp); 957 923 fail: 958 924 bnxt_qplib_free_qp_hdr_buf(res, qp); 959 - rq_rwq: 960 - kfree(rq->swq); 961 - fail_rq: 962 - bnxt_qplib_free_hwq(res, &rq->hwq); 963 - sq_swq: 964 - kfree(sq->swq); 965 - fail_sq: 966 - bnxt_qplib_free_hwq(res, &sq->hwq); 967 925 return rc; 968 - } 969 - 970 - static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size) 971 - { 972 - struct bnxt_qplib_hwq *hwq; 973 - struct bnxt_qplib_q *sq; 974 - u64 fpsne, psn_pg; 975 - u16 indx_pad = 0; 976 - 977 - sq = &qp->sq; 978 - hwq = &sq->hwq; 979 - /* First psn entry */ 980 - fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg); 981 - if (!IS_ALIGNED(fpsne, PAGE_SIZE)) 982 - indx_pad = (fpsne & ~PAGE_MASK) / size; 983 - hwq->pad_pgofft = indx_pad; 984 - hwq->pad_pg = (u64 *)psn_pg; 985 - hwq->pad_stride = size; 986 926 } 987 927 988 928 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 989 929 { 990 930 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 991 - struct bnxt_qplib_hwq_attr hwq_attr = {}; 992 - struct bnxt_qplib_sg_info sginfo = {}; 993 931 struct creq_create_qp_resp resp = {}; 994 932 struct bnxt_qplib_cmdqmsg msg = {}; 995 933 struct bnxt_qplib_q *sq = &qp->sq; 996 934 struct bnxt_qplib_q *rq = &qp->rq; 997 935 struct cmdq_create_qp req = {}; 998 - int rc, req_size, psn_sz = 0; 999 - struct bnxt_qplib_hwq *xrrq; 1000 936 struct bnxt_qplib_pbl *pbl; 1001 937 u32 qp_flags = 0; 1002 - u8 pg_sz_lvl; 1003 938 u32 tbl_indx; 1004 939 u16 nsge; 940 + int rc; 1005 941 1006 - qp->is_host_msn_tbl = _is_host_msn_table(res->dattr->dev_cap_flags2); 1007 942 sq->dbinfo.flags = 0; 1008 943 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1009 944 CMDQ_BASE_OPCODE_CREATE_QP, ··· 981 984 req.qp_handle = cpu_to_le64(qp->qp_handle); 982 985 983 986 /* SQ */ 984 - if (qp->type == CMDQ_CREATE_QP_TYPE_RC) { 985 - psn_sz = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ? 986 - sizeof(struct sq_psn_search_ext) : 987 - sizeof(struct sq_psn_search); 988 - 989 - if (qp->is_host_msn_tbl) { 990 - psn_sz = sizeof(struct sq_msn_search); 991 - qp->msn = 0; 992 - } 993 - } 994 - 995 - hwq_attr.res = res; 996 - hwq_attr.sginfo = &sq->sg_info; 997 - hwq_attr.stride = sizeof(struct sq_sge); 998 - hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, true); 999 - hwq_attr.aux_stride = psn_sz; 1000 - hwq_attr.aux_depth = psn_sz ? bnxt_qplib_set_sq_size(sq, qp->wqe_mode) 1001 - : 0; 1002 - /* Update msn tbl size */ 1003 - if (qp->is_host_msn_tbl && psn_sz) { 1004 - if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) 1005 - hwq_attr.aux_depth = 1006 - roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 1007 - else 1008 - hwq_attr.aux_depth = 1009 - roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)) / 2; 1010 - qp->msn_tbl_sz = hwq_attr.aux_depth; 1011 - qp->msn = 0; 1012 - } 1013 - 1014 - hwq_attr.type = HWQ_TYPE_QUEUE; 1015 - rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr); 1016 - if (rc) 1017 - return rc; 1018 - 1019 - if (!sq->hwq.is_user) { 1020 - rc = bnxt_qplib_alloc_init_swq(sq); 1021 - if (rc) 1022 - goto fail_sq; 1023 - 1024 - if (psn_sz) 1025 - bnxt_qplib_init_psn_ptr(qp, psn_sz); 1026 - } 1027 - req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 987 + req.sq_size = cpu_to_le32(sq->max_sw_wqe); 1028 988 pbl = &sq->hwq.pbl[PBL_LVL_0]; 1029 989 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 1030 - pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) << 1031 - CMDQ_CREATE_QP_SQ_PG_SIZE_SFT); 1032 - pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK); 1033 - req.sq_pg_size_sq_lvl = pg_sz_lvl; 990 + req.sq_pg_size_sq_lvl = sq->hwq.pg_sz_lvl; 1034 991 req.sq_fwo_sq_sge = 1035 992 cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) << 1036 993 CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); ··· 993 1042 /* RQ */ 994 1043 if (!qp->srq) { 995 1044 rq->dbinfo.flags = 0; 996 - hwq_attr.res = res; 997 - hwq_attr.sginfo = &rq->sg_info; 998 - hwq_attr.stride = sizeof(struct sq_sge); 999 - hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false); 1000 - hwq_attr.aux_stride = 0; 1001 - hwq_attr.aux_depth = 0; 1002 - hwq_attr.type = HWQ_TYPE_QUEUE; 1003 - rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr); 1004 - if (rc) 1005 - goto sq_swq; 1006 - if (!rq->hwq.is_user) { 1007 - rc = bnxt_qplib_alloc_init_swq(rq); 1008 - if (rc) 1009 - goto fail_rq; 1010 - } 1011 - 1012 1045 req.rq_size = cpu_to_le32(rq->max_wqe); 1013 1046 pbl = &rq->hwq.pbl[PBL_LVL_0]; 1014 1047 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 1015 - pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) << 1016 - CMDQ_CREATE_QP_RQ_PG_SIZE_SFT); 1017 - pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK); 1018 - req.rq_pg_size_rq_lvl = pg_sz_lvl; 1048 + req.rq_pg_size_rq_lvl = rq->hwq.pg_sz_lvl; 1019 1049 nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ? 1020 1050 6 : rq->max_sge; 1021 1051 req.rq_fwo_rq_sge = ··· 1022 1090 req.qp_flags = cpu_to_le32(qp_flags); 1023 1091 1024 1092 /* ORRQ and IRRQ */ 1025 - if (psn_sz) { 1026 - xrrq = &qp->orrq; 1027 - xrrq->max_elements = 1028 - ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1029 - req_size = xrrq->max_elements * 1030 - BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1031 - req_size &= ~(PAGE_SIZE - 1); 1032 - sginfo.pgsize = req_size; 1033 - sginfo.pgshft = PAGE_SHIFT; 1034 - 1035 - hwq_attr.res = res; 1036 - hwq_attr.sginfo = &sginfo; 1037 - hwq_attr.depth = xrrq->max_elements; 1038 - hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE; 1039 - hwq_attr.aux_stride = 0; 1040 - hwq_attr.aux_depth = 0; 1041 - hwq_attr.type = HWQ_TYPE_CTX; 1042 - rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr); 1043 - if (rc) 1044 - goto rq_swq; 1045 - pbl = &xrrq->pbl[PBL_LVL_0]; 1046 - req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1047 - 1048 - xrrq = &qp->irrq; 1049 - xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS( 1050 - qp->max_dest_rd_atomic); 1051 - req_size = xrrq->max_elements * 1052 - BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1053 - req_size &= ~(PAGE_SIZE - 1); 1054 - sginfo.pgsize = req_size; 1055 - hwq_attr.depth = xrrq->max_elements; 1056 - hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE; 1057 - rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr); 1058 - if (rc) 1059 - goto fail_orrq; 1060 - 1061 - pbl = &xrrq->pbl[PBL_LVL_0]; 1062 - req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1093 + if (qp->psn_sz) { 1094 + req.orrq_addr = cpu_to_le64(bnxt_qplib_get_base_addr(&qp->orrq)); 1095 + req.irrq_addr = cpu_to_le64(bnxt_qplib_get_base_addr(&qp->irrq)); 1063 1096 } 1064 1097 req.pd_id = cpu_to_le32(qp->pd->id); 1065 1098 ··· 1032 1135 sizeof(resp), 0); 1033 1136 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1034 1137 if (rc) 1035 - goto fail; 1138 + return rc; 1036 1139 1037 1140 qp->id = le32_to_cpu(resp.xid); 1141 + 1142 + if (!qp->is_user) { 1143 + rc = bnxt_re_setup_qp_swqs(qp); 1144 + if (rc) 1145 + goto destroy_qp; 1146 + } 1147 + bnxt_qp_init_dbinfo(res, qp); 1148 + if (qp->psn_sz) 1149 + bnxt_qplib_init_psn_ptr(qp, qp->psn_sz); 1150 + 1038 1151 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 1039 1152 INIT_LIST_HEAD(&qp->sq_flush); 1040 1153 INIT_LIST_HEAD(&qp->rq_flush); 1041 1154 qp->cctx = res->cctx; 1042 - sq->dbinfo.hwq = &sq->hwq; 1043 - sq->dbinfo.xid = qp->id; 1044 - sq->dbinfo.db = qp->dpi->dbr; 1045 - sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 1046 - if (rq->max_wqe) { 1047 - rq->dbinfo.hwq = &rq->hwq; 1048 - rq->dbinfo.xid = qp->id; 1049 - rq->dbinfo.db = qp->dpi->dbr; 1050 - rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 1051 - } 1052 1155 spin_lock_bh(&rcfw->tbl_lock); 1053 1156 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 1054 1157 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; ··· 1056 1159 spin_unlock_bh(&rcfw->tbl_lock); 1057 1160 1058 1161 return 0; 1059 - fail: 1060 - bnxt_qplib_free_hwq(res, &qp->irrq); 1061 - fail_orrq: 1062 - bnxt_qplib_free_hwq(res, &qp->orrq); 1063 - rq_swq: 1064 - kfree(rq->swq); 1065 - fail_rq: 1066 - bnxt_qplib_free_hwq(res, &rq->hwq); 1067 - sq_swq: 1068 - kfree(sq->swq); 1069 - fail_sq: 1070 - bnxt_qplib_free_hwq(res, &sq->hwq); 1162 + destroy_qp: 1163 + bnxt_qplib_destroy_qp(res, qp); 1071 1164 return rc; 1072 1165 } 1073 1166

+8

drivers/infiniband/hw/bnxt_re/qplib_fp.h

··· 279 279 u8 wqe_mode; 280 280 u8 state; 281 281 u8 cur_qp_state; 282 + u8 is_user; 282 283 u64 modify_flags; 283 284 u32 ext_modify_flags; 284 285 u32 max_inline_data; ··· 345 344 struct list_head rq_flush; 346 345 u32 msn; 347 346 u32 msn_tbl_sz; 347 + u32 psn_sz; 348 348 bool is_host_msn_tbl; 349 349 u8 tos_dscp; 350 350 u32 ugid_index; 351 + u16 dev_cap_flags; 351 352 u32 rate_limit; 352 353 u8 shaper_allocation_status; 353 354 }; ··· 618 615 static inline void bnxt_qplib_swq_mod_start(struct bnxt_qplib_q *que, u32 idx) 619 616 { 620 617 que->swq_start = que->swq[idx].next_idx; 618 + } 619 + 620 + static inline u32 bnxt_qplib_get_stride(void) 621 + { 622 + return sizeof(struct sq_sge); 621 623 } 622 624 623 625 static inline u32 bnxt_qplib_get_depth(struct bnxt_qplib_q *que, u8 wqe_mode, bool is_sq)

+6

drivers/infiniband/hw/bnxt_re/qplib_res.h

··· 198 198 u32 cons; /* raw */ 199 199 u8 cp_bit; 200 200 u8 is_user; 201 + u8 pg_sz_lvl; 201 202 u64 *pad_pg; 202 203 u32 pad_stride; 203 204 u32 pad_pgofft; ··· 357 356 return bnxt_qplib_is_chip_gen_p5_p7(cctx) ? 358 357 RING_ALLOC_REQ_RING_TYPE_NQ : 359 358 RING_ALLOC_REQ_RING_TYPE_ROCE_CMPL; 359 + } 360 + 361 + static inline u64 bnxt_qplib_get_base_addr(struct bnxt_qplib_hwq *hwq) 362 + { 363 + return hwq->pbl[PBL_LVL_0].pg_map_arr[0]; 360 364 } 361 365 362 366 static inline u8 bnxt_qplib_base_pg_size(struct bnxt_qplib_hwq *hwq)

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