Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge drm/drm-fixes into drm-misc-fixes
Backmerging to get fixes from v6.12-rc7.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
+1955
-1310
+1
.mailmap
+1
.mailmap
···
665
665
Thomas Graf <tgraf@suug.ch>
666
666
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
667
667
Thomas Pedersen <twp@codeaurora.org>
668
+
Thorsten Blum <thorsten.blum@linux.dev> <thorsten.blum@toblux.com>
668
669
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
669
670
Tingwei Zhang <quic_tingwei@quicinc.com> <tingwei@codeaurora.org>
670
671
Tirupathi Reddy <quic_tirupath@quicinc.com> <tirupath@codeaurora.org>
+4
CREDITS
+4
CREDITS
+1
-1
Documentation/admin-guide/kernel-parameters.txt
+1
-1
Documentation/admin-guide/kernel-parameters.txt
···
6688
6688
0: no polling (default)
6689
6689
6690
6690
thp_anon= [KNL]
6691
-
Format: <size>,<size>[KMG]:<state>;<size>-<size>[KMG]:<state>
6691
+
Format: <size>[KMG],<size>[KMG]:<state>;<size>[KMG]-<size>[KMG]:<state>
6692
6692
state is one of "always", "madvise", "never" or "inherit".
6693
6693
Control the default behavior of the system with respect
6694
6694
to anonymous transparent hugepages.
+1
-1
Documentation/admin-guide/mm/transhuge.rst
+1
-1
Documentation/admin-guide/mm/transhuge.rst
···
303
303
kernel command line.
304
304
305
305
Alternatively, each supported anonymous THP size can be controlled by
306
-
passing ``thp_anon=<size>,<size>[KMG]:<state>;<size>-<size>[KMG]:<state>``,
306
+
passing ``thp_anon=<size>[KMG],<size>[KMG]:<state>;<size>[KMG]-<size>[KMG]:<state>``,
307
307
where ``<size>`` is the THP size (must be a power of 2 of PAGE_SIZE and
308
308
supported anonymous THP) and ``<state>`` is one of ``always``, ``madvise``,
309
309
``never`` or ``inherit``.
+1
-1
Documentation/devicetree/bindings/firmware/arm,scmi.yaml
+1
-1
Documentation/devicetree/bindings/firmware/arm,scmi.yaml
···
124
124
atomic mode of operation, even if requested.
125
125
default: 0
126
126
127
-
max-rx-timeout-ms:
127
+
arm,max-rx-timeout-ms:
128
128
description:
129
129
An optional time value, expressed in milliseconds, representing the
130
130
transport maximum timeout value for the receive channel. The value should
+1
-1
Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
+1
-1
Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
-1
Documentation/netlink/specs/mptcp_pm.yaml
-1
Documentation/netlink/specs/mptcp_pm.yaml
+1
-1
Documentation/networking/j1939.rst
+1
-1
Documentation/networking/j1939.rst
···
121
121
122
122
On the other hand, when using PDU1 format, the PS-field contains a so-called
123
123
Destination Address, which is _not_ part of the PGN. When communicating a PGN
124
-
from user space to kernel (or vice versa) and PDU2 format is used, the PS-field
124
+
from user space to kernel (or vice versa) and PDU1 format is used, the PS-field
125
125
of the PGN shall be set to zero. The Destination Address shall be set
126
126
elsewhere.
127
127
+18
-10
MAINTAINERS
+18
-10
MAINTAINERS
···
1174
1174
F: drivers/hid/amd-sfh-hid/
1175
1175
1176
1176
AMD SPI DRIVER
1177
-
M: Sanjay R Mehta <sanju.mehta@amd.com>
1178
-
S: Maintained
1177
+
M: Raju Rangoju <Raju.Rangoju@amd.com>
1178
+
L: linux-spi@vger.kernel.org
1179
+
S: Supported
1179
1180
F: drivers/spi/spi-amd.c
1180
1181
1181
1182
AMD XGBE DRIVER
···
2853
2852
F: Documentation/devicetree/bindings/bus/qcom*
2854
2853
F: Documentation/devicetree/bindings/cache/qcom,llcc.yaml
2855
2854
F: Documentation/devicetree/bindings/firmware/qcom,scm.yaml
2856
-
F: Documentation/devicetree/bindings/reserved-memory/qcom
2855
+
F: Documentation/devicetree/bindings/reserved-memory/qcom*
2857
2856
F: Documentation/devicetree/bindings/soc/qcom/
2858
2857
F: arch/arm/boot/dts/qcom/
2859
2858
F: arch/arm/configs/qcom_defconfig
···
3746
3745
AXI PWM GENERATOR
3747
3746
M: Michael Hennerich <michael.hennerich@analog.com>
3748
3747
M: Nuno Sá <nuno.sa@analog.com>
3748
+
R: Trevor Gamblin <tgamblin@baylibre.com>
3749
3749
L: linux-pwm@vger.kernel.org
3750
3750
S: Supported
3751
3751
W: https://ez.analog.com/linux-software-drivers
···
16084
16082
16085
16083
NETWORKING [DSA]
16086
16084
M: Andrew Lunn <andrew@lunn.ch>
16087
-
M: Florian Fainelli <f.fainelli@gmail.com>
16088
16085
M: Vladimir Oltean <olteanv@gmail.com>
16089
16086
S: Maintained
16090
16087
F: Documentation/devicetree/bindings/net/dsa/
···
19847
19846
S: Maintained
19848
19847
Q: https://patchwork.kernel.org/project/linux-riscv/list/
19849
19848
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
19850
-
F: Documentation/devicetree/bindings/riscv/
19851
-
F: arch/riscv/boot/dts/
19852
-
X: arch/riscv/boot/dts/allwinner/
19853
-
X: arch/riscv/boot/dts/renesas/
19854
-
X: arch/riscv/boot/dts/sophgo/
19855
-
X: arch/riscv/boot/dts/thead/
19849
+
F: arch/riscv/boot/dts/canaan/
19850
+
F: arch/riscv/boot/dts/microchip/
19851
+
F: arch/riscv/boot/dts/sifive/
19852
+
F: arch/riscv/boot/dts/starfive/
19856
19853
19857
19854
RISC-V PMU DRIVERS
19858
19855
M: Atish Patra <atishp@atishpatra.org>
···
21616
21617
S: Supported
21617
21618
W: https://github.com/thesofproject/linux/
21618
21619
F: sound/soc/sof/
21620
+
21621
+
SOUND - GENERIC SOUND CARD (Simple-Audio-Card, Audio-Graph-Card)
21622
+
M: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
21623
+
S: Supported
21624
+
L: linux-sound@vger.kernel.org
21625
+
F: sound/soc/generic/
21626
+
F: include/sound/simple_card*
21627
+
F: Documentation/devicetree/bindings/sound/simple-card.yaml
21628
+
F: Documentation/devicetree/bindings/sound/audio-graph*.yaml
21619
21629
21620
21630
SOUNDWIRE SUBSYSTEM
21621
21631
M: Vinod Koul <vkoul@kernel.org>
+1
-1
Makefile
+1
-1
Makefile
+2
-2
arch/arm/boot/dts/rockchip/rk3036-kylin.dts
+2
-2
arch/arm/boot/dts/rockchip/rk3036-kylin.dts
+7
-7
arch/arm/boot/dts/rockchip/rk3036.dtsi
+7
-7
arch/arm/boot/dts/rockchip/rk3036.dtsi
···
384
384
};
385
385
};
386
386
387
-
acodec: acodec-ana@20030000 {
388
-
compatible = "rk3036-codec";
387
+
acodec: audio-codec@20030000 {
388
+
compatible = "rockchip,rk3036-codec";
389
389
reg = <0x20030000 0x4000>;
390
-
rockchip,grf = <&grf>;
391
390
clock-names = "acodec_pclk";
392
391
clocks = <&cru PCLK_ACODEC>;
392
+
rockchip,grf = <&grf>;
393
+
#sound-dai-cells = <0>;
393
394
status = "disabled";
394
395
};
395
396
···
400
399
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
401
400
clocks = <&cru PCLK_HDMI>;
402
401
clock-names = "pclk";
403
-
rockchip,grf = <&grf>;
404
402
pinctrl-names = "default";
405
403
pinctrl-0 = <&hdmi_ctl>;
406
404
#sound-dai-cells = <0>;
···
553
553
};
554
554
555
555
spi: spi@20074000 {
556
-
compatible = "rockchip,rockchip-spi";
556
+
compatible = "rockchip,rk3036-spi";
557
557
reg = <0x20074000 0x1000>;
558
558
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
559
-
clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>;
560
-
clock-names = "apb-pclk","spi_pclk";
559
+
clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
560
+
clock-names = "spiclk", "apb_pclk";
561
561
dmas = <&pdma 8>, <&pdma 9>;
562
562
dma-names = "tx", "rx";
563
563
pinctrl-names = "default";
+1
arch/arm64/Kconfig
+1
arch/arm64/Kconfig
+6
-6
arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi
+6
-6
arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi
···
14
14
compatible = "fsl,imx8qxp-lpcg";
15
15
reg = <0x56243000 0x4>;
16
16
#clock-cells = <1>;
17
-
clock-output-names = "mipi1_lis_lpcg_ipg_clk";
17
+
clock-output-names = "lvds0_lis_lpcg_ipg_clk";
18
18
power-domains = <&pd IMX_SC_R_MIPI_1>;
19
19
};
20
20
···
22
22
compatible = "fsl,imx8qxp-lpcg";
23
23
reg = <0x5624300c 0x4>;
24
24
#clock-cells = <1>;
25
-
clock-output-names = "mipi1_pwm_lpcg_clk",
26
-
"mipi1_pwm_lpcg_ipg_clk",
27
-
"mipi1_pwm_lpcg_32k_clk";
25
+
clock-output-names = "lvds0_pwm_lpcg_clk",
26
+
"lvds0_pwm_lpcg_ipg_clk",
27
+
"lvds0_pwm_lpcg_32k_clk";
28
28
power-domains = <&pd IMX_SC_R_MIPI_1_PWM_0>;
29
29
};
30
30
···
32
32
compatible = "fsl,imx8qxp-lpcg";
33
33
reg = <0x56243010 0x4>;
34
34
#clock-cells = <1>;
35
-
clock-output-names = "mipi1_i2c0_lpcg_clk",
36
-
"mipi1_i2c0_lpcg_ipg_clk";
35
+
clock-output-names = "lvds0_i2c0_lpcg_clk",
36
+
"lvds0_i2c0_lpcg_ipg_clk";
37
37
power-domains = <&pd IMX_SC_R_MIPI_1_I2C_0>;
38
38
};
39
39
+2
-2
arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
+2
-2
arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi
···
15
15
mu_m0: mailbox@2d000000 {
16
16
compatible = "fsl,imx6sx-mu";
17
17
reg = <0x2d000000 0x20000>;
18
-
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
18
+
interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>;
19
19
#mbox-cells = <2>;
20
20
power-domains = <&pd IMX_SC_R_VPU_MU_0>;
21
21
status = "disabled";
···
24
24
mu1_m0: mailbox@2d020000 {
25
25
compatible = "fsl,imx6sx-mu";
26
26
reg = <0x2d020000 0x20000>;
27
-
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
27
+
interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
28
28
#mbox-cells = <2>;
29
29
power-domains = <&pd IMX_SC_R_VPU_MU_1>;
30
30
status = "disabled";
+12
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+12
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
···
218
218
};
219
219
};
220
220
221
+
&media_blk_ctrl {
222
+
/*
223
+
* The LVDS panel on this device uses 72.4 MHz pixel clock,
224
+
* set IMX8MP_VIDEO_PLL1 to 72.4 * 7 = 506.8 MHz so the LDB
225
+
* serializer and LCDIFv3 scanout engine can reach accurate
226
+
* pixel clock of exactly 72.4 MHz.
227
+
*/
228
+
assigned-clock-rates = <500000000>, <200000000>,
229
+
<0>, <0>, <500000000>,
230
+
<506800000>;
231
+
};
232
+
221
233
&snvs_pwrkey {
222
234
status = "okay";
223
235
};
+1
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts
+1
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts
+3
-3
arch/arm64/boot/dts/freescale/imx8mp.dtsi
+3
-3
arch/arm64/boot/dts/freescale/imx8mp.dtsi
···
1261
1261
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
1262
1262
reg = <0x30b40000 0x10000>;
1263
1263
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
1264
-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1264
+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
1265
1265
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
1266
1266
<&clk IMX8MP_CLK_USDHC1_ROOT>;
1267
1267
clock-names = "ipg", "ahb", "per";
···
1275
1275
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
1276
1276
reg = <0x30b50000 0x10000>;
1277
1277
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1278
-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1278
+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
1279
1279
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
1280
1280
<&clk IMX8MP_CLK_USDHC2_ROOT>;
1281
1281
clock-names = "ipg", "ahb", "per";
···
1289
1289
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
1290
1290
reg = <0x30b60000 0x10000>;
1291
1291
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1292
-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1292
+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
1293
1293
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
1294
1294
<&clk IMX8MP_CLK_USDHC3_ROOT>;
1295
1295
clock-names = "ipg", "ahb", "per";
+8
arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi
+8
arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi
+1
-1
arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+1
-1
arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+1
-1
arch/arm64/boot/dts/qcom/msm8939.dtsi
+1
-1
arch/arm64/boot/dts/qcom/msm8939.dtsi
+1
-1
arch/arm64/boot/dts/qcom/sm8450.dtsi
+1
-1
arch/arm64/boot/dts/qcom/sm8450.dtsi
+2
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts
+2
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts
+2
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+2
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+6
-4
arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+6
-4
arch/arm64/boot/dts/qcom/x1e80100-crd.dts
···
177
177
compatible = "qcom,x1e80100-sndcard";
178
178
model = "X1E80100-CRD";
179
179
audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
180
-
"TwitterLeft IN", "WSA WSA_SPK2 OUT",
180
+
"TweeterLeft IN", "WSA WSA_SPK2 OUT",
181
181
"WooferRight IN", "WSA2 WSA_SPK2 OUT",
182
-
"TwitterRight IN", "WSA2 WSA_SPK2 OUT",
182
+
"TweeterRight IN", "WSA2 WSA_SPK2 OUT",
183
183
"IN1_HPHL", "HPHL_OUT",
184
184
"IN2_HPHR", "HPHR_OUT",
185
185
"AMIC2", "MIC BIAS2",
···
300
300
301
301
pinctrl-names = "default";
302
302
pinctrl-0 = <&nvme_reg_en>;
303
+
304
+
regulator-boot-on;
303
305
};
304
306
305
307
vreg_wwan: regulator-wwan {
···
935
933
reg = <0 1>;
936
934
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
937
935
#sound-dai-cells = <0>;
938
-
sound-name-prefix = "TwitterLeft";
936
+
sound-name-prefix = "TweeterLeft";
939
937
vdd-1p8-supply = <&vreg_l15b_1p8>;
940
938
vdd-io-supply = <&vreg_l12b_1p2>;
941
939
qcom,port-mapping = <4 5 6 7 11 13>;
···
988
986
reg = <0 1>;
989
987
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
990
988
#sound-dai-cells = <0>;
991
-
sound-name-prefix = "TwitterRight";
989
+
sound-name-prefix = "TweeterRight";
992
990
vdd-1p8-supply = <&vreg_l15b_1p8>;
993
991
vdd-io-supply = <&vreg_l12b_1p2>;
994
992
qcom,port-mapping = <4 5 6 7 11 13>;
+2
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+2
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+2
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
+2
arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
+2
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+2
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+32
-21
arch/arm64/boot/dts/qcom/x1e80100.dtsi
+32
-21
arch/arm64/boot/dts/qcom/x1e80100.dtsi
···
2924
2924
"mhi";
2925
2925
#address-cells = <3>;
2926
2926
#size-cells = <2>;
2927
-
ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
2928
-
<0x02000000 0 0x70300000 0 0x70300000 0 0x3d00000>;
2929
-
bus-range = <0 0xff>;
2927
+
ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
2928
+
<0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
2929
+
bus-range = <0x00 0xff>;
2930
2930
2931
2931
dma-coherent;
2932
2932
2933
2933
linux,pci-domain = <6>;
2934
-
num-lanes = <2>;
2934
+
num-lanes = <4>;
2935
2935
2936
2936
interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
2937
2937
<GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
···
2997
2997
};
2998
2998
2999
2999
pcie6a_phy: phy@1bfc000 {
3000
-
compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy";
3001
-
reg = <0 0x01bfc000 0 0x2000>;
3000
+
compatible = "qcom,x1e80100-qmp-gen4x4-pcie-phy";
3001
+
reg = <0 0x01bfc000 0 0x2000>,
3002
+
<0 0x01bfe000 0 0x2000>;
3002
3003
3003
3004
clocks = <&gcc GCC_PCIE_6A_PHY_AUX_CLK>,
3004
3005
<&gcc GCC_PCIE_6A_CFG_AHB_CLK>,
3005
-
<&rpmhcc RPMH_CXO_CLK>,
3006
+
<&tcsr TCSR_PCIE_4L_CLKREF_EN>,
3006
3007
<&gcc GCC_PCIE_6A_PHY_RCHNG_CLK>,
3007
-
<&gcc GCC_PCIE_6A_PIPE_CLK>;
3008
+
<&gcc GCC_PCIE_6A_PIPE_CLK>,
3009
+
<&gcc GCC_PCIE_6A_PIPEDIV2_CLK>;
3008
3010
clock-names = "aux",
3009
3011
"cfg_ahb",
3010
3012
"ref",
3011
3013
"rchng",
3012
-
"pipe";
3014
+
"pipe",
3015
+
"pipediv2";
3013
3016
3014
3017
resets = <&gcc GCC_PCIE_6A_PHY_BCR>,
3015
3018
<&gcc GCC_PCIE_6A_NOCSR_COM_PHY_BCR>;
···
3023
3020
assigned-clock-rates = <100000000>;
3024
3021
3025
3022
power-domains = <&gcc GCC_PCIE_6_PHY_GDSC>;
3023
+
3024
+
qcom,4ln-config-sel = <&tcsr 0x1a000 0>;
3026
3025
3027
3026
#clock-cells = <0>;
3028
3027
clock-output-names = "pcie6a_pipe_clk";
···
3102
3097
assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>;
3103
3098
assigned-clock-rates = <19200000>;
3104
3099
3105
-
interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
3100
+
interconnects = <&pcie_north_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
3106
3101
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
3107
3102
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
3108
3103
&cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>;
···
3129
3124
3130
3125
clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
3131
3126
<&gcc GCC_PCIE_5_CFG_AHB_CLK>,
3132
-
<&rpmhcc RPMH_CXO_CLK>,
3127
+
<&tcsr TCSR_PCIE_2L_5_CLKREF_EN>,
3133
3128
<&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
3134
-
<&gcc GCC_PCIE_5_PIPE_CLK>;
3129
+
<&gcc GCC_PCIE_5_PIPE_CLK>,
3130
+
<&gcc GCC_PCIE_5_PIPEDIV2_CLK>;
3135
3131
clock-names = "aux",
3136
3132
"cfg_ahb",
3137
3133
"ref",
3138
3134
"rchng",
3139
-
"pipe";
3135
+
"pipe",
3136
+
"pipediv2";
3140
3137
3141
3138
resets = <&gcc GCC_PCIE_5_PHY_BCR>;
3142
3139
reset-names = "phy";
···
3173
3166
"mhi";
3174
3167
#address-cells = <3>;
3175
3168
#size-cells = <2>;
3176
-
ranges = <0x01000000 0 0x00000000 0 0x7c200000 0 0x100000>,
3177
-
<0x02000000 0 0x7c300000 0 0x7c300000 0 0x3d00000>;
3169
+
ranges = <0x01000000 0x0 0x00000000 0x0 0x7c200000 0x0 0x100000>,
3170
+
<0x02000000 0x0 0x7c300000 0x0 0x7c300000 0x0 0x1d00000>;
3178
3171
bus-range = <0x00 0xff>;
3179
3172
3180
3173
dma-coherent;
···
3224
3217
assigned-clocks = <&gcc GCC_PCIE_4_AUX_CLK>;
3225
3218
assigned-clock-rates = <19200000>;
3226
3219
3227
-
interconnects = <&pcie_south_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
3220
+
interconnects = <&pcie_north_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
3228
3221
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
3229
3222
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
3230
3223
&cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ALWAYS>;
···
3261
3254
3262
3255
clocks = <&gcc GCC_PCIE_4_AUX_CLK>,
3263
3256
<&gcc GCC_PCIE_4_CFG_AHB_CLK>,
3264
-
<&rpmhcc RPMH_CXO_CLK>,
3257
+
<&tcsr TCSR_PCIE_2L_4_CLKREF_EN>,
3265
3258
<&gcc GCC_PCIE_4_PHY_RCHNG_CLK>,
3266
-
<&gcc GCC_PCIE_4_PIPE_CLK>;
3259
+
<&gcc GCC_PCIE_4_PIPE_CLK>,
3260
+
<&gcc GCC_PCIE_4_PIPEDIV2_CLK>;
3267
3261
clock-names = "aux",
3268
3262
"cfg_ahb",
3269
3263
"ref",
3270
3264
"rchng",
3271
-
"pipe";
3265
+
"pipe",
3266
+
"pipediv2";
3272
3267
3273
3268
resets = <&gcc GCC_PCIE_4_PHY_BCR>;
3274
3269
reset-names = "phy";
···
6093
6084
<0 0x25a00000 0 0x200000>,
6094
6085
<0 0x25c00000 0 0x200000>,
6095
6086
<0 0x25e00000 0 0x200000>,
6096
-
<0 0x26000000 0 0x200000>;
6087
+
<0 0x26000000 0 0x200000>,
6088
+
<0 0x26200000 0 0x200000>;
6097
6089
reg-names = "llcc0_base",
6098
6090
"llcc1_base",
6099
6091
"llcc2_base",
···
6103
6093
"llcc5_base",
6104
6094
"llcc6_base",
6105
6095
"llcc7_base",
6106
-
"llcc_broadcast_base";
6096
+
"llcc_broadcast_base",
6097
+
"llcc_broadcast_and_base";
6107
6098
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
6108
6099
};
6109
6100
-1
arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
-1
arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
+2
-2
arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts
+2
-2
arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts
···
36
36
37
37
power_led: led-0 {
38
38
label = "firefly:red:power";
39
-
linux,default-trigger = "ir-power-click";
39
+
linux,default-trigger = "default-on";
40
40
default-state = "on";
41
41
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
42
42
};
43
43
44
44
user_led: led-1 {
45
45
label = "firefly:blue:user";
46
-
linux,default-trigger = "ir-user-click";
46
+
linux,default-trigger = "rc-feedback";
47
47
default-state = "off";
48
48
gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
49
49
};
-2
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
-2
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
+1
-2
arch/arm64/boot/dts/rockchip/rk3328.dtsi
+1
-2
arch/arm64/boot/dts/rockchip/rk3328.dtsi
···
754
754
compatible = "rockchip,rk3328-dw-hdmi";
755
755
reg = <0x0 0xff3c0000 0x0 0x20000>;
756
756
reg-io-width = <4>;
757
-
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
758
-
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
757
+
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
759
758
clocks = <&cru PCLK_HDMI>,
760
759
<&cru SCLK_HDMI_SFC>,
761
760
<&cru SCLK_RTC32K>;
-1
arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi
-1
arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
-2
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
-2
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
···
166
166
regulator-max-microvolt = <1800000>;
167
167
vin-supply = <&vcc3v3_sys>;
168
168
gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
169
-
pinctrl-names = "default";
170
169
};
171
170
172
171
/* MIPI DSI panel 2.8v supply */
···
177
178
regulator-max-microvolt = <2800000>;
178
179
vin-supply = <&vcc3v3_sys>;
179
180
gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
180
-
pinctrl-names = "default";
181
181
};
182
182
183
183
vibrator {
-1
arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts
-1
arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
···
576
576
bluetooth {
577
577
compatible = "brcm,bcm43438-bt";
578
578
clocks = <&rk808 1>;
579
-
clock-names = "ext_clock";
579
+
clock-names = "txco";
580
580
device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
581
581
host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
582
582
shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts
+3
-3
arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts
+3
-3
arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts
···
449
449
bluetooth {
450
450
compatible = "brcm,bcm43438-bt";
451
451
clocks = <&pmucru CLK_RTC_32K>;
452
-
clock-names = "ext_clock";
453
-
device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
454
-
host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
452
+
clock-names = "txco";
453
+
device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
454
+
host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
455
455
shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
456
456
pinctrl-names = "default";
457
457
pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
-1
arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
-1
arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
+3
-3
arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi
+3
-3
arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi
···
684
684
compatible = "brcm,bcm43438-bt";
685
685
clocks = <&rk817 1>;
686
686
clock-names = "lpo";
687
-
device-wake-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
688
-
host-wake-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
689
-
reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
687
+
device-wakeup-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
688
+
host-wakeup-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
690
689
pinctrl-0 = <&bt_enable_h>, <&bt_host_wake_l>, <&bt_wake_h>;
691
690
pinctrl-names = "default";
691
+
shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
692
692
vbat-supply = <&vcc_wl>;
693
693
vddio-supply = <&vcca_1v8_pmu>;
694
694
};
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi
+1
-1
arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi
···
402
402
clock-names = "lpo";
403
403
device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
404
404
host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
405
-
reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
406
405
pinctrl-names = "default";
407
406
pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>;
407
+
shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
408
408
vbat-supply = <&vcc_3v3>;
409
409
vddio-supply = <&vcc_1v8>;
410
410
};
-1
arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
-1
arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
-3
arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
-3
arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
···
272
272
regulator-name = "vdd_logic";
273
273
regulator-always-on;
274
274
regulator-boot-on;
275
-
regulator-init-microvolt = <900000>;
276
275
regulator-initial-mode = <0x2>;
277
276
regulator-min-microvolt = <500000>;
278
277
regulator-max-microvolt = <1350000>;
···
284
285
285
286
vdd_gpu: DCDC_REG2 {
286
287
regulator-name = "vdd_gpu";
287
-
regulator-init-microvolt = <900000>;
288
288
regulator-initial-mode = <0x2>;
289
289
regulator-min-microvolt = <500000>;
290
290
regulator-max-microvolt = <1350000>;
···
307
309
308
310
vdd_npu: DCDC_REG4 {
309
311
regulator-name = "vdd_npu";
310
-
regulator-init-microvolt = <900000>;
311
312
regulator-initial-mode = <0x2>;
312
313
regulator-min-microvolt = <500000>;
313
314
regulator-max-microvolt = <1350000>;
+12
-8
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+12
-8
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
···
337
337
cache-unified;
338
338
next-level-cache = <&l3_cache>;
339
339
};
340
+
};
340
341
341
-
l3_cache: l3-cache {
342
-
compatible = "cache";
343
-
cache-size = <3145728>;
344
-
cache-line-size = <64>;
345
-
cache-sets = <4096>;
346
-
cache-level = <3>;
347
-
cache-unified;
348
-
};
342
+
/*
343
+
* The L3 cache belongs to the DynamIQ Shared Unit (DSU),
344
+
* so it's represented here, outside the "cpus" node
345
+
*/
346
+
l3_cache: l3-cache {
347
+
compatible = "cache";
348
+
cache-size = <3145728>;
349
+
cache-line-size = <64>;
350
+
cache-sets = <4096>;
351
+
cache-level = <3>;
352
+
cache-unified;
349
353
};
350
354
351
355
display_subsystem: display-subsystem {
-1
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
-1
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
-1
arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts
-1
arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts
+2
-2
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+2
-2
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-1
arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts
-1
arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts
+1
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
+1
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
-1
arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
-1
arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
+7
-3
arch/arm64/include/asm/mman.h
+7
-3
arch/arm64/include/asm/mman.h
···
6
6
7
7
#ifndef BUILD_VDSO
8
8
#include <linux/compiler.h>
9
+
#include <linux/fs.h>
10
+
#include <linux/shmem_fs.h>
9
11
#include <linux/types.h>
10
12
11
13
static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,
···
33
31
}
34
32
#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)
35
33
36
-
static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)
34
+
static inline unsigned long arch_calc_vm_flag_bits(struct file *file,
35
+
unsigned long flags)
37
36
{
38
37
/*
39
38
* Only allow MTE on anonymous mappings as these are guaranteed to be
40
39
* backed by tags-capable memory. The vm_flags may be overridden by a
41
40
* filesystem supporting MTE (RAM-based).
42
41
*/
43
-
if (system_supports_mte() && (flags & MAP_ANONYMOUS))
42
+
if (system_supports_mte() &&
43
+
((flags & MAP_ANONYMOUS) || shmem_file(file)))
44
44
return VM_MTE_ALLOWED;
45
45
46
46
return 0;
47
47
}
48
-
#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)
48
+
#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags)
49
49
50
50
static inline bool arch_validate_prot(unsigned long prot,
51
51
unsigned long addr __always_unused)
-4
arch/arm64/include/asm/topology.h
-4
arch/arm64/include/asm/topology.h
···
26
26
#define arch_scale_freq_invariant topology_scale_freq_invariant
27
27
#define arch_scale_freq_ref topology_get_freq_ref
28
28
29
-
#ifdef CONFIG_ACPI_CPPC_LIB
30
-
#define arch_init_invariance_cppc topology_init_cpu_capacity_cppc
31
-
#endif
32
-
33
29
/* Replace task scheduler's default cpu-invariant accounting */
34
30
#define arch_scale_cpu_capacity topology_get_cpu_scale
35
31
+1
arch/arm64/kernel/fpsimd.c
+1
arch/arm64/kernel/fpsimd.c
+3
-32
arch/arm64/kernel/smccc-call.S
+3
-32
arch/arm64/kernel/smccc-call.S
···
7
7
8
8
#include <asm/asm-offsets.h>
9
9
#include <asm/assembler.h>
10
-
#include <asm/thread_info.h>
11
-
12
-
/*
13
-
* If we have SMCCC v1.3 and (as is likely) no SVE state in
14
-
* the registers then set the SMCCC hint bit to say there's no
15
-
* need to preserve it. Do this by directly adjusting the SMCCC
16
-
* function value which is already stored in x0 ready to be called.
17
-
*/
18
-
SYM_FUNC_START(__arm_smccc_sve_check)
19
-
20
-
ldr_l x16, smccc_has_sve_hint
21
-
cbz x16, 2f
22
-
23
-
get_current_task x16
24
-
ldr x16, [x16, #TSK_TI_FLAGS]
25
-
tbnz x16, #TIF_FOREIGN_FPSTATE, 1f // Any live FP state?
26
-
tbnz x16, #TIF_SVE, 2f // Does that state include SVE?
27
-
28
-
1: orr x0, x0, ARM_SMCCC_1_3_SVE_HINT
29
-
30
-
2: ret
31
-
SYM_FUNC_END(__arm_smccc_sve_check)
32
-
EXPORT_SYMBOL(__arm_smccc_sve_check)
33
10
34
11
.macro SMCCC instr
35
-
stp x29, x30, [sp, #-16]!
36
-
mov x29, sp
37
-
alternative_if ARM64_SVE
38
-
bl __arm_smccc_sve_check
39
-
alternative_else_nop_endif
40
12
\instr #0
41
-
ldr x4, [sp, #16]
13
+
ldr x4, [sp]
42
14
stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
43
15
stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
44
-
ldr x4, [sp, #24]
16
+
ldr x4, [sp, #8]
45
17
cbz x4, 1f /* no quirk structure */
46
18
ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
47
19
cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6
48
20
b.ne 1f
49
21
str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
50
-
1: ldp x29, x30, [sp], #16
51
-
ret
22
+
1: ret
52
23
.endm
53
24
54
25
/*
+3
-2
arch/parisc/include/asm/mman.h
+3
-2
arch/parisc/include/asm/mman.h
···
2
2
#ifndef __ASM_MMAN_H__
3
3
#define __ASM_MMAN_H__
4
4
5
+
#include <linux/fs.h>
5
6
#include <uapi/asm/mman.h>
6
7
7
8
/* PARISC cannot allow mdwe as it needs writable stacks */
···
12
11
}
13
12
#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported
14
13
15
-
static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)
14
+
static inline unsigned long arch_calc_vm_flag_bits(struct file *file, unsigned long flags)
16
15
{
17
16
/*
18
17
* The stack on parisc grows upwards, so if userspace requests memory
···
24
23
25
24
return 0;
26
25
}
27
-
#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)
26
+
#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags)
28
27
29
28
#endif /* __ASM_MMAN_H__ */
+12
arch/powerpc/kvm/book3s_hv.c
+12
arch/powerpc/kvm/book3s_hv.c
···
4898
4898
BOOK3S_INTERRUPT_EXTERNAL, 0);
4899
4899
else
4900
4900
lpcr |= LPCR_MER;
4901
+
} else {
4902
+
/*
4903
+
* L1's copy of L2's LPCR (vcpu->arch.vcore->lpcr) can get its MER bit
4904
+
* unexpectedly set - for e.g. during NMI handling when all register
4905
+
* states are synchronized from L0 to L1. L1 needs to inform L0 about
4906
+
* MER=1 only when there are pending external interrupts.
4907
+
* In the above if check, MER bit is set if there are pending
4908
+
* external interrupts. Hence, explicity mask off MER bit
4909
+
* here as otherwise it may generate spurious interrupts in L2 KVM
4910
+
* causing an endless loop, which results in L2 guest getting hung.
4911
+
*/
4912
+
lpcr &= ~LPCR_MER;
4901
4913
}
4902
4914
} else if (vcpu->arch.pending_exceptions ||
4903
4915
vcpu->arch.doorbell_request ||
+3
-3
arch/riscv/boot/dts/sophgo/sg2042.dtsi
+3
-3
arch/riscv/boot/dts/sophgo/sg2042.dtsi
···
112
112
compatible = "snps,dw-apb-gpio-port";
113
113
gpio-controller;
114
114
#gpio-cells = <2>;
115
-
snps,nr-gpios = <32>;
115
+
ngpios = <32>;
116
116
reg = <0>;
117
117
interrupt-controller;
118
118
#interrupt-cells = <2>;
···
134
134
compatible = "snps,dw-apb-gpio-port";
135
135
gpio-controller;
136
136
#gpio-cells = <2>;
137
-
snps,nr-gpios = <32>;
137
+
ngpios = <32>;
138
138
reg = <0>;
139
139
interrupt-controller;
140
140
#interrupt-cells = <2>;
···
156
156
compatible = "snps,dw-apb-gpio-port";
157
157
gpio-controller;
158
158
#gpio-cells = <2>;
159
-
snps,nr-gpios = <32>;
159
+
ngpios = <32>;
160
160
reg = <0>;
161
161
interrupt-controller;
162
162
#interrupt-cells = <2>;
-2
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
-2
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
···
128
128
assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
129
129
<&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
130
130
assigned-clock-rates = <49500000>, <198000000>;
131
-
status = "okay";
132
131
133
132
ports {
134
133
#address-cells = <1>;
···
150
151
&csi2rx {
151
152
assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
152
153
assigned-clock-rates = <297000000>;
153
-
status = "okay";
154
154
155
155
ports {
156
156
#address-cells = <1>;
+1
-2
arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+1
-2
arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
-5
arch/x86/include/asm/topology.h
-5
arch/x86/include/asm/topology.h
···
305
305
extern void arch_scale_freq_tick(void);
306
306
#define arch_scale_freq_tick arch_scale_freq_tick
307
307
308
-
#ifdef CONFIG_ACPI_CPPC_LIB
309
-
void init_freq_invariance_cppc(void);
310
-
#define arch_init_invariance_cppc init_freq_invariance_cppc
311
-
#endif
312
-
313
308
#endif /* _ASM_X86_TOPOLOGY_H */
+6
-1
arch/x86/kernel/acpi/cppc.c
+6
-1
arch/x86/kernel/acpi/cppc.c
···
110
110
111
111
static DEFINE_MUTEX(freq_invariance_lock);
112
112
113
-
void init_freq_invariance_cppc(void)
113
+
static inline void init_freq_invariance_cppc(void)
114
114
{
115
115
static bool init_done;
116
116
···
125
125
amd_set_max_freq_ratio();
126
126
init_done = true;
127
127
mutex_unlock(&freq_invariance_lock);
128
+
}
129
+
130
+
void acpi_processor_init_invariance_cppc(void)
131
+
{
132
+
init_freq_invariance_cppc();
128
133
}
129
134
130
135
/*
-6
drivers/acpi/cppc_acpi.c
-6
drivers/acpi/cppc_acpi.c
···
671
671
* )
672
672
*/
673
673
674
-
#ifndef arch_init_invariance_cppc
675
-
static inline void arch_init_invariance_cppc(void) { }
676
-
#endif
677
-
678
674
/**
679
675
* acpi_cppc_processor_probe - Search for per CPU _CPC objects.
680
676
* @pr: Ptr to acpi_processor containing this CPU's logical ID.
···
900
904
kobject_put(&cpc_ptr->kobj);
901
905
goto out_free;
902
906
}
903
-
904
-
arch_init_invariance_cppc();
905
907
906
908
kfree(output.pointer);
907
909
return 0;
+9
drivers/acpi/processor_driver.c
+9
drivers/acpi/processor_driver.c
···
237
237
.notifier_call = acpi_processor_notifier,
238
238
};
239
239
240
+
void __weak acpi_processor_init_invariance_cppc(void)
241
+
{ }
242
+
240
243
/*
241
244
* We keep the driver loaded even when ACPI is not running.
242
245
* This is needed for the powernow-k8 driver, that works even without
···
273
270
NULL, acpi_soft_cpu_dead);
274
271
275
272
acpi_processor_throttling_init();
273
+
274
+
/*
275
+
* Frequency invariance calculations on AMD platforms can't be run until
276
+
* after acpi_cppc_processor_probe() has been called for all online CPUs
277
+
*/
278
+
acpi_processor_init_invariance_cppc();
276
279
return 0;
277
280
err:
278
281
driver_unregister(&acpi_processor_driver);
+5
-1
drivers/base/arch_topology.c
+5
-1
drivers/base/arch_topology.c
···
366
366
#ifdef CONFIG_ACPI_CPPC_LIB
367
367
#include <acpi/cppc_acpi.h>
368
368
369
-
void topology_init_cpu_capacity_cppc(void)
369
+
static inline void topology_init_cpu_capacity_cppc(void)
370
370
{
371
371
u64 capacity, capacity_scale = 0;
372
372
struct cppc_perf_caps perf_caps;
···
416
416
417
417
exit:
418
418
free_raw_capacity();
419
+
}
420
+
void acpi_processor_init_invariance_cppc(void)
421
+
{
422
+
topology_init_cpu_capacity_cppc();
419
423
}
420
424
#endif
421
425
-4
drivers/char/tpm/tpm-chip.c
-4
drivers/char/tpm/tpm-chip.c
···
525
525
{
526
526
struct tpm_chip *chip = container_of(rng, struct tpm_chip, hwrng);
527
527
528
-
/* Give back zero bytes, as TPM chip has not yet fully resumed: */
529
-
if (chip->flags & TPM_CHIP_FLAG_SUSPENDED)
530
-
return 0;
531
-
532
528
return tpm_get_random(chip, data, max);
533
529
}
534
530
+22
-10
drivers/char/tpm/tpm-interface.c
+22
-10
drivers/char/tpm/tpm-interface.c
···
370
370
if (!chip)
371
371
return -ENODEV;
372
372
373
+
rc = tpm_try_get_ops(chip);
374
+
if (rc) {
375
+
/* Can be safely set out of locks, as no action cannot race: */
376
+
chip->flags |= TPM_CHIP_FLAG_SUSPENDED;
377
+
goto out;
378
+
}
379
+
373
380
if (chip->flags & TPM_CHIP_FLAG_ALWAYS_POWERED)
374
381
goto suspended;
375
382
···
384
377
!pm_suspend_via_firmware())
385
378
goto suspended;
386
379
387
-
rc = tpm_try_get_ops(chip);
388
-
if (!rc) {
389
-
if (chip->flags & TPM_CHIP_FLAG_TPM2) {
390
-
tpm2_end_auth_session(chip);
391
-
tpm2_shutdown(chip, TPM2_SU_STATE);
392
-
} else {
393
-
rc = tpm1_pm_suspend(chip, tpm_suspend_pcr);
394
-
}
395
-
396
-
tpm_put_ops(chip);
380
+
if (chip->flags & TPM_CHIP_FLAG_TPM2) {
381
+
tpm2_end_auth_session(chip);
382
+
tpm2_shutdown(chip, TPM2_SU_STATE);
383
+
goto suspended;
397
384
}
385
+
386
+
rc = tpm1_pm_suspend(chip, tpm_suspend_pcr);
398
387
399
388
suspended:
400
389
chip->flags |= TPM_CHIP_FLAG_SUSPENDED;
390
+
tpm_put_ops(chip);
401
391
392
+
out:
402
393
if (rc)
403
394
dev_err(dev, "Ignoring error %d while suspending\n", rc);
404
395
return 0;
···
445
440
if (!chip)
446
441
return -ENODEV;
447
442
443
+
/* Give back zero bytes, as TPM chip has not yet fully resumed: */
444
+
if (chip->flags & TPM_CHIP_FLAG_SUSPENDED) {
445
+
rc = 0;
446
+
goto out;
447
+
}
448
+
448
449
if (chip->flags & TPM_CHIP_FLAG_TPM2)
449
450
rc = tpm2_get_random(chip, out, max);
450
451
else
451
452
rc = tpm1_get_random(chip, out, max);
452
453
454
+
out:
453
455
tpm_put_ops(chip);
454
456
return rc;
455
457
}
+1
-1
drivers/clk/qcom/clk-alpha-pll.c
+1
-1
drivers/clk/qcom/clk-alpha-pll.c
···
40
40
41
41
#define PLL_USER_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_USER_CTL])
42
42
# define PLL_POST_DIV_SHIFT 8
43
-
# define PLL_POST_DIV_MASK(p) GENMASK((p)->width - 1, 0)
43
+
# define PLL_POST_DIV_MASK(p) GENMASK((p)->width ? (p)->width - 1 : 3, 0)
44
44
# define PLL_ALPHA_MSB BIT(15)
45
45
# define PLL_ALPHA_EN BIT(24)
46
46
# define PLL_ALPHA_MODE BIT(25)
+6
-6
drivers/clk/qcom/gcc-x1e80100.c
+6
-6
drivers/clk/qcom/gcc-x1e80100.c
···
3123
3123
3124
3124
static struct clk_branch gcc_pcie_3_pipediv2_clk = {
3125
3125
.halt_reg = 0x58060,
3126
-
.halt_check = BRANCH_HALT_VOTED,
3126
+
.halt_check = BRANCH_HALT_SKIP,
3127
3127
.clkr = {
3128
3128
.enable_reg = 0x52020,
3129
3129
.enable_mask = BIT(5),
···
3248
3248
3249
3249
static struct clk_branch gcc_pcie_4_pipediv2_clk = {
3250
3250
.halt_reg = 0x6b054,
3251
-
.halt_check = BRANCH_HALT_VOTED,
3251
+
.halt_check = BRANCH_HALT_SKIP,
3252
3252
.clkr = {
3253
3253
.enable_reg = 0x52010,
3254
3254
.enable_mask = BIT(27),
···
3373
3373
3374
3374
static struct clk_branch gcc_pcie_5_pipediv2_clk = {
3375
3375
.halt_reg = 0x2f054,
3376
-
.halt_check = BRANCH_HALT_VOTED,
3376
+
.halt_check = BRANCH_HALT_SKIP,
3377
3377
.clkr = {
3378
3378
.enable_reg = 0x52018,
3379
3379
.enable_mask = BIT(19),
···
3511
3511
3512
3512
static struct clk_branch gcc_pcie_6a_pipediv2_clk = {
3513
3513
.halt_reg = 0x31060,
3514
-
.halt_check = BRANCH_HALT_VOTED,
3514
+
.halt_check = BRANCH_HALT_SKIP,
3515
3515
.clkr = {
3516
3516
.enable_reg = 0x52018,
3517
3517
.enable_mask = BIT(28),
···
3649
3649
3650
3650
static struct clk_branch gcc_pcie_6b_pipediv2_clk = {
3651
3651
.halt_reg = 0x8d060,
3652
-
.halt_check = BRANCH_HALT_VOTED,
3652
+
.halt_check = BRANCH_HALT_SKIP,
3653
3653
.clkr = {
3654
3654
.enable_reg = 0x52010,
3655
3655
.enable_mask = BIT(28),
···
6155
6155
.pd = {
6156
6156
.name = "gcc_usb3_mp_ss1_phy_gdsc",
6157
6157
},
6158
-
.pwrsts = PWRSTS_OFF_ON,
6158
+
.pwrsts = PWRSTS_RET_ON,
6159
6159
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
6160
6160
};
6161
6161
+2
-2
drivers/clk/qcom/videocc-sm8350.c
+2
-2
drivers/clk/qcom/videocc-sm8350.c
···
452
452
.pd = {
453
453
.name = "mvs0_gdsc",
454
454
},
455
-
.flags = HW_CTRL | RETAIN_FF_ENABLE,
455
+
.flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE,
456
456
.pwrsts = PWRSTS_OFF_ON,
457
457
};
458
458
···
461
461
.pd = {
462
462
.name = "mvs1_gdsc",
463
463
},
464
-
.flags = HW_CTRL | RETAIN_FF_ENABLE,
464
+
.flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE,
465
465
.pwrsts = PWRSTS_OFF_ON,
466
466
};
467
467
+23
-3
drivers/cpufreq/intel_pstate.c
+23
-3
drivers/cpufreq/intel_pstate.c
···
1034
1034
hybrid_update_cpu_capacity_scaling();
1035
1035
}
1036
1036
1037
-
static void hybrid_init_cpu_capacity_scaling(void)
1037
+
static void hybrid_init_cpu_capacity_scaling(bool refresh)
1038
1038
{
1039
1039
bool disable_itmt = false;
1040
1040
···
1045
1045
* scaling has been enabled already and the driver is just changing the
1046
1046
* operation mode.
1047
1047
*/
1048
-
if (hybrid_max_perf_cpu) {
1048
+
if (refresh) {
1049
1049
__hybrid_init_cpu_capacity_scaling();
1050
1050
goto unlock;
1051
1051
}
···
1069
1069
*/
1070
1070
if (disable_itmt)
1071
1071
sched_clear_itmt_support();
1072
+
}
1073
+
1074
+
static bool hybrid_clear_max_perf_cpu(void)
1075
+
{
1076
+
bool ret;
1077
+
1078
+
guard(mutex)(&hybrid_capacity_lock);
1079
+
1080
+
ret = !!hybrid_max_perf_cpu;
1081
+
hybrid_max_perf_cpu = NULL;
1082
+
1083
+
return ret;
1072
1084
}
1073
1085
1074
1086
static void __intel_pstate_get_hwp_cap(struct cpudata *cpu)
···
2275
2263
} else {
2276
2264
cpu->pstate.scaling = perf_ctl_scaling;
2277
2265
}
2266
+
/*
2267
+
* If the CPU is going online for the first time and it was
2268
+
* offline initially, asym capacity scaling needs to be updated.
2269
+
*/
2270
+
hybrid_update_capacity(cpu);
2278
2271
} else {
2279
2272
cpu->pstate.scaling = perf_ctl_scaling;
2280
2273
cpu->pstate.max_pstate = pstate_funcs.get_max(cpu->cpu);
···
3369
3352
3370
3353
static int intel_pstate_register_driver(struct cpufreq_driver *driver)
3371
3354
{
3355
+
bool refresh_cpu_cap_scaling;
3372
3356
int ret;
3373
3357
3374
3358
if (driver == &intel_pstate)
···
3382
3364
3383
3365
arch_set_max_freq_ratio(global.turbo_disabled);
3384
3366
3367
+
refresh_cpu_cap_scaling = hybrid_clear_max_perf_cpu();
3368
+
3385
3369
intel_pstate_driver = driver;
3386
3370
ret = cpufreq_register_driver(intel_pstate_driver);
3387
3371
if (ret) {
···
3393
3373
3394
3374
global.min_perf_pct = min_perf_pct_min();
3395
3375
3396
-
hybrid_init_cpu_capacity_scaling();
3376
+
hybrid_init_cpu_capacity_scaling(refresh_cpu_cap_scaling);
3397
3377
3398
3378
return 0;
3399
3379
}
+5
-3
drivers/edac/qcom_edac.c
+5
-3
drivers/edac/qcom_edac.c
···
342
342
int ecc_irq;
343
343
int rc;
344
344
345
-
rc = qcom_llcc_core_setup(llcc_driv_data, llcc_driv_data->bcast_regmap);
346
-
if (rc)
347
-
return rc;
345
+
if (!llcc_driv_data->ecc_irq_configured) {
346
+
rc = qcom_llcc_core_setup(llcc_driv_data, llcc_driv_data->bcast_regmap);
347
+
if (rc)
348
+
return rc;
349
+
}
348
350
349
351
/* Allocate edac control info */
350
352
edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank",
+4
-3
drivers/firmware/arm_scmi/bus.c
+4
-3
drivers/firmware/arm_scmi/bus.c
···
325
325
326
326
static void scmi_device_release(struct device *dev)
327
327
{
328
-
kfree(to_scmi_dev(dev));
328
+
struct scmi_device *scmi_dev = to_scmi_dev(dev);
329
+
330
+
kfree_const(scmi_dev->name);
331
+
kfree(scmi_dev);
329
332
}
330
333
331
334
static void __scmi_device_destroy(struct scmi_device *scmi_dev)
···
341
338
if (scmi_dev->protocol_id == SCMI_PROTOCOL_SYSTEM)
342
339
atomic_set(&scmi_syspower_registered, 0);
343
340
344
-
kfree_const(scmi_dev->name);
345
341
ida_free(&scmi_bus_id, scmi_dev->id);
346
342
device_unregister(&scmi_dev->dev);
347
343
}
···
412
410
413
411
return scmi_dev;
414
412
put_dev:
415
-
kfree_const(scmi_dev->name);
416
413
put_device(&scmi_dev->dev);
417
414
ida_free(&scmi_bus_id, id);
418
415
return NULL;
+2
drivers/firmware/arm_scmi/common.h
+2
drivers/firmware/arm_scmi/common.h
···
163
163
* used to initialize this channel
164
164
* @dev: Reference to device in the SCMI hierarchy corresponding to this
165
165
* channel
166
+
* @is_p2a: A flag to identify a channel as P2A (RX)
166
167
* @rx_timeout_ms: The configured RX timeout in milliseconds.
167
168
* @handle: Pointer to SCMI entity handle
168
169
* @no_completion_irq: Flag to indicate that this channel has no completion
···
175
174
struct scmi_chan_info {
176
175
int id;
177
176
struct device *dev;
177
+
bool is_p2a;
178
178
unsigned int rx_timeout_ms;
179
179
struct scmi_handle *handle;
180
180
bool no_completion_irq;
+8
-2
drivers/firmware/arm_scmi/driver.c
+8
-2
drivers/firmware/arm_scmi/driver.c
···
1048
1048
static inline void scmi_clear_channel(struct scmi_info *info,
1049
1049
struct scmi_chan_info *cinfo)
1050
1050
{
1051
+
if (!cinfo->is_p2a) {
1052
+
dev_warn(cinfo->dev, "Invalid clear on A2P channel !\n");
1053
+
return;
1054
+
}
1055
+
1051
1056
if (info->desc->ops->clear_channel)
1052
1057
info->desc->ops->clear_channel(cinfo);
1053
1058
}
···
2643
2638
if (!cinfo)
2644
2639
return -ENOMEM;
2645
2640
2641
+
cinfo->is_p2a = !tx;
2646
2642
cinfo->rx_timeout_ms = info->desc->max_rx_timeout_ms;
2647
2643
2648
2644
/* Create a unique name for this transport device */
···
3048
3042
3049
3043
dev_info(dev, "Using %s\n", dev_driver_string(trans->supplier));
3050
3044
3051
-
ret = of_property_read_u32(dev->of_node, "max-rx-timeout-ms",
3045
+
ret = of_property_read_u32(dev->of_node, "arm,max-rx-timeout-ms",
3052
3046
&trans->desc->max_rx_timeout_ms);
3053
3047
if (ret && ret != -EINVAL)
3054
-
dev_err(dev, "Malformed max-rx-timeout-ms DT property.\n");
3048
+
dev_err(dev, "Malformed arm,max-rx-timeout-ms DT property.\n");
3055
3049
3056
3050
dev_info(dev, "SCMI max-rx-timeout: %dms\n",
3057
3051
trans->desc->max_rx_timeout_ms);
+7
-35
drivers/firmware/microchip/mpfs-auto-update.c
+7
-35
drivers/firmware/microchip/mpfs-auto-update.c
···
76
76
#define AUTO_UPDATE_INFO_SIZE SZ_1M
77
77
#define AUTO_UPDATE_BITSTREAM_BASE (AUTO_UPDATE_DIRECTORY_SIZE + AUTO_UPDATE_INFO_SIZE)
78
78
79
-
#define AUTO_UPDATE_TIMEOUT_MS 60000
80
-
81
79
struct mpfs_auto_update_priv {
82
80
struct mpfs_sys_controller *sys_controller;
83
81
struct device *dev;
84
82
struct mtd_info *flash;
85
83
struct fw_upload *fw_uploader;
86
-
struct completion programming_complete;
87
84
size_t size_per_bitstream;
88
85
bool cancel_request;
89
86
};
···
153
156
154
157
static enum fw_upload_err mpfs_auto_update_poll_complete(struct fw_upload *fw_uploader)
155
158
{
156
-
struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
157
-
int ret;
158
-
159
-
/*
160
-
* There is no meaningful way to get the status of the programming while
161
-
* it is in progress, so attempting anything other than waiting for it
162
-
* to complete would be misplaced.
163
-
*/
164
-
ret = wait_for_completion_timeout(&priv->programming_complete,
165
-
msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS));
166
-
if (!ret)
167
-
return FW_UPLOAD_ERR_TIMEOUT;
168
-
169
159
return FW_UPLOAD_ERR_NONE;
170
160
}
171
161
···
333
349
u32 offset, u32 size, u32 *written)
334
350
{
335
351
struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
336
-
enum fw_upload_err err = FW_UPLOAD_ERR_NONE;
337
352
int ret;
338
353
339
-
reinit_completion(&priv->programming_complete);
340
-
341
354
ret = mpfs_auto_update_write_bitstream(fw_uploader, data, offset, size, written);
342
-
if (ret) {
343
-
err = FW_UPLOAD_ERR_RW_ERROR;
344
-
goto out;
345
-
}
355
+
if (ret)
356
+
return FW_UPLOAD_ERR_RW_ERROR;
346
357
347
-
if (priv->cancel_request) {
348
-
err = FW_UPLOAD_ERR_CANCELED;
349
-
goto out;
350
-
}
358
+
if (priv->cancel_request)
359
+
return FW_UPLOAD_ERR_CANCELED;
351
360
352
361
if (mpfs_auto_update_is_bitstream_info(data, size))
353
-
goto out;
362
+
return FW_UPLOAD_ERR_NONE;
354
363
355
364
ret = mpfs_auto_update_verify_image(fw_uploader);
356
365
if (ret)
357
-
err = FW_UPLOAD_ERR_FW_INVALID;
366
+
return FW_UPLOAD_ERR_FW_INVALID;
358
367
359
-
out:
360
-
complete(&priv->programming_complete);
361
-
362
-
return err;
368
+
return FW_UPLOAD_ERR_NONE;
363
369
}
364
370
365
371
static const struct fw_upload_ops mpfs_auto_update_ops = {
···
434
460
if (ret)
435
461
return dev_err_probe(dev, ret,
436
462
"The current bitstream does not support auto-update\n");
437
-
438
-
init_completion(&priv->programming_complete);
439
463
440
464
fw_uploader = firmware_upload_register(THIS_MODULE, dev, "mpfs-auto-update",
441
465
&mpfs_auto_update_ops, priv);
+14
-3
drivers/firmware/qcom/qcom_scm.c
+14
-3
drivers/firmware/qcom/qcom_scm.c
···
112
112
};
113
113
114
114
#define QSEECOM_MAX_APP_NAME_SIZE 64
115
+
#define SHMBRIDGE_RESULT_NOTSUPP 4
115
116
116
117
/* Each bit configures cold/warm boot address for one of the 4 CPUs */
117
118
static const u8 qcom_scm_cpu_cold_bits[QCOM_SCM_BOOT_MAX_CPUS] = {
···
217
216
218
217
struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void)
219
218
{
220
-
return __scm->mempool;
219
+
return __scm ? __scm->mempool : NULL;
221
220
}
222
221
223
222
static enum qcom_scm_convention __get_convention(void)
···
546
545
} else if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT,
547
546
QCOM_SCM_BOOT_SET_DLOAD_MODE)) {
548
547
ret = __qcom_scm_set_dload_mode(__scm->dev, !!dload_mode);
549
-
} else {
548
+
} else if (dload_mode) {
550
549
dev_err(__scm->dev,
551
550
"No available mechanism for setting download mode\n");
552
551
}
···
1362
1361
1363
1362
int qcom_scm_shm_bridge_enable(void)
1364
1363
{
1364
+
int ret;
1365
+
1365
1366
struct qcom_scm_desc desc = {
1366
1367
.svc = QCOM_SCM_SVC_MP,
1367
1368
.cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE,
···
1376
1373
QCOM_SCM_MP_SHM_BRIDGE_ENABLE))
1377
1374
return -EOPNOTSUPP;
1378
1375
1379
-
return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0];
1376
+
ret = qcom_scm_call(__scm->dev, &desc, &res);
1377
+
1378
+
if (ret)
1379
+
return ret;
1380
+
1381
+
if (res.result[0] == SHMBRIDGE_RESULT_NOTSUPP)
1382
+
return -EOPNOTSUPP;
1383
+
1384
+
return res.result[0];
1380
1385
}
1381
1386
EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable);
1382
1387
-4
drivers/firmware/smccc/smccc.c
-4
drivers/firmware/smccc/smccc.c
···
16
16
static enum arm_smccc_conduit smccc_conduit = SMCCC_CONDUIT_NONE;
17
17
18
18
bool __ro_after_init smccc_trng_available = false;
19
-
u64 __ro_after_init smccc_has_sve_hint = false;
20
19
s32 __ro_after_init smccc_soc_id_version = SMCCC_RET_NOT_SUPPORTED;
21
20
s32 __ro_after_init smccc_soc_id_revision = SMCCC_RET_NOT_SUPPORTED;
22
21
···
27
28
smccc_conduit = conduit;
28
29
29
30
smccc_trng_available = smccc_probe_trng();
30
-
if (IS_ENABLED(CONFIG_ARM64_SVE) &&
31
-
smccc_version >= ARM_SMCCC_VERSION_1_3)
32
-
smccc_has_sve_hint = true;
33
31
34
32
if ((smccc_version >= ARM_SMCCC_VERSION_1_2) &&
35
33
(smccc_conduit != SMCCC_CONDUIT_NONE)) {
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
···
172
172
&buffer);
173
173
obj = (union acpi_object *)buffer.pointer;
174
174
175
-
/* Fail if calling the method fails and ATIF is supported */
176
-
if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
175
+
/* Fail if calling the method fails */
176
+
if (ACPI_FAILURE(status)) {
177
177
DRM_DEBUG_DRIVER("failed to evaluate ATIF got %s\n",
178
178
acpi_format_exception(status));
179
179
kfree(obj);
+5
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+5
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
···
402
402
int r;
403
403
uint32_t *data, x;
404
404
405
-
if (size & 0x3 || *pos & 0x3)
405
+
if (size > 4096 || size & 0x3 || *pos & 0x3)
406
406
return -EINVAL;
407
407
408
408
r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
···
1648
1648
1649
1649
for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
1650
1650
ent = debugfs_create_file(debugfs_regs_names[i],
1651
-
S_IFREG | 0444, root,
1651
+
S_IFREG | 0400, root,
1652
1652
adev, debugfs_regs[i]);
1653
1653
if (!i && !IS_ERR_OR_NULL(ent))
1654
1654
i_size_write(ent->d_inode, adev->rmmio_size);
···
2100
2100
amdgpu_securedisplay_debugfs_init(adev);
2101
2101
amdgpu_fw_attestation_debugfs_init(adev);
2102
2102
2103
-
debugfs_create_file("amdgpu_evict_vram", 0444, root, adev,
2103
+
debugfs_create_file("amdgpu_evict_vram", 0400, root, adev,
2104
2104
&amdgpu_evict_vram_fops);
2105
-
debugfs_create_file("amdgpu_evict_gtt", 0444, root, adev,
2105
+
debugfs_create_file("amdgpu_evict_gtt", 0400, root, adev,
2106
2106
&amdgpu_evict_gtt_fops);
2107
-
debugfs_create_file("amdgpu_test_ib", 0444, root, adev,
2107
+
debugfs_create_file("amdgpu_test_ib", 0400, root, adev,
2108
2108
&amdgpu_debugfs_test_ib_fops);
2109
2109
debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
2110
2110
&amdgpu_debugfs_vm_info_fops);
+1
-1
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
+1
-1
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
···
482
482
case AMDGPU_SPX_PARTITION_MODE:
483
483
return adev->gmc.num_mem_partitions == 1 && num_xcc > 0;
484
484
case AMDGPU_DPX_PARTITION_MODE:
485
-
return adev->gmc.num_mem_partitions != 8 && (num_xcc % 4) == 0;
485
+
return adev->gmc.num_mem_partitions <= 2 && (num_xcc % 4) == 0;
486
486
case AMDGPU_TPX_PARTITION_MODE:
487
487
return (adev->gmc.num_mem_partitions == 1 ||
488
488
adev->gmc.num_mem_partitions == 3) &&
+15
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+15
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
9429
9429
bool mode_set_reset_required = false;
9430
9430
u32 i;
9431
9431
struct dc_commit_streams_params params = {dc_state->streams, dc_state->stream_count};
9432
+
bool set_backlight_level = false;
9432
9433
9433
9434
/* Disable writeback */
9434
9435
for_each_old_connector_in_state(state, connector, old_con_state, i) {
···
9549
9548
acrtc->hw_mode = new_crtc_state->mode;
9550
9549
crtc->hwmode = new_crtc_state->mode;
9551
9550
mode_set_reset_required = true;
9551
+
set_backlight_level = true;
9552
9552
} else if (modereset_required(new_crtc_state)) {
9553
9553
drm_dbg_atomic(dev,
9554
9554
"Atomic commit: RESET. crtc id %d:[%p]\n",
···
9599
9597
dm_new_crtc_state->stream, acrtc);
9600
9598
else
9601
9599
acrtc->otg_inst = status->primary_otg_inst;
9600
+
}
9601
+
}
9602
+
9603
+
/* During boot up and resume the DC layer will reset the panel brightness
9604
+
* to fix a flicker issue.
9605
+
* It will cause the dm->actual_brightness is not the current panel brightness
9606
+
* level. (the dm->brightness is the correct panel level)
9607
+
* So we set the backlight level with dm->brightness value after set mode
9608
+
*/
9609
+
if (set_backlight_level) {
9610
+
for (i = 0; i < dm->num_of_edps; i++) {
9611
+
if (dm->backlight_dev[i])
9612
+
amdgpu_dm_backlight_set_level(dm, i, dm->brightness[i]);
9602
9613
}
9603
9614
}
9604
9615
}
+3
-1
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+3
-1
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
···
3127
3127
struct atom_data_revision revision;
3128
3128
3129
3129
// vram info moved to umc_info for DCN4x
3130
-
if (info && DATA_TABLES(umc_info)) {
3130
+
if (dcb->ctx->dce_version >= DCN_VERSION_4_01 &&
3131
+
dcb->ctx->dce_version < DCN_VERSION_MAX &&
3132
+
info && DATA_TABLES(umc_info)) {
3131
3133
header = GET_IMAGE(struct atom_common_table_header,
3132
3134
DATA_TABLES(umc_info));
3133
3135
+35
-14
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+35
-14
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
···
1259
1259
smu->watermarks_bitmap = 0;
1260
1260
smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
1261
1261
smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
1262
+
smu->user_dpm_profile.user_workload_mask = 0;
1262
1263
1263
1264
atomic_set(&smu->smu_power.power_gate.vcn_gated, 1);
1264
1265
atomic_set(&smu->smu_power.power_gate.jpeg_gated, 1);
1265
1266
atomic_set(&smu->smu_power.power_gate.vpe_gated, 1);
1266
1267
atomic_set(&smu->smu_power.power_gate.umsch_mm_gated, 1);
1267
1268
1268
-
smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0;
1269
-
smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1;
1270
-
smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2;
1271
-
smu->workload_prority[PP_SMC_POWER_PROFILE_VIDEO] = 3;
1272
-
smu->workload_prority[PP_SMC_POWER_PROFILE_VR] = 4;
1273
-
smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5;
1274
-
smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6;
1269
+
smu->workload_priority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0;
1270
+
smu->workload_priority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1;
1271
+
smu->workload_priority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2;
1272
+
smu->workload_priority[PP_SMC_POWER_PROFILE_VIDEO] = 3;
1273
+
smu->workload_priority[PP_SMC_POWER_PROFILE_VR] = 4;
1274
+
smu->workload_priority[PP_SMC_POWER_PROFILE_COMPUTE] = 5;
1275
+
smu->workload_priority[PP_SMC_POWER_PROFILE_CUSTOM] = 6;
1275
1276
1276
1277
if (smu->is_apu ||
1277
-
!smu_is_workload_profile_available(smu, PP_SMC_POWER_PROFILE_FULLSCREEN3D))
1278
-
smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
1279
-
else
1280
-
smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D];
1278
+
!smu_is_workload_profile_available(smu, PP_SMC_POWER_PROFILE_FULLSCREEN3D)) {
1279
+
smu->driver_workload_mask =
1280
+
1 << smu->workload_priority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
1281
+
} else {
1282
+
smu->driver_workload_mask =
1283
+
1 << smu->workload_priority[PP_SMC_POWER_PROFILE_FULLSCREEN3D];
1284
+
smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D;
1285
+
}
1281
1286
1287
+
smu->workload_mask = smu->driver_workload_mask |
1288
+
smu->user_dpm_profile.user_workload_mask;
1282
1289
smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
1283
1290
smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D;
1284
1291
smu->workload_setting[2] = PP_SMC_POWER_PROFILE_POWERSAVING;
···
2355
2348
return -EINVAL;
2356
2349
2357
2350
if (!en) {
2358
-
smu->workload_mask &= ~(1 << smu->workload_prority[type]);
2351
+
smu->driver_workload_mask &= ~(1 << smu->workload_priority[type]);
2359
2352
index = fls(smu->workload_mask);
2360
2353
index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
2361
2354
workload[0] = smu->workload_setting[index];
2362
2355
} else {
2363
-
smu->workload_mask |= (1 << smu->workload_prority[type]);
2356
+
smu->driver_workload_mask |= (1 << smu->workload_priority[type]);
2364
2357
index = fls(smu->workload_mask);
2365
2358
index = index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
2366
2359
workload[0] = smu->workload_setting[index];
2367
2360
}
2361
+
2362
+
smu->workload_mask = smu->driver_workload_mask |
2363
+
smu->user_dpm_profile.user_workload_mask;
2368
2364
2369
2365
if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
2370
2366
smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)
···
3059
3049
uint32_t param_size)
3060
3050
{
3061
3051
struct smu_context *smu = handle;
3052
+
int ret;
3062
3053
3063
3054
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled ||
3064
3055
!smu->ppt_funcs->set_power_profile_mode)
3065
3056
return -EOPNOTSUPP;
3066
3057
3067
-
return smu_bump_power_profile_mode(smu, param, param_size);
3058
+
if (smu->user_dpm_profile.user_workload_mask &
3059
+
(1 << smu->workload_priority[param[param_size]]))
3060
+
return 0;
3061
+
3062
+
smu->user_dpm_profile.user_workload_mask =
3063
+
(1 << smu->workload_priority[param[param_size]]);
3064
+
smu->workload_mask = smu->user_dpm_profile.user_workload_mask |
3065
+
smu->driver_workload_mask;
3066
+
ret = smu_bump_power_profile_mode(smu, param, param_size);
3067
+
3068
+
return ret;
3068
3069
}
3069
3070
3070
3071
static int smu_get_fan_control_mode(void *handle, u32 *fan_mode)
+3
-1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+3
-1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
···
240
240
/* user clock state information */
241
241
uint32_t clk_mask[SMU_CLK_COUNT];
242
242
uint32_t clk_dependency;
243
+
uint32_t user_workload_mask;
243
244
};
244
245
245
246
#define SMU_TABLE_INIT(tables, table_id, s, a, d) \
···
558
557
bool disable_uclk_switch;
559
558
560
559
uint32_t workload_mask;
561
-
uint32_t workload_prority[WORKLOAD_POLICY_MAX];
560
+
uint32_t driver_workload_mask;
561
+
uint32_t workload_priority[WORKLOAD_POLICY_MAX];
562
562
uint32_t workload_setting[WORKLOAD_POLICY_MAX];
563
563
uint32_t power_profile_mode;
564
564
uint32_t default_power_profile_mode;
+2
-3
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+2
-3
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
···
1455
1455
return -EINVAL;
1456
1456
}
1457
1457
1458
-
1459
1458
if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) &&
1460
1459
(smu->smc_fw_version >= 0x360d00)) {
1461
1460
if (size != 10)
···
1522
1523
1523
1524
ret = smu_cmn_send_smc_msg_with_param(smu,
1524
1525
SMU_MSG_SetWorkloadMask,
1525
-
1 << workload_type,
1526
+
smu->workload_mask,
1526
1527
NULL);
1527
1528
if (ret) {
1528
1529
dev_err(smu->adev->dev, "Fail to set workload type %d\n", workload_type);
1529
1530
return ret;
1530
1531
}
1531
1532
1532
-
smu->power_profile_mode = profile_mode;
1533
+
smu_cmn_assign_power_profile(smu);
1533
1534
1534
1535
return 0;
1535
1536
}
+4
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+4
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
···
1786
1786
smu->power_profile_mode);
1787
1787
if (workload_type < 0)
1788
1788
return -EINVAL;
1789
+
1789
1790
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
1790
-
1 << workload_type, NULL);
1791
+
smu->workload_mask, NULL);
1791
1792
if (ret)
1792
1793
dev_err(smu->adev->dev, "[%s] Failed to set work load mask!", __func__);
1794
+
else
1795
+
smu_cmn_assign_power_profile(smu);
1793
1796
1794
1797
return ret;
1795
1798
}
+2
-2
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+2
-2
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
···
1079
1079
}
1080
1080
1081
1081
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify,
1082
-
1 << workload_type,
1082
+
smu->workload_mask,
1083
1083
NULL);
1084
1084
if (ret) {
1085
1085
dev_err_once(smu->adev->dev, "Fail to set workload type %d\n",
···
1087
1087
return ret;
1088
1088
}
1089
1089
1090
-
smu->power_profile_mode = profile_mode;
1090
+
smu_cmn_assign_power_profile(smu);
1091
1091
1092
1092
return 0;
1093
1093
}
+2
-2
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
+2
-2
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
···
890
890
}
891
891
892
892
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify,
893
-
1 << workload_type,
893
+
smu->workload_mask,
894
894
NULL);
895
895
if (ret) {
896
896
dev_err_once(smu->adev->dev, "Fail to set workload type %d\n", workload_type);
897
897
return ret;
898
898
}
899
899
900
-
smu->power_profile_mode = profile_mode;
900
+
smu_cmn_assign_power_profile(smu);
901
901
902
902
return 0;
903
903
}
+15
-5
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+15
-5
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
···
2485
2485
DpmActivityMonitorCoeffInt_t *activity_monitor =
2486
2486
&(activity_monitor_external.DpmActivityMonitorCoeffInt);
2487
2487
int workload_type, ret = 0;
2488
-
u32 workload_mask, selected_workload_mask;
2488
+
u32 workload_mask;
2489
2489
2490
2490
smu->power_profile_mode = input[size];
2491
2491
···
2552
2552
if (workload_type < 0)
2553
2553
return -EINVAL;
2554
2554
2555
-
selected_workload_mask = workload_mask = 1 << workload_type;
2555
+
workload_mask = 1 << workload_type;
2556
2556
2557
2557
/* Add optimizations for SMU13.0.0/10. Reuse the power saving profile */
2558
2558
if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) &&
···
2567
2567
workload_mask |= 1 << workload_type;
2568
2568
}
2569
2569
2570
+
smu->workload_mask |= workload_mask;
2570
2571
ret = smu_cmn_send_smc_msg_with_param(smu,
2571
2572
SMU_MSG_SetWorkloadMask,
2572
-
workload_mask,
2573
+
smu->workload_mask,
2573
2574
NULL);
2574
-
if (!ret)
2575
-
smu->workload_mask = selected_workload_mask;
2575
+
if (!ret) {
2576
+
smu_cmn_assign_power_profile(smu);
2577
+
if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_POWERSAVING) {
2578
+
workload_type = smu_cmn_to_asic_specific_index(smu,
2579
+
CMN2ASIC_MAPPING_WORKLOAD,
2580
+
PP_SMC_POWER_PROFILE_FULLSCREEN3D);
2581
+
smu->power_profile_mode = smu->workload_mask & (1 << workload_type)
2582
+
? PP_SMC_POWER_PROFILE_FULLSCREEN3D
2583
+
: PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
2584
+
}
2585
+
}
2576
2586
2577
2587
return ret;
2578
2588
}
+3
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+3
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
···
2499
2499
smu->power_profile_mode);
2500
2500
if (workload_type < 0)
2501
2501
return -EINVAL;
2502
+
2502
2503
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
2503
-
1 << workload_type, NULL);
2504
+
smu->workload_mask, NULL);
2504
2505
2505
2506
if (ret)
2506
2507
dev_err(smu->adev->dev, "[%s] Failed to set work load mask!", __func__);
2507
2508
else
2508
-
smu->workload_mask = (1 << workload_type);
2509
+
smu_cmn_assign_power_profile(smu);
2509
2510
2510
2511
return ret;
2511
2512
}
+5
-69
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+5
-69
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
···
367
367
return 0;
368
368
}
369
369
370
-
#ifndef atom_smc_dpm_info_table_14_0_0
371
-
struct atom_smc_dpm_info_table_14_0_0 {
372
-
struct atom_common_table_header table_header;
373
-
BoardTable_t BoardTable;
374
-
};
375
-
#endif
376
-
377
-
static int smu_v14_0_2_append_powerplay_table(struct smu_context *smu)
378
-
{
379
-
struct smu_table_context *table_context = &smu->smu_table;
380
-
PPTable_t *smc_pptable = table_context->driver_pptable;
381
-
struct atom_smc_dpm_info_table_14_0_0 *smc_dpm_table;
382
-
BoardTable_t *BoardTable = &smc_pptable->BoardTable;
383
-
int index, ret;
384
-
385
-
index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
386
-
smc_dpm_info);
387
-
388
-
ret = amdgpu_atombios_get_data_table(smu->adev, index, NULL, NULL, NULL,
389
-
(uint8_t **)&smc_dpm_table);
390
-
if (ret)
391
-
return ret;
392
-
393
-
memcpy(BoardTable, &smc_dpm_table->BoardTable, sizeof(BoardTable_t));
394
-
395
-
return 0;
396
-
}
397
-
398
-
#if 0
399
-
static int smu_v14_0_2_get_pptable_from_pmfw(struct smu_context *smu,
400
-
void **table,
401
-
uint32_t *size)
402
-
{
403
-
struct smu_table_context *smu_table = &smu->smu_table;
404
-
void *combo_pptable = smu_table->combo_pptable;
405
-
int ret = 0;
406
-
407
-
ret = smu_cmn_get_combo_pptable(smu);
408
-
if (ret)
409
-
return ret;
410
-
411
-
*table = combo_pptable;
412
-
*size = sizeof(struct smu_14_0_powerplay_table);
413
-
414
-
return 0;
415
-
}
416
-
#endif
417
-
418
370
static int smu_v14_0_2_get_pptable_from_pmfw(struct smu_context *smu,
419
371
void **table,
420
372
uint32_t *size)
···
388
436
static int smu_v14_0_2_setup_pptable(struct smu_context *smu)
389
437
{
390
438
struct smu_table_context *smu_table = &smu->smu_table;
391
-
struct amdgpu_device *adev = smu->adev;
392
439
int ret = 0;
393
440
394
441
if (amdgpu_sriov_vf(smu->adev))
395
442
return 0;
396
443
397
-
if (!adev->scpm_enabled)
398
-
ret = smu_v14_0_setup_pptable(smu);
399
-
else
400
-
ret = smu_v14_0_2_get_pptable_from_pmfw(smu,
444
+
ret = smu_v14_0_2_get_pptable_from_pmfw(smu,
401
445
&smu_table->power_play_table,
402
446
&smu_table->power_play_table_size);
403
447
if (ret)
···
402
454
ret = smu_v14_0_2_store_powerplay_table(smu);
403
455
if (ret)
404
456
return ret;
405
-
406
-
/*
407
-
* With SCPM enabled, the operation below will be handled
408
-
* by PSP. Driver involvment is unnecessary and useless.
409
-
*/
410
-
if (!adev->scpm_enabled) {
411
-
ret = smu_v14_0_2_append_powerplay_table(smu);
412
-
if (ret)
413
-
return ret;
414
-
}
415
457
416
458
ret = smu_v14_0_2_check_powerplay_table(smu);
417
459
if (ret)
···
1807
1869
if (workload_type < 0)
1808
1870
return -EINVAL;
1809
1871
1810
-
ret = smu_cmn_send_smc_msg_with_param(smu,
1811
-
SMU_MSG_SetWorkloadMask,
1812
-
1 << workload_type,
1813
-
NULL);
1872
+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
1873
+
smu->workload_mask, NULL);
1874
+
1814
1875
if (!ret)
1815
-
smu->workload_mask = 1 << workload_type;
1876
+
smu_cmn_assign_power_profile(smu);
1816
1877
1817
1878
return ret;
1818
1879
}
···
2736
2799
.check_fw_status = smu_v14_0_check_fw_status,
2737
2800
.setup_pptable = smu_v14_0_2_setup_pptable,
2738
2801
.check_fw_version = smu_v14_0_check_fw_version,
2739
-
.write_pptable = smu_cmn_write_pptable,
2740
2802
.set_driver_table_location = smu_v14_0_set_driver_table_location,
2741
2803
.system_features_control = smu_v14_0_system_features_control,
2742
2804
.set_allowed_mask = smu_v14_0_set_allowed_mask,
+8
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+8
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
···
1138
1138
return ret;
1139
1139
}
1140
1140
1141
+
void smu_cmn_assign_power_profile(struct smu_context *smu)
1142
+
{
1143
+
uint32_t index;
1144
+
index = fls(smu->workload_mask);
1145
+
index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
1146
+
smu->power_profile_mode = smu->workload_setting[index];
1147
+
}
1148
+
1141
1149
bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev)
1142
1150
{
1143
1151
struct pci_dev *p = NULL;
+2
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+2
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
···
130
130
int smu_cmn_set_mp1_state(struct smu_context *smu,
131
131
enum pp_mp1_state mp1_state);
132
132
133
+
void smu_cmn_assign_power_profile(struct smu_context *smu);
134
+
133
135
/*
134
136
* Helper function to make sysfs_emit_at() happy. Align buf to
135
137
* the current page boundary and record the offset.
+1
-1
drivers/gpu/drm/xe/regs/xe_gt_regs.h
+1
-1
drivers/gpu/drm/xe/regs/xe_gt_regs.h
···
517
517
* [4-6] RSVD
518
518
* [7] Disabled
519
519
*/
520
-
#define CCS_MODE XE_REG(0x14804)
520
+
#define CCS_MODE XE_REG(0x14804, XE_REG_OPTION_MASKED)
521
521
#define CCS_MODE_CSLICE_0_3_MASK REG_GENMASK(11, 0) /* 3 bits per cslice */
522
522
#define CCS_MODE_CSLICE_MASK 0x7 /* CCS0-3 + rsvd */
523
523
#define CCS_MODE_CSLICE_WIDTH ilog2(CCS_MODE_CSLICE_MASK + 1)
-10
drivers/gpu/drm/xe/xe_device.c
-10
drivers/gpu/drm/xe/xe_device.c
···
87
87
mutex_init(&xef->exec_queue.lock);
88
88
xa_init_flags(&xef->exec_queue.xa, XA_FLAGS_ALLOC1);
89
89
90
-
spin_lock(&xe->clients.lock);
91
-
xe->clients.count++;
92
-
spin_unlock(&xe->clients.lock);
93
-
94
90
file->driver_priv = xef;
95
91
kref_init(&xef->refcount);
96
92
···
103
107
static void xe_file_destroy(struct kref *ref)
104
108
{
105
109
struct xe_file *xef = container_of(ref, struct xe_file, refcount);
106
-
struct xe_device *xe = xef->xe;
107
110
108
111
xa_destroy(&xef->exec_queue.xa);
109
112
mutex_destroy(&xef->exec_queue.lock);
110
113
xa_destroy(&xef->vm.xa);
111
114
mutex_destroy(&xef->vm.lock);
112
-
113
-
spin_lock(&xe->clients.lock);
114
-
xe->clients.count--;
115
-
spin_unlock(&xe->clients.lock);
116
115
117
116
xe_drm_client_put(xef->client);
118
117
kfree(xef->process_name);
···
324
333
xe->info.force_execlist = xe_modparam.force_execlist;
325
334
326
335
spin_lock_init(&xe->irq.lock);
327
-
spin_lock_init(&xe->clients.lock);
328
336
329
337
init_waitqueue_head(&xe->ufence_wq);
330
338
+14
drivers/gpu/drm/xe/xe_device.h
+14
drivers/gpu/drm/xe/xe_device.h
···
178
178
struct xe_file *xe_file_get(struct xe_file *xef);
179
179
void xe_file_put(struct xe_file *xef);
180
180
181
+
/*
182
+
* Occasionally it is seen that the G2H worker starts running after a delay of more than
183
+
* a second even after being queued and activated by the Linux workqueue subsystem. This
184
+
* leads to G2H timeout error. The root cause of issue lies with scheduling latency of
185
+
* Lunarlake Hybrid CPU. Issue disappears if we disable Lunarlake atom cores from BIOS
186
+
* and this is beyond xe kmd.
187
+
*
188
+
* TODO: Drop this change once workqueue scheduling delay issue is fixed on LNL Hybrid CPU.
189
+
*/
190
+
#define LNL_FLUSH_WORKQUEUE(wq__) \
191
+
flush_workqueue(wq__)
192
+
#define LNL_FLUSH_WORK(wrk__) \
193
+
flush_work(wrk__)
194
+
181
195
#endif
-9
drivers/gpu/drm/xe/xe_device_types.h
-9
drivers/gpu/drm/xe/xe_device_types.h
···
353
353
struct workqueue_struct *wq;
354
354
} sriov;
355
355
356
-
/** @clients: drm clients info */
357
-
struct {
358
-
/** @clients.lock: Protects drm clients info */
359
-
spinlock_t lock;
360
-
361
-
/** @clients.count: number of drm clients */
362
-
u64 count;
363
-
} clients;
364
-
365
356
/** @usm: unified memory state */
366
357
struct {
367
358
/** @usm.asid: convert a ASID to VM */
+9
-4
drivers/gpu/drm/xe/xe_exec.c
+9
-4
drivers/gpu/drm/xe/xe_exec.c
···
132
132
if (XE_IOCTL_DBG(xe, !q))
133
133
return -ENOENT;
134
134
135
-
if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
136
-
return -EINVAL;
135
+
if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM)) {
136
+
err = -EINVAL;
137
+
goto err_exec_queue;
138
+
}
137
139
138
140
if (XE_IOCTL_DBG(xe, args->num_batch_buffer &&
139
-
q->width != args->num_batch_buffer))
140
-
return -EINVAL;
141
+
q->width != args->num_batch_buffer)) {
142
+
err = -EINVAL;
143
+
goto err_exec_queue;
144
+
}
141
145
142
146
if (XE_IOCTL_DBG(xe, q->ops->reset_status(q))) {
143
147
err = -ECANCELED;
···
224
220
fence = xe_sync_in_fence_get(syncs, num_syncs, q, vm);
225
221
if (IS_ERR(fence)) {
226
222
err = PTR_ERR(fence);
223
+
xe_vm_unlock(vm);
227
224
goto err_unlock_list;
228
225
}
229
226
for (i = 0; i < num_syncs; i++)
+6
drivers/gpu/drm/xe/xe_exec_queue.c
+6
drivers/gpu/drm/xe/xe_exec_queue.c
···
260
260
{
261
261
int i;
262
262
263
+
/*
264
+
* Before releasing our ref to lrc and xef, accumulate our run ticks
265
+
*/
266
+
xe_exec_queue_update_run_ticks(q);
267
+
263
268
for (i = 0; i < q->width; ++i)
264
269
xe_lrc_put(q->lrc[i]);
270
+
265
271
__xe_exec_queue_free(q);
266
272
}
267
273
+11
-4
drivers/gpu/drm/xe/xe_gt_ccs_mode.c
+11
-4
drivers/gpu/drm/xe/xe_gt_ccs_mode.c
···
68
68
}
69
69
}
70
70
71
+
/*
72
+
* Mask bits need to be set for the register. Though only Xe2+
73
+
* platforms require setting of mask bits, it won't harm for older
74
+
* platforms as these bits are unused there.
75
+
*/
76
+
mode |= CCS_MODE_CSLICE_0_3_MASK << 16;
71
77
xe_mmio_write32(gt, CCS_MODE, mode);
72
78
73
79
xe_gt_dbg(gt, "CCS_MODE=%x config:%08x, num_engines:%d, num_slices:%d\n",
···
139
133
}
140
134
141
135
/* CCS mode can only be updated when there are no drm clients */
142
-
spin_lock(&xe->clients.lock);
143
-
if (xe->clients.count) {
144
-
spin_unlock(&xe->clients.lock);
136
+
mutex_lock(&xe->drm.filelist_mutex);
137
+
if (!list_empty(&xe->drm.filelist)) {
138
+
mutex_unlock(&xe->drm.filelist_mutex);
139
+
xe_gt_dbg(gt, "Rejecting compute mode change as there are active drm clients\n");
145
140
return -EBUSY;
146
141
}
147
142
···
153
146
xe_gt_reset_async(gt);
154
147
}
155
148
156
-
spin_unlock(&xe->clients.lock);
149
+
mutex_unlock(&xe->drm.filelist_mutex);
157
150
158
151
return count;
159
152
}
+3
-1
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+3
-1
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
···
387
387
* the xe_ggtt_clear() called by below xe_ggtt_remove_node().
388
388
*/
389
389
xe_ggtt_node_remove(node, false);
390
+
} else {
391
+
xe_ggtt_node_fini(node);
390
392
}
391
393
}
392
394
···
444
442
config->ggtt_region = node;
445
443
return 0;
446
444
err:
447
-
xe_ggtt_node_fini(node);
445
+
pf_release_ggtt(tile, node);
448
446
return err;
449
447
}
450
448
+2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
···
72
72
struct xe_device *xe = gt_to_xe(gt);
73
73
struct xe_gt_tlb_invalidation_fence *fence, *next;
74
74
75
+
LNL_FLUSH_WORK(>->uc.guc.ct.g2h_worker);
76
+
75
77
spin_lock_irq(>->tlb_invalidation.pending_lock);
76
78
list_for_each_entry_safe(fence, next,
77
79
>->tlb_invalidation.pending_fences, link) {
+1
-10
drivers/gpu/drm/xe/xe_guc_ct.c
+1
-10
drivers/gpu/drm/xe/xe_guc_ct.c
···
897
897
898
898
ret = wait_event_timeout(ct->g2h_fence_wq, g2h_fence.done, HZ);
899
899
900
-
/*
901
-
* Occasionally it is seen that the G2H worker starts running after a delay of more than
902
-
* a second even after being queued and activated by the Linux workqueue subsystem. This
903
-
* leads to G2H timeout error. The root cause of issue lies with scheduling latency of
904
-
* Lunarlake Hybrid CPU. Issue dissappears if we disable Lunarlake atom cores from BIOS
905
-
* and this is beyond xe kmd.
906
-
*
907
-
* TODO: Drop this change once workqueue scheduling delay issue is fixed on LNL Hybrid CPU.
908
-
*/
909
900
if (!ret) {
910
-
flush_work(&ct->g2h_worker);
901
+
LNL_FLUSH_WORK(&ct->g2h_worker);
911
902
if (g2h_fence.done) {
912
903
xe_gt_warn(gt, "G2H fence %u, action %04x, done\n",
913
904
g2h_fence.seqno, action[0]);
-2
drivers/gpu/drm/xe/xe_guc_submit.c
-2
drivers/gpu/drm/xe/xe_guc_submit.c
+7
drivers/gpu/drm/xe/xe_wait_user_fence.c
+7
drivers/gpu/drm/xe/xe_wait_user_fence.c
···
155
155
}
156
156
157
157
if (!timeout) {
158
+
LNL_FLUSH_WORKQUEUE(xe->ordered_wq);
159
+
err = do_compare(addr, args->value, args->mask,
160
+
args->op);
161
+
if (err <= 0) {
162
+
drm_dbg(&xe->drm, "LNL_FLUSH_WORKQUEUE resolved ufence timeout\n");
163
+
break;
164
+
}
158
165
err = -ETIME;
159
166
break;
160
167
}
+1
-1
drivers/hid/hid-core.c
+1
-1
drivers/hid/hid-core.c
+4
-2
drivers/i2c/busses/i2c-designware-common.c
+4
-2
drivers/i2c/busses/i2c-designware-common.c
···
524
524
void __i2c_dw_disable(struct dw_i2c_dev *dev)
525
525
{
526
526
struct i2c_timings *t = &dev->timings;
527
-
unsigned int raw_intr_stats;
527
+
unsigned int raw_intr_stats, ic_stats;
528
528
unsigned int enable;
529
529
int timeout = 100;
530
530
bool abort_needed;
···
532
532
int ret;
533
533
534
534
regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats);
535
+
regmap_read(dev->map, DW_IC_STATUS, &ic_stats);
535
536
regmap_read(dev->map, DW_IC_ENABLE, &enable);
536
537
537
-
abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD;
538
+
abort_needed = (raw_intr_stats & DW_IC_INTR_MST_ON_HOLD) ||
539
+
(ic_stats & DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY);
538
540
if (abort_needed) {
539
541
if (!(enable & DW_IC_ENABLE_ENABLE)) {
540
542
regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE);
+1
drivers/i2c/busses/i2c-designware-core.h
+1
drivers/i2c/busses/i2c-designware-core.h
···
116
116
#define DW_IC_STATUS_RFNE BIT(3)
117
117
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
118
118
#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
119
+
#define DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY BIT(7)
119
120
120
121
#define DW_IC_SDA_HOLD_RX_SHIFT 16
121
122
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16)
+2
-2
drivers/i2c/muxes/i2c-mux-mule.c
+2
-2
drivers/i2c/muxes/i2c-mux-mule.c
···
66
66
priv = i2c_mux_priv(muxc);
67
67
68
68
priv->regmap = dev_get_regmap(mux_dev->parent, NULL);
69
-
if (IS_ERR(priv->regmap))
70
-
return dev_err_probe(mux_dev, PTR_ERR(priv->regmap),
69
+
if (!priv->regmap)
70
+
return dev_err_probe(mux_dev, -ENODEV,
71
71
"No parent i2c register map\n");
72
72
73
73
platform_set_drvdata(pdev, muxc);
+7
drivers/irqchip/irq-gic-v3.c
+7
drivers/irqchip/irq-gic-v3.c
···
524
524
}
525
525
526
526
gic_poke_irq(d, reg);
527
+
528
+
/*
529
+
* Force read-back to guarantee that the active state has taken
530
+
* effect, and won't race with a guest-driven deactivation.
531
+
*/
532
+
if (reg == GICD_ISACTIVER)
533
+
gic_peek_irq(d, reg);
527
534
return 0;
528
535
}
529
536
+30
-29
drivers/md/dm-cache-target.c
+30
-29
drivers/md/dm-cache-target.c
···
1905
1905
* This function gets called on the error paths of the constructor, so we
1906
1906
* have to cope with a partially initialised struct.
1907
1907
*/
1908
-
static void destroy(struct cache *cache)
1908
+
static void __destroy(struct cache *cache)
1909
1909
{
1910
-
unsigned int i;
1911
-
1912
1910
mempool_exit(&cache->migration_pool);
1913
1911
1914
1912
if (cache->prison)
1915
1913
dm_bio_prison_destroy_v2(cache->prison);
1916
1914
1917
-
cancel_delayed_work_sync(&cache->waker);
1918
1915
if (cache->wq)
1919
1916
destroy_workqueue(cache->wq);
1920
1917
···
1939
1942
if (cache->policy)
1940
1943
dm_cache_policy_destroy(cache->policy);
1941
1944
1945
+
bioset_exit(&cache->bs);
1946
+
1947
+
kfree(cache);
1948
+
}
1949
+
1950
+
static void destroy(struct cache *cache)
1951
+
{
1952
+
unsigned int i;
1953
+
1954
+
cancel_delayed_work_sync(&cache->waker);
1955
+
1942
1956
for (i = 0; i < cache->nr_ctr_args ; i++)
1943
1957
kfree(cache->ctr_args[i]);
1944
1958
kfree(cache->ctr_args);
1945
1959
1946
-
bioset_exit(&cache->bs);
1947
-
1948
-
kfree(cache);
1960
+
__destroy(cache);
1949
1961
}
1950
1962
1951
1963
static void cache_dtr(struct dm_target *ti)
···
2009
2003
sector_t cache_sectors;
2010
2004
2011
2005
struct dm_dev *origin_dev;
2012
-
sector_t origin_sectors;
2013
2006
2014
2007
uint32_t block_size;
2015
2008
···
2089
2084
static int parse_origin_dev(struct cache_args *ca, struct dm_arg_set *as,
2090
2085
char **error)
2091
2086
{
2087
+
sector_t origin_sectors;
2092
2088
int r;
2093
2089
2094
2090
if (!at_least_one_arg(as, error))
···
2102
2096
return r;
2103
2097
}
2104
2098
2105
-
ca->origin_sectors = get_dev_size(ca->origin_dev);
2106
-
if (ca->ti->len > ca->origin_sectors) {
2099
+
origin_sectors = get_dev_size(ca->origin_dev);
2100
+
if (ca->ti->len > origin_sectors) {
2107
2101
*error = "Device size larger than cached device";
2108
2102
return -EINVAL;
2109
2103
}
···
2413
2407
2414
2408
ca->metadata_dev = ca->origin_dev = ca->cache_dev = NULL;
2415
2409
2416
-
origin_blocks = cache->origin_sectors = ca->origin_sectors;
2410
+
origin_blocks = cache->origin_sectors = ti->len;
2417
2411
origin_blocks = block_div(origin_blocks, ca->block_size);
2418
2412
cache->origin_blocks = to_oblock(origin_blocks);
2419
2413
···
2567
2561
*result = cache;
2568
2562
return 0;
2569
2563
bad:
2570
-
destroy(cache);
2564
+
__destroy(cache);
2571
2565
return r;
2572
2566
}
2573
2567
···
2618
2612
2619
2613
r = copy_ctr_args(cache, argc - 3, (const char **)argv + 3);
2620
2614
if (r) {
2621
-
destroy(cache);
2615
+
__destroy(cache);
2622
2616
goto out;
2623
2617
}
2624
2618
···
2901
2895
static bool can_resize(struct cache *cache, dm_cblock_t new_size)
2902
2896
{
2903
2897
if (from_cblock(new_size) > from_cblock(cache->cache_size)) {
2904
-
if (cache->sized) {
2905
-
DMERR("%s: unable to extend cache due to missing cache table reload",
2906
-
cache_device_name(cache));
2907
-
return false;
2908
-
}
2898
+
DMERR("%s: unable to extend cache due to missing cache table reload",
2899
+
cache_device_name(cache));
2900
+
return false;
2909
2901
}
2910
2902
2911
2903
/*
2912
2904
* We can't drop a dirty block when shrinking the cache.
2913
2905
*/
2914
-
while (from_cblock(new_size) < from_cblock(cache->cache_size)) {
2915
-
new_size = to_cblock(from_cblock(new_size) + 1);
2916
-
if (is_dirty(cache, new_size)) {
2906
+
if (cache->loaded_mappings) {
2907
+
new_size = to_cblock(find_next_bit(cache->dirty_bitset,
2908
+
from_cblock(cache->cache_size),
2909
+
from_cblock(new_size)));
2910
+
if (new_size != cache->cache_size) {
2917
2911
DMERR("%s: unable to shrink cache; cache block %llu is dirty",
2918
2912
cache_device_name(cache),
2919
2913
(unsigned long long) from_cblock(new_size));
···
2949
2943
/*
2950
2944
* Check to see if the cache has resized.
2951
2945
*/
2952
-
if (!cache->sized) {
2953
-
r = resize_cache_dev(cache, csize);
2954
-
if (r)
2955
-
return r;
2956
-
2957
-
cache->sized = true;
2958
-
2959
-
} else if (csize != cache->cache_size) {
2946
+
if (!cache->sized || csize != cache->cache_size) {
2960
2947
if (!can_resize(cache, csize))
2961
2948
return -EINVAL;
2962
2949
2963
2950
r = resize_cache_dev(cache, csize);
2964
2951
if (r)
2965
2952
return r;
2953
+
2954
+
cache->sized = true;
2966
2955
}
2967
2956
2968
2957
if (!cache->loaded_mappings) {
+2
-2
drivers/md/dm-unstripe.c
+2
-2
drivers/md/dm-unstripe.c
···
85
85
}
86
86
uc->physical_start = start;
87
87
88
-
uc->unstripe_offset = uc->unstripe * uc->chunk_size;
89
-
uc->unstripe_width = (uc->stripes - 1) * uc->chunk_size;
88
+
uc->unstripe_offset = (sector_t)uc->unstripe * uc->chunk_size;
89
+
uc->unstripe_width = (sector_t)(uc->stripes - 1) * uc->chunk_size;
90
90
uc->chunk_shift = is_power_of_2(uc->chunk_size) ? fls(uc->chunk_size) - 1 : 0;
91
91
92
92
tmp_len = ti->len;
+6
-3
drivers/md/dm-verity-target.c
+6
-3
drivers/md/dm-verity-target.c
···
356
356
else if (verity_handle_err(v,
357
357
DM_VERITY_BLOCK_TYPE_METADATA,
358
358
hash_block)) {
359
-
struct bio *bio =
360
-
dm_bio_from_per_bio_data(io,
361
-
v->ti->per_io_data_size);
359
+
struct bio *bio;
360
+
io->had_mismatch = true;
361
+
bio = dm_bio_from_per_bio_data(io, v->ti->per_io_data_size);
362
362
dm_audit_log_bio(DM_MSG_PREFIX, "verify-metadata", bio,
363
363
block, 0);
364
364
r = -EIO;
···
482
482
return -EIO; /* Error correction failed; Just return error */
483
483
484
484
if (verity_handle_err(v, DM_VERITY_BLOCK_TYPE_DATA, blkno)) {
485
+
io->had_mismatch = true;
485
486
dm_audit_log_bio(DM_MSG_PREFIX, "verify-data", bio, blkno, 0);
486
487
return -EIO;
487
488
}
···
607
606
608
607
if (unlikely(status != BLK_STS_OK) &&
609
608
unlikely(!(bio->bi_opf & REQ_RAHEAD)) &&
609
+
!io->had_mismatch &&
610
610
!verity_is_system_shutting_down()) {
611
611
if (v->error_mode == DM_VERITY_MODE_PANIC) {
612
612
panic("dm-verity device has I/O error");
···
781
779
io->orig_bi_end_io = bio->bi_end_io;
782
780
io->block = bio->bi_iter.bi_sector >> (v->data_dev_block_bits - SECTOR_SHIFT);
783
781
io->n_blocks = bio->bi_iter.bi_size >> v->data_dev_block_bits;
782
+
io->had_mismatch = false;
784
783
785
784
bio->bi_end_io = verity_end_io;
786
785
bio->bi_private = io;
+1
drivers/md/dm-verity.h
+1
drivers/md/dm-verity.h
+3
-1
drivers/md/dm.c
+3
-1
drivers/md/dm.c
···
2290
2290
* override accordingly.
2291
2291
*/
2292
2292
md->disk = blk_alloc_disk(NULL, md->numa_node_id);
2293
-
if (IS_ERR(md->disk))
2293
+
if (IS_ERR(md->disk)) {
2294
+
md->disk = NULL;
2294
2295
goto bad;
2296
+
}
2295
2297
md->queue = md->disk->queue;
2296
2298
2297
2299
init_waitqueue_head(&md->wait);
+3
-3
drivers/media/cec/usb/extron-da-hd-4k-plus/extron-da-hd-4k-plus.c
+3
-3
drivers/media/cec/usb/extron-da-hd-4k-plus/extron-da-hd-4k-plus.c
···
348
348
349
349
/* Return if not a CTA-861 extension block */
350
350
if (size < 256 || edid[0] != 0x02 || edid[1] != 0x03)
351
-
return -1;
351
+
return -ENOENT;
352
352
353
353
/* search tag */
354
354
d = edid[0x02] & 0x7f;
355
355
if (d <= 4)
356
-
return -1;
356
+
return -ENOENT;
357
357
358
358
i = 0x04;
359
359
end = 0x00 + d;
···
371
371
return offset + i;
372
372
i += len + 1;
373
373
} while (i < end);
374
-
return -1;
374
+
return -ENOENT;
375
375
}
376
376
377
377
static void extron_edid_crc(u8 *edid)
+1
-1
drivers/media/cec/usb/pulse8/pulse8-cec.c
+1
-1
drivers/media/cec/usb/pulse8/pulse8-cec.c
···
685
685
err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 4);
686
686
if (err)
687
687
return err;
688
-
date = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3];
688
+
date = ((unsigned)data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3];
689
689
dev_info(pulse8->dev, "Firmware build date %ptT\n", &date);
690
690
691
691
dev_dbg(pulse8->dev, "Persistent config:\n");
+3
drivers/media/common/v4l2-tpg/v4l2-tpg-core.c
+3
drivers/media/common/v4l2-tpg/v4l2-tpg-core.c
+15
-13
drivers/media/common/videobuf2/videobuf2-core.c
+15
-13
drivers/media/common/videobuf2/videobuf2-core.c
···
1482
1482
}
1483
1483
vb->planes[plane].dbuf_mapped = 1;
1484
1484
}
1485
+
} else {
1486
+
for (plane = 0; plane < vb->num_planes; ++plane)
1487
+
dma_buf_put(planes[plane].dbuf);
1488
+
}
1485
1489
1486
-
/*
1487
-
* Now that everything is in order, copy relevant information
1488
-
* provided by userspace.
1489
-
*/
1490
-
for (plane = 0; plane < vb->num_planes; ++plane) {
1491
-
vb->planes[plane].bytesused = planes[plane].bytesused;
1492
-
vb->planes[plane].length = planes[plane].length;
1493
-
vb->planes[plane].m.fd = planes[plane].m.fd;
1494
-
vb->planes[plane].data_offset = planes[plane].data_offset;
1495
-
}
1490
+
/*
1491
+
* Now that everything is in order, copy relevant information
1492
+
* provided by userspace.
1493
+
*/
1494
+
for (plane = 0; plane < vb->num_planes; ++plane) {
1495
+
vb->planes[plane].bytesused = planes[plane].bytesused;
1496
+
vb->planes[plane].length = planes[plane].length;
1497
+
vb->planes[plane].m.fd = planes[plane].m.fd;
1498
+
vb->planes[plane].data_offset = planes[plane].data_offset;
1499
+
}
1496
1500
1501
+
if (reacquired) {
1497
1502
/*
1498
1503
* Call driver-specific initialization on the newly acquired buffer,
1499
1504
* if provided.
···
1508
1503
dprintk(q, 1, "buffer initialization failed\n");
1509
1504
goto err_put_vb2_buf;
1510
1505
}
1511
-
} else {
1512
-
for (plane = 0; plane < vb->num_planes; ++plane)
1513
-
dma_buf_put(planes[plane].dbuf);
1514
1506
}
1515
1507
1516
1508
ret = call_vb_qop(vb, buf_prepare, vb);
+2
-2
drivers/media/dvb-core/dvb_frontend.c
+2
-2
drivers/media/dvb-core/dvb_frontend.c
+7
-1
drivers/media/dvb-core/dvb_vb2.c
+7
-1
drivers/media/dvb-core/dvb_vb2.c
···
366
366
int dvb_vb2_expbuf(struct dvb_vb2_ctx *ctx, struct dmx_exportbuffer *exp)
367
367
{
368
368
struct vb2_queue *q = &ctx->vb_q;
369
+
struct vb2_buffer *vb2 = vb2_get_buffer(q, exp->index);
369
370
int ret;
370
371
371
-
ret = vb2_core_expbuf(&ctx->vb_q, &exp->fd, q->type, q->bufs[exp->index],
372
+
if (!vb2) {
373
+
dprintk(1, "[%s] invalid buffer index\n", ctx->name);
374
+
return -EINVAL;
375
+
}
376
+
377
+
ret = vb2_core_expbuf(&ctx->vb_q, &exp->fd, q->type, vb2,
372
378
0, exp->flags);
373
379
if (ret) {
374
380
dprintk(1, "[%s] index=%d errno=%d\n", ctx->name,
+11
-5
drivers/media/dvb-core/dvbdev.c
+11
-5
drivers/media/dvb-core/dvbdev.c
···
86
86
static int dvb_device_open(struct inode *inode, struct file *file)
87
87
{
88
88
struct dvb_device *dvbdev;
89
+
unsigned int minor = iminor(inode);
90
+
91
+
if (minor >= MAX_DVB_MINORS)
92
+
return -ENODEV;
89
93
90
94
mutex_lock(&dvbdev_mutex);
91
95
down_read(&minor_rwsem);
92
-
dvbdev = dvb_minors[iminor(inode)];
96
+
97
+
dvbdev = dvb_minors[minor];
93
98
94
99
if (dvbdev && dvbdev->fops) {
95
100
int err = 0;
···
530
525
for (minor = 0; minor < MAX_DVB_MINORS; minor++)
531
526
if (!dvb_minors[minor])
532
527
break;
533
-
if (minor == MAX_DVB_MINORS) {
528
+
#else
529
+
minor = nums2minor(adap->num, type, id);
530
+
#endif
531
+
if (minor >= MAX_DVB_MINORS) {
534
532
if (new_node) {
535
533
list_del(&new_node->list_head);
536
534
kfree(dvbdevfops);
···
546
538
mutex_unlock(&dvbdev_register_lock);
547
539
return -EINVAL;
548
540
}
549
-
#else
550
-
minor = nums2minor(adap->num, type, id);
551
-
#endif
541
+
552
542
dvbdev->minor = minor;
553
543
dvb_minors[minor] = dvb_device_get(dvbdev);
554
544
up_write(&minor_rwsem);
+6
-1
drivers/media/dvb-frontends/cx24116.c
+6
-1
drivers/media/dvb-frontends/cx24116.c
···
741
741
{
742
742
struct cx24116_state *state = fe->demodulator_priv;
743
743
u8 snr_reading;
744
+
int ret;
744
745
static const u32 snr_tab[] = { /* 10 x Table (rounded up) */
745
746
0x00000, 0x0199A, 0x03333, 0x04ccD, 0x06667,
746
747
0x08000, 0x0999A, 0x0b333, 0x0cccD, 0x0e667,
···
750
749
751
750
dprintk("%s()\n", __func__);
752
751
753
-
snr_reading = cx24116_readreg(state, CX24116_REG_QUALITY0);
752
+
ret = cx24116_readreg(state, CX24116_REG_QUALITY0);
753
+
if (ret < 0)
754
+
return ret;
755
+
756
+
snr_reading = ret;
754
757
755
758
if (snr_reading >= 0xa0 /* 100% */)
756
759
*snr = 0xffff;
+1
-1
drivers/media/dvb-frontends/stb0899_algo.c
+1
-1
drivers/media/dvb-frontends/stb0899_algo.c
+17
-9
drivers/media/i2c/adv7604.c
+17
-9
drivers/media/i2c/adv7604.c
···
2519
2519
const struct adv76xx_chip_info *info = state->info;
2520
2520
struct v4l2_dv_timings timings;
2521
2521
struct stdi_readback stdi;
2522
-
u8 reg_io_0x02 = io_read(sd, 0x02);
2522
+
int ret;
2523
+
u8 reg_io_0x02;
2523
2524
u8 edid_enabled;
2524
2525
u8 cable_det;
2525
-
2526
2526
static const char * const csc_coeff_sel_rb[16] = {
2527
2527
"bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB",
2528
2528
"reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709",
···
2621
2621
v4l2_info(sd, "-----Color space-----\n");
2622
2622
v4l2_info(sd, "RGB quantization range ctrl: %s\n",
2623
2623
rgb_quantization_range_txt[state->rgb_quantization_range]);
2624
-
v4l2_info(sd, "Input color space: %s\n",
2625
-
input_color_space_txt[reg_io_0x02 >> 4]);
2626
-
v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n",
2627
-
(reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
2628
-
(((reg_io_0x02 >> 2) & 0x01) ^ (reg_io_0x02 & 0x01)) ?
2629
-
"(16-235)" : "(0-255)",
2630
-
(reg_io_0x02 & 0x08) ? "enabled" : "disabled");
2624
+
2625
+
ret = io_read(sd, 0x02);
2626
+
if (ret < 0) {
2627
+
v4l2_info(sd, "Can't read Input/Output color space\n");
2628
+
} else {
2629
+
reg_io_0x02 = ret;
2630
+
2631
+
v4l2_info(sd, "Input color space: %s\n",
2632
+
input_color_space_txt[reg_io_0x02 >> 4]);
2633
+
v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n",
2634
+
(reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
2635
+
(((reg_io_0x02 >> 2) & 0x01) ^ (reg_io_0x02 & 0x01)) ?
2636
+
"(16-235)" : "(0-255)",
2637
+
(reg_io_0x02 & 0x08) ? "enabled" : "disabled");
2638
+
}
2631
2639
v4l2_info(sd, "Color space conversion: %s\n",
2632
2640
csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]);
2633
2641
+2
-2
drivers/media/i2c/ar0521.c
+2
-2
drivers/media/i2c/ar0521.c
···
255
255
continue; /* Minimum value */
256
256
if (new_mult > 254)
257
257
break; /* Maximum, larger pre won't work either */
258
-
if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN *
258
+
if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN *
259
259
new_pre)
260
260
continue;
261
-
if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX *
261
+
if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX *
262
262
new_pre)
263
263
break; /* Larger pre won't work either */
264
264
new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,
+2
drivers/media/pci/mgb4/mgb4_cmt.c
+2
drivers/media/pci/mgb4/mgb4_cmt.c
+11
-6
drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c
+11
-6
drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c
···
775
775
(unsigned long)vb2_plane_vaddr(&vb->vb2_buf, 0) + ctx->out_q.sos + 2;
776
776
jpeg_buffer.curr = 0;
777
777
778
-
word = 0;
779
-
780
778
if (get_word_be(&jpeg_buffer, &word))
781
779
return;
782
-
jpeg_buffer.size = (long)word - 2;
780
+
781
+
if (word < 2)
782
+
jpeg_buffer.size = 0;
783
+
else
784
+
jpeg_buffer.size = (long)word - 2;
785
+
783
786
jpeg_buffer.data += 2;
784
787
jpeg_buffer.curr = 0;
785
788
···
1061
1058
if (byte == -1)
1062
1059
return -1;
1063
1060
*word = (unsigned int)byte | temp;
1061
+
1064
1062
return 0;
1065
1063
}
1066
1064
···
1149
1145
if (get_word_be(&jpeg_buffer, &word))
1150
1146
break;
1151
1147
length = (long)word - 2;
1152
-
if (!length)
1148
+
if (length <= 0)
1153
1149
return false;
1154
1150
sof = jpeg_buffer.curr; /* after 0xffc0 */
1155
1151
sof_len = length;
···
1180
1176
if (get_word_be(&jpeg_buffer, &word))
1181
1177
break;
1182
1178
length = (long)word - 2;
1183
-
if (!length)
1179
+
if (length <= 0)
1184
1180
return false;
1185
1181
if (n_dqt >= S5P_JPEG_MAX_MARKER)
1186
1182
return false;
···
1193
1189
if (get_word_be(&jpeg_buffer, &word))
1194
1190
break;
1195
1191
length = (long)word - 2;
1196
-
if (!length)
1192
+
if (length <= 0)
1197
1193
return false;
1198
1194
if (n_dht >= S5P_JPEG_MAX_MARKER)
1199
1195
return false;
···
1218
1214
if (get_word_be(&jpeg_buffer, &word))
1219
1215
break;
1220
1216
length = (long)word - 2;
1217
+
/* No need to check underflows as skip() does it */
1221
1218
skip(&jpeg_buffer, length);
1222
1219
break;
1223
1220
}
+1
-1
drivers/media/test-drivers/vivid/vivid-core.c
+1
-1
drivers/media/test-drivers/vivid/vivid-core.c
···
910
910
* videobuf2-core.c to MAX_BUFFER_INDEX.
911
911
*/
912
912
if (buf_type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
913
-
q->max_num_buffers = 64;
913
+
q->max_num_buffers = MAX_VID_CAP_BUFFERS;
914
914
if (buf_type == V4L2_BUF_TYPE_SDR_CAPTURE)
915
915
q->max_num_buffers = 1024;
916
916
if (buf_type == V4L2_BUF_TYPE_VBI_CAPTURE)
+3
-1
drivers/media/test-drivers/vivid/vivid-core.h
+3
-1
drivers/media/test-drivers/vivid/vivid-core.h
···
26
26
#define MAX_INPUTS 16
27
27
/* The maximum number of outputs */
28
28
#define MAX_OUTPUTS 16
29
+
/* The maximum number of video capture buffers */
30
+
#define MAX_VID_CAP_BUFFERS 64
29
31
/* The maximum up or down scaling factor is 4 */
30
32
#define MAX_ZOOM 4
31
33
/* The maximum image width/height are set to 4K DMT */
···
483
481
/* video capture */
484
482
struct tpg_data tpg;
485
483
unsigned ms_vid_cap;
486
-
bool must_blank[VIDEO_MAX_FRAME];
484
+
bool must_blank[MAX_VID_CAP_BUFFERS];
487
485
488
486
const struct vivid_fmt *fmt_cap;
489
487
struct v4l2_fract timeperframe_vid_cap;
+1
-1
drivers/media/test-drivers/vivid/vivid-ctrls.c
+1
-1
drivers/media/test-drivers/vivid/vivid-ctrls.c
+1
-1
drivers/media/test-drivers/vivid/vivid-vid-cap.c
+1
-1
drivers/media/test-drivers/vivid/vivid-vid-cap.c
···
213
213
214
214
dev->vid_cap_seq_count = 0;
215
215
dprintk(dev, 1, "%s\n", __func__);
216
-
for (i = 0; i < VIDEO_MAX_FRAME; i++)
216
+
for (i = 0; i < MAX_VID_CAP_BUFFERS; i++)
217
217
dev->must_blank[i] = tpg_g_perc_fill(&dev->tpg) < 100;
218
218
if (dev->start_streaming_error) {
219
219
dev->start_streaming_error = false;
+11
-6
drivers/media/v4l2-core/v4l2-ctrls-api.c
+11
-6
drivers/media/v4l2-core/v4l2-ctrls-api.c
···
753
753
for (i = 0; i < master->ncontrols; i++)
754
754
cur_to_new(master->cluster[i]);
755
755
ret = call_op(master, g_volatile_ctrl);
756
-
new_to_user(c, ctrl);
756
+
if (!ret)
757
+
ret = new_to_user(c, ctrl);
757
758
} else {
758
-
cur_to_user(c, ctrl);
759
+
ret = cur_to_user(c, ctrl);
759
760
}
760
761
v4l2_ctrl_unlock(master);
761
762
return ret;
···
771
770
if (!ctrl || !ctrl->is_int)
772
771
return -EINVAL;
773
772
ret = get_ctrl(ctrl, &c);
774
-
control->value = c.value;
773
+
774
+
if (!ret)
775
+
control->value = c.value;
776
+
775
777
return ret;
776
778
}
777
779
EXPORT_SYMBOL(v4l2_g_ctrl);
···
815
811
int ret;
816
812
817
813
v4l2_ctrl_lock(ctrl);
818
-
user_to_new(c, ctrl);
819
-
ret = set_ctrl(fh, ctrl, 0);
814
+
ret = user_to_new(c, ctrl);
820
815
if (!ret)
821
-
cur_to_user(c, ctrl);
816
+
ret = set_ctrl(fh, ctrl, 0);
817
+
if (!ret)
818
+
ret = cur_to_user(c, ctrl);
822
819
v4l2_ctrl_unlock(ctrl);
823
820
return ret;
824
821
}
+24
-14
drivers/mmc/host/sdhci-pci-gli.c
+24
-14
drivers/mmc/host/sdhci-pci-gli.c
···
892
892
gl9767_vhs_read(pdev);
893
893
}
894
894
895
+
static void gl9767_set_low_power_negotiation(struct pci_dev *pdev, bool enable)
896
+
{
897
+
u32 value;
898
+
899
+
gl9767_vhs_write(pdev);
900
+
901
+
pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);
902
+
if (enable)
903
+
value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
904
+
else
905
+
value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;
906
+
pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);
907
+
908
+
gl9767_vhs_read(pdev);
909
+
}
910
+
895
911
static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)
896
912
{
897
913
struct sdhci_pci_slot *slot = sdhci_priv(host);
898
914
struct mmc_ios *ios = &host->mmc->ios;
899
915
struct pci_dev *pdev;
900
-
u32 value;
901
916
u16 clk;
902
917
903
918
pdev = slot->chip->pdev;
904
919
host->mmc->actual_clock = 0;
905
920
906
-
gl9767_vhs_write(pdev);
907
-
908
-
pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);
909
-
value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;
910
-
pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);
911
-
921
+
gl9767_set_low_power_negotiation(pdev, false);
912
922
gl9767_disable_ssc_pll(pdev);
913
923
sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
914
924
915
-
if (clock == 0)
925
+
if (clock == 0) {
926
+
gl9767_set_low_power_negotiation(pdev, true);
916
927
return;
928
+
}
917
929
918
930
clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
919
931
if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
···
934
922
}
935
923
936
924
sdhci_enable_clk(host, clk);
937
-
938
-
pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);
939
-
value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
940
-
pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);
941
-
942
-
gl9767_vhs_read(pdev);
925
+
gl9767_set_low_power_negotiation(pdev, true);
943
926
}
944
927
945
928
static void gli_set_9767(struct sdhci_host *host)
···
1068
1061
sdhci_writew(host, value, SDHCI_CLOCK_CONTROL);
1069
1062
}
1070
1063
1064
+
pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);
1065
+
value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
1066
+
pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);
1071
1067
gl9767_vhs_read(pdev);
1072
1068
1073
1069
return 0;
+6
-1
drivers/net/can/c_can/c_can_main.c
+6
-1
drivers/net/can/c_can/c_can_main.c
···
1011
1011
1012
1012
/* common for all type of bus errors */
1013
1013
priv->can.can_stats.bus_error++;
1014
-
stats->rx_errors++;
1015
1014
1016
1015
/* propagate the error condition to the CAN stack */
1017
1016
skb = alloc_can_err_skb(dev, &cf);
···
1026
1027
case LEC_STUFF_ERROR:
1027
1028
netdev_dbg(dev, "stuff error\n");
1028
1029
cf->data[2] |= CAN_ERR_PROT_STUFF;
1030
+
stats->rx_errors++;
1029
1031
break;
1030
1032
case LEC_FORM_ERROR:
1031
1033
netdev_dbg(dev, "form error\n");
1032
1034
cf->data[2] |= CAN_ERR_PROT_FORM;
1035
+
stats->rx_errors++;
1033
1036
break;
1034
1037
case LEC_ACK_ERROR:
1035
1038
netdev_dbg(dev, "ack error\n");
1036
1039
cf->data[3] = CAN_ERR_PROT_LOC_ACK;
1040
+
stats->tx_errors++;
1037
1041
break;
1038
1042
case LEC_BIT1_ERROR:
1039
1043
netdev_dbg(dev, "bit1 error\n");
1040
1044
cf->data[2] |= CAN_ERR_PROT_BIT1;
1045
+
stats->tx_errors++;
1041
1046
break;
1042
1047
case LEC_BIT0_ERROR:
1043
1048
netdev_dbg(dev, "bit0 error\n");
1044
1049
cf->data[2] |= CAN_ERR_PROT_BIT0;
1050
+
stats->tx_errors++;
1045
1051
break;
1046
1052
case LEC_CRC_ERROR:
1047
1053
netdev_dbg(dev, "CRC error\n");
1048
1054
cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;
1055
+
stats->rx_errors++;
1049
1056
break;
1050
1057
default:
1051
1058
break;
+1
-1
drivers/net/can/cc770/Kconfig
+1
-1
drivers/net/can/cc770/Kconfig
+2
-1
drivers/net/can/m_can/m_can.c
+2
-1
drivers/net/can/m_can/m_can.c
+2
-1
drivers/net/can/rockchip/Kconfig
+2
-1
drivers/net/can/rockchip/Kconfig
+1
-1
drivers/net/can/sja1000/Kconfig
+1
-1
drivers/net/can/sja1000/Kconfig
+5
-3
drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c
+5
-3
drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c
···
2
2
//
3
3
// mcp251xfd - Microchip MCP251xFD Family CAN controller driver
4
4
//
5
-
// Copyright (c) 2019, 2020, 2021 Pengutronix,
5
+
// Copyright (c) 2019, 2020, 2021, 2024 Pengutronix,
6
6
// Marc Kleine-Budde <kernel@pengutronix.de>
7
7
//
8
8
// Based on:
···
483
483
};
484
484
const struct ethtool_coalesce ec = {
485
485
.rx_coalesce_usecs_irq = priv->rx_coalesce_usecs_irq,
486
-
.rx_max_coalesced_frames_irq = priv->rx_obj_num_coalesce_irq,
486
+
.rx_max_coalesced_frames_irq = priv->rx_obj_num_coalesce_irq == 0 ?
487
+
1 : priv->rx_obj_num_coalesce_irq,
487
488
.tx_coalesce_usecs_irq = priv->tx_coalesce_usecs_irq,
488
-
.tx_max_coalesced_frames_irq = priv->tx_obj_num_coalesce_irq,
489
+
.tx_max_coalesced_frames_irq = priv->tx_obj_num_coalesce_irq == 0 ?
490
+
1 : priv->tx_obj_num_coalesce_irq,
489
491
};
490
492
struct can_ram_layout layout;
491
493
+7
-3
drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c
+7
-3
drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c
···
16
16
17
17
#include "mcp251xfd.h"
18
18
19
-
static inline bool mcp251xfd_tx_fifo_sta_full(u32 fifo_sta)
19
+
static inline bool mcp251xfd_tx_fifo_sta_empty(u32 fifo_sta)
20
20
{
21
-
return !(fifo_sta & MCP251XFD_REG_FIFOSTA_TFNRFNIF);
21
+
return fifo_sta & MCP251XFD_REG_FIFOSTA_TFERFFIF;
22
22
}
23
23
24
24
static inline int
···
122
122
if (err)
123
123
return err;
124
124
125
-
if (mcp251xfd_tx_fifo_sta_full(fifo_sta)) {
125
+
/* If the chip says the TX-FIFO is empty, but there are no TX
126
+
* buffers free in the ring, we assume all have been sent.
127
+
*/
128
+
if (mcp251xfd_tx_fifo_sta_empty(fifo_sta) &&
129
+
mcp251xfd_get_tx_free(tx_ring) == 0) {
126
130
*len_p = tx_ring->obj_num;
127
131
return 0;
128
132
}
+16
-11
drivers/net/ethernet/arc/emac_main.c
+16
-11
drivers/net/ethernet/arc/emac_main.c
···
111
111
{
112
112
struct arc_emac_priv *priv = netdev_priv(ndev);
113
113
struct net_device_stats *stats = &ndev->stats;
114
+
struct device *dev = ndev->dev.parent;
114
115
unsigned int i;
115
116
116
117
for (i = 0; i < TX_BD_NUM; i++) {
···
141
140
stats->tx_bytes += skb->len;
142
141
}
143
142
144
-
dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
143
+
dma_unmap_single(dev, dma_unmap_addr(tx_buff, addr),
145
144
dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
146
145
147
146
/* return the sk_buff to system */
···
175
174
static int arc_emac_rx(struct net_device *ndev, int budget)
176
175
{
177
176
struct arc_emac_priv *priv = netdev_priv(ndev);
177
+
struct device *dev = ndev->dev.parent;
178
178
unsigned int work_done;
179
179
180
180
for (work_done = 0; work_done < budget; work_done++) {
···
225
223
continue;
226
224
}
227
225
228
-
addr = dma_map_single(&ndev->dev, (void *)skb->data,
226
+
addr = dma_map_single(dev, (void *)skb->data,
229
227
EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
230
-
if (dma_mapping_error(&ndev->dev, addr)) {
228
+
if (dma_mapping_error(dev, addr)) {
231
229
if (net_ratelimit())
232
230
netdev_err(ndev, "cannot map dma buffer\n");
233
231
dev_kfree_skb(skb);
···
239
237
}
240
238
241
239
/* unmap previosly mapped skb */
242
-
dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
240
+
dma_unmap_single(dev, dma_unmap_addr(rx_buff, addr),
243
241
dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
244
242
245
243
pktlen = info & LEN_MASK;
···
425
423
{
426
424
struct arc_emac_priv *priv = netdev_priv(ndev);
427
425
struct phy_device *phy_dev = ndev->phydev;
426
+
struct device *dev = ndev->dev.parent;
428
427
int i;
429
428
430
429
phy_dev->autoneg = AUTONEG_ENABLE;
···
448
445
if (unlikely(!rx_buff->skb))
449
446
return -ENOMEM;
450
447
451
-
addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
448
+
addr = dma_map_single(dev, (void *)rx_buff->skb->data,
452
449
EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
453
-
if (dma_mapping_error(&ndev->dev, addr)) {
450
+
if (dma_mapping_error(dev, addr)) {
454
451
netdev_err(ndev, "cannot dma map\n");
455
452
dev_kfree_skb(rx_buff->skb);
456
453
return -ENOMEM;
···
551
548
static void arc_free_tx_queue(struct net_device *ndev)
552
549
{
553
550
struct arc_emac_priv *priv = netdev_priv(ndev);
551
+
struct device *dev = ndev->dev.parent;
554
552
unsigned int i;
555
553
556
554
for (i = 0; i < TX_BD_NUM; i++) {
···
559
555
struct buffer_state *tx_buff = &priv->tx_buff[i];
560
556
561
557
if (tx_buff->skb) {
562
-
dma_unmap_single(&ndev->dev,
558
+
dma_unmap_single(dev,
563
559
dma_unmap_addr(tx_buff, addr),
564
560
dma_unmap_len(tx_buff, len),
565
561
DMA_TO_DEVICE);
···
583
579
static void arc_free_rx_queue(struct net_device *ndev)
584
580
{
585
581
struct arc_emac_priv *priv = netdev_priv(ndev);
582
+
struct device *dev = ndev->dev.parent;
586
583
unsigned int i;
587
584
588
585
for (i = 0; i < RX_BD_NUM; i++) {
···
591
586
struct buffer_state *rx_buff = &priv->rx_buff[i];
592
587
593
588
if (rx_buff->skb) {
594
-
dma_unmap_single(&ndev->dev,
589
+
dma_unmap_single(dev,
595
590
dma_unmap_addr(rx_buff, addr),
596
591
dma_unmap_len(rx_buff, len),
597
592
DMA_FROM_DEVICE);
···
684
679
unsigned int len, *txbd_curr = &priv->txbd_curr;
685
680
struct net_device_stats *stats = &ndev->stats;
686
681
__le32 *info = &priv->txbd[*txbd_curr].info;
682
+
struct device *dev = ndev->dev.parent;
687
683
dma_addr_t addr;
688
684
689
685
if (skb_padto(skb, ETH_ZLEN))
···
698
692
return NETDEV_TX_BUSY;
699
693
}
700
694
701
-
addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
702
-
DMA_TO_DEVICE);
695
+
addr = dma_map_single(dev, (void *)skb->data, len, DMA_TO_DEVICE);
703
696
704
-
if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
697
+
if (unlikely(dma_mapping_error(dev, addr))) {
705
698
stats->tx_dropped++;
706
699
stats->tx_errors++;
707
700
dev_kfree_skb_any(skb);
+8
-1
drivers/net/ethernet/arc/emac_mdio.c
+8
-1
drivers/net/ethernet/arc/emac_mdio.c
···
133
133
struct arc_emac_mdio_bus_data *data = &priv->bus_data;
134
134
struct device_node *np = priv->dev->of_node;
135
135
const char *name = "Synopsys MII Bus";
136
+
struct device_node *mdio_node;
136
137
struct mii_bus *bus;
137
138
int error;
138
139
···
165
164
166
165
snprintf(bus->id, MII_BUS_ID_SIZE, "%s", bus->name);
167
166
168
-
error = of_mdiobus_register(bus, priv->dev->of_node);
167
+
/* Backwards compatibility for EMAC nodes without MDIO subnode. */
168
+
mdio_node = of_get_child_by_name(np, "mdio");
169
+
if (!mdio_node)
170
+
mdio_node = of_node_get(np);
171
+
172
+
error = of_mdiobus_register(bus, mdio_node);
173
+
of_node_put(mdio_node);
169
174
if (error) {
170
175
mdiobus_free(bus);
171
176
return dev_err_probe(priv->dev, error,
+1
-1
drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h
+1
-1
drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h
+9
-9
drivers/net/ethernet/freescale/enetc/enetc_pf.c
+9
-9
drivers/net/ethernet/freescale/enetc/enetc_pf.c
···
665
665
666
666
if (!num_vfs) {
667
667
enetc_msg_psi_free(pf);
668
-
kfree(pf->vf_state);
669
668
pf->num_vfs = 0;
670
669
pci_disable_sriov(pdev);
671
670
} else {
672
671
pf->num_vfs = num_vfs;
673
-
674
-
pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state),
675
-
GFP_KERNEL);
676
-
if (!pf->vf_state) {
677
-
pf->num_vfs = 0;
678
-
return -ENOMEM;
679
-
}
680
672
681
673
err = enetc_msg_psi_init(pf);
682
674
if (err) {
···
688
696
err_en_sriov:
689
697
enetc_msg_psi_free(pf);
690
698
err_msg_psi:
691
-
kfree(pf->vf_state);
692
699
pf->num_vfs = 0;
693
700
694
701
return err;
···
1277
1286
pf = enetc_si_priv(si);
1278
1287
pf->si = si;
1279
1288
pf->total_vfs = pci_sriov_get_totalvfs(pdev);
1289
+
if (pf->total_vfs) {
1290
+
pf->vf_state = kcalloc(pf->total_vfs, sizeof(struct enetc_vf_state),
1291
+
GFP_KERNEL);
1292
+
if (!pf->vf_state)
1293
+
goto err_alloc_vf_state;
1294
+
}
1280
1295
1281
1296
err = enetc_setup_mac_addresses(node, pf);
1282
1297
if (err)
···
1360
1363
free_netdev(ndev);
1361
1364
err_alloc_netdev:
1362
1365
err_setup_mac_addresses:
1366
+
kfree(pf->vf_state);
1367
+
err_alloc_vf_state:
1363
1368
enetc_psi_destroy(pdev);
1364
1369
err_psi_create:
1365
1370
return err;
···
1388
1389
enetc_free_si_resources(priv);
1389
1390
1390
1391
free_netdev(si->ndev);
1392
+
kfree(pf->vf_state);
1391
1393
1392
1394
enetc_psi_destroy(pdev);
1393
1395
}
+8
-1
drivers/net/ethernet/freescale/enetc/enetc_vf.c
+8
-1
drivers/net/ethernet/freescale/enetc/enetc_vf.c
···
78
78
{
79
79
struct enetc_ndev_priv *priv = netdev_priv(ndev);
80
80
struct sockaddr *saddr = addr;
81
+
int err;
81
82
82
83
if (!is_valid_ether_addr(saddr->sa_data))
83
84
return -EADDRNOTAVAIL;
84
85
85
-
return enetc_msg_vsi_set_primary_mac_addr(priv, saddr);
86
+
err = enetc_msg_vsi_set_primary_mac_addr(priv, saddr);
87
+
if (err)
88
+
return err;
89
+
90
+
eth_hw_addr_set(ndev, saddr->sa_data);
91
+
92
+
return 0;
86
93
}
87
94
88
95
static int enetc_vf_set_features(struct net_device *ndev,
+4
-1
drivers/net/ethernet/hisilicon/hns3/hnae3.c
+4
-1
drivers/net/ethernet/hisilicon/hns3/hnae3.c
···
25
25
pci_id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev);
26
26
if (!pci_id)
27
27
continue;
28
-
if (IS_ENABLED(CONFIG_PCI_IOV))
28
+
if (IS_ENABLED(CONFIG_PCI_IOV)) {
29
+
device_lock(&ae_dev->pdev->dev);
29
30
pci_disable_sriov(ae_dev->pdev);
31
+
device_unlock(&ae_dev->pdev->dev);
32
+
}
30
33
}
31
34
}
32
35
EXPORT_SYMBOL(hnae3_unregister_ae_algo_prepare);
+1
-3
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+1
-3
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
···
1293
1293
1294
1294
/* save the buffer addr until the last read operation */
1295
1295
*save_buf = read_buf;
1296
-
}
1297
1296
1298
-
/* get data ready for the first time to read */
1299
-
if (!*ppos) {
1297
+
/* get data ready for the first time to read */
1300
1298
ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,
1301
1299
read_buf, hns3_dbg_cmd[index].buf_len);
1302
1300
if (ret)
+1
-58
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+1
-58
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
···
11
11
#include <linux/irq.h>
12
12
#include <linux/ip.h>
13
13
#include <linux/ipv6.h>
14
-
#include <linux/iommu.h>
15
14
#include <linux/module.h>
16
15
#include <linux/pci.h>
17
16
#include <linux/skbuff.h>
···
379
380
380
381
#define HNS3_INVALID_PTYPE \
381
382
ARRAY_SIZE(hns3_rx_ptype_tbl)
382
-
383
-
static void hns3_dma_map_sync(struct device *dev, unsigned long iova)
384
-
{
385
-
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
386
-
struct iommu_iotlb_gather iotlb_gather;
387
-
size_t granule;
388
-
389
-
if (!domain || !iommu_is_dma_domain(domain))
390
-
return;
391
-
392
-
granule = 1 << __ffs(domain->pgsize_bitmap);
393
-
iova = ALIGN_DOWN(iova, granule);
394
-
iotlb_gather.start = iova;
395
-
iotlb_gather.end = iova + granule - 1;
396
-
iotlb_gather.pgsize = granule;
397
-
398
-
iommu_iotlb_sync(domain, &iotlb_gather);
399
-
}
400
383
401
384
static irqreturn_t hns3_irq_handle(int irq, void *vector)
402
385
{
···
1032
1051
static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring)
1033
1052
{
1034
1053
u32 alloc_size = ring->tqp->handle->kinfo.tx_spare_buf_size;
1035
-
struct net_device *netdev = ring_to_netdev(ring);
1036
-
struct hns3_nic_priv *priv = netdev_priv(netdev);
1037
1054
struct hns3_tx_spare *tx_spare;
1038
1055
struct page *page;
1039
1056
dma_addr_t dma;
···
1073
1094
tx_spare->buf = page_address(page);
1074
1095
tx_spare->len = PAGE_SIZE << order;
1075
1096
ring->tx_spare = tx_spare;
1076
-
ring->tx_copybreak = priv->tx_copybreak;
1077
1097
return;
1078
1098
1079
1099
dma_mapping_error:
···
1724
1746
unsigned int type)
1725
1747
{
1726
1748
struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1727
-
struct hnae3_handle *handle = ring->tqp->handle;
1728
1749
struct device *dev = ring_to_dev(ring);
1729
-
struct hnae3_ae_dev *ae_dev;
1730
1750
unsigned int size;
1731
1751
dma_addr_t dma;
1732
1752
···
1755
1779
hns3_ring_stats_update(ring, sw_err_cnt);
1756
1780
return -ENOMEM;
1757
1781
}
1758
-
1759
-
/* Add a SYNC command to sync io-pgtale to avoid errors in pgtable
1760
-
* prefetch
1761
-
*/
1762
-
ae_dev = hns3_get_ae_dev(handle);
1763
-
if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)
1764
-
hns3_dma_map_sync(dev, dma);
1765
1782
1766
1783
desc_cb->priv = priv;
1767
1784
desc_cb->length = size;
···
2452
2483
return ret;
2453
2484
}
2454
2485
2486
+
netdev->features = features;
2455
2487
return 0;
2456
2488
}
2457
2489
···
4868
4898
devm_kfree(&pdev->dev, priv->tqp_vector);
4869
4899
}
4870
4900
4871
-
static void hns3_update_tx_spare_buf_config(struct hns3_nic_priv *priv)
4872
-
{
4873
-
#define HNS3_MIN_SPARE_BUF_SIZE (2 * 1024 * 1024)
4874
-
#define HNS3_MAX_PACKET_SIZE (64 * 1024)
4875
-
4876
-
struct iommu_domain *domain = iommu_get_domain_for_dev(priv->dev);
4877
-
struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv->ae_handle);
4878
-
struct hnae3_handle *handle = priv->ae_handle;
4879
-
4880
-
if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3)
4881
-
return;
4882
-
4883
-
if (!(domain && iommu_is_dma_domain(domain)))
4884
-
return;
4885
-
4886
-
priv->min_tx_copybreak = HNS3_MAX_PACKET_SIZE;
4887
-
priv->min_tx_spare_buf_size = HNS3_MIN_SPARE_BUF_SIZE;
4888
-
4889
-
if (priv->tx_copybreak < priv->min_tx_copybreak)
4890
-
priv->tx_copybreak = priv->min_tx_copybreak;
4891
-
if (handle->kinfo.tx_spare_buf_size < priv->min_tx_spare_buf_size)
4892
-
handle->kinfo.tx_spare_buf_size = priv->min_tx_spare_buf_size;
4893
-
}
4894
-
4895
4901
static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
4896
4902
unsigned int ring_type)
4897
4903
{
···
5101
5155
int i, j;
5102
5156
int ret;
5103
5157
5104
-
hns3_update_tx_spare_buf_config(priv);
5105
5158
for (i = 0; i < ring_num; i++) {
5106
5159
ret = hns3_alloc_ring_memory(&priv->ring[i]);
5107
5160
if (ret) {
···
5305
5360
priv->ae_handle = handle;
5306
5361
priv->tx_timeout_count = 0;
5307
5362
priv->max_non_tso_bd_num = ae_dev->dev_specs.max_non_tso_bd_num;
5308
-
priv->min_tx_copybreak = 0;
5309
-
priv->min_tx_spare_buf_size = 0;
5310
5363
set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
5311
5364
5312
5365
handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
-2
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
-2
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
-33
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
-33
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
···
1933
1933
return ret;
1934
1934
}
1935
1935
1936
-
static int hns3_check_tx_copybreak(struct net_device *netdev, u32 copybreak)
1937
-
{
1938
-
struct hns3_nic_priv *priv = netdev_priv(netdev);
1939
-
1940
-
if (copybreak < priv->min_tx_copybreak) {
1941
-
netdev_err(netdev, "tx copybreak %u should be no less than %u!\n",
1942
-
copybreak, priv->min_tx_copybreak);
1943
-
return -EINVAL;
1944
-
}
1945
-
return 0;
1946
-
}
1947
-
1948
-
static int hns3_check_tx_spare_buf_size(struct net_device *netdev, u32 buf_size)
1949
-
{
1950
-
struct hns3_nic_priv *priv = netdev_priv(netdev);
1951
-
1952
-
if (buf_size < priv->min_tx_spare_buf_size) {
1953
-
netdev_err(netdev,
1954
-
"tx spare buf size %u should be no less than %u!\n",
1955
-
buf_size, priv->min_tx_spare_buf_size);
1956
-
return -EINVAL;
1957
-
}
1958
-
return 0;
1959
-
}
1960
-
1961
1936
static int hns3_set_tunable(struct net_device *netdev,
1962
1937
const struct ethtool_tunable *tuna,
1963
1938
const void *data)
···
1949
1974
1950
1975
switch (tuna->id) {
1951
1976
case ETHTOOL_TX_COPYBREAK:
1952
-
ret = hns3_check_tx_copybreak(netdev, *(u32 *)data);
1953
-
if (ret)
1954
-
return ret;
1955
-
1956
1977
priv->tx_copybreak = *(u32 *)data;
1957
1978
1958
1979
for (i = 0; i < h->kinfo.num_tqps; i++)
···
1963
1992
1964
1993
break;
1965
1994
case ETHTOOL_TX_COPYBREAK_BUF_SIZE:
1966
-
ret = hns3_check_tx_spare_buf_size(netdev, *(u32 *)data);
1967
-
if (ret)
1968
-
return ret;
1969
-
1970
1995
old_tx_spare_buf_size = h->kinfo.tx_spare_buf_size;
1971
1996
new_tx_spare_buf_size = *(u32 *)data;
1972
1997
netdev_info(netdev, "request to set tx spare buf size from %u to %u\n",
+9
-36
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+9
-36
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
···
6
6
#include <linux/etherdevice.h>
7
7
#include <linux/init.h>
8
8
#include <linux/interrupt.h>
9
-
#include <linux/irq.h>
10
9
#include <linux/kernel.h>
11
10
#include <linux/module.h>
12
11
#include <linux/netdevice.h>
···
3584
3585
return ret;
3585
3586
}
3586
3587
3587
-
static void hclge_set_reset_pending(struct hclge_dev *hdev,
3588
-
enum hnae3_reset_type reset_type)
3589
-
{
3590
-
/* When an incorrect reset type is executed, the get_reset_level
3591
-
* function generates the HNAE3_NONE_RESET flag. As a result, this
3592
-
* type do not need to pending.
3593
-
*/
3594
-
if (reset_type != HNAE3_NONE_RESET)
3595
-
set_bit(reset_type, &hdev->reset_pending);
3596
-
}
3597
-
3598
3588
static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)
3599
3589
{
3600
3590
u32 cmdq_src_reg, msix_src_reg, hw_err_src_reg;
···
3604
3616
*/
3605
3617
if (BIT(HCLGE_VECTOR0_IMPRESET_INT_B) & msix_src_reg) {
3606
3618
dev_info(&hdev->pdev->dev, "IMP reset interrupt\n");
3607
-
hclge_set_reset_pending(hdev, HNAE3_IMP_RESET);
3619
+
set_bit(HNAE3_IMP_RESET, &hdev->reset_pending);
3608
3620
set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);
3609
3621
*clearval = BIT(HCLGE_VECTOR0_IMPRESET_INT_B);
3610
3622
hdev->rst_stats.imp_rst_cnt++;
···
3614
3626
if (BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) & msix_src_reg) {
3615
3627
dev_info(&hdev->pdev->dev, "global reset interrupt\n");
3616
3628
set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);
3617
-
hclge_set_reset_pending(hdev, HNAE3_GLOBAL_RESET);
3629
+
set_bit(HNAE3_GLOBAL_RESET, &hdev->reset_pending);
3618
3630
*clearval = BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B);
3619
3631
hdev->rst_stats.global_rst_cnt++;
3620
3632
return HCLGE_VECTOR0_EVENT_RST;
···
3769
3781
snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s",
3770
3782
HCLGE_NAME, pci_name(hdev->pdev));
3771
3783
ret = request_irq(hdev->misc_vector.vector_irq, hclge_misc_irq_handle,
3772
-
IRQ_NOAUTOEN, hdev->misc_vector.name, hdev);
3784
+
0, hdev->misc_vector.name, hdev);
3773
3785
if (ret) {
3774
3786
hclge_free_vector(hdev, 0);
3775
3787
dev_err(&hdev->pdev->dev, "request misc irq(%d) fail\n",
···
4062
4074
case HNAE3_FUNC_RESET:
4063
4075
dev_info(&pdev->dev, "PF reset requested\n");
4064
4076
/* schedule again to check later */
4065
-
hclge_set_reset_pending(hdev, HNAE3_FUNC_RESET);
4077
+
set_bit(HNAE3_FUNC_RESET, &hdev->reset_pending);
4066
4078
hclge_reset_task_schedule(hdev);
4067
4079
break;
4068
4080
default:
···
4095
4107
rst_level = HNAE3_FLR_RESET;
4096
4108
clear_bit(HNAE3_FLR_RESET, addr);
4097
4109
}
4098
-
4099
-
clear_bit(HNAE3_NONE_RESET, addr);
4100
4110
4101
4111
if (hdev->reset_type != HNAE3_NONE_RESET &&
4102
4112
rst_level < hdev->reset_type)
···
4237
4251
return false;
4238
4252
} else if (hdev->rst_stats.reset_fail_cnt < MAX_RESET_FAIL_CNT) {
4239
4253
hdev->rst_stats.reset_fail_cnt++;
4240
-
hclge_set_reset_pending(hdev, hdev->reset_type);
4254
+
set_bit(hdev->reset_type, &hdev->reset_pending);
4241
4255
dev_info(&hdev->pdev->dev,
4242
4256
"re-schedule reset task(%u)\n",
4243
4257
hdev->rst_stats.reset_fail_cnt);
···
4480
4494
static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev,
4481
4495
enum hnae3_reset_type rst_type)
4482
4496
{
4483
-
#define HCLGE_SUPPORT_RESET_TYPE \
4484
-
(BIT(HNAE3_FLR_RESET) | BIT(HNAE3_FUNC_RESET) | \
4485
-
BIT(HNAE3_GLOBAL_RESET) | BIT(HNAE3_IMP_RESET))
4486
-
4487
4497
struct hclge_dev *hdev = ae_dev->priv;
4488
-
4489
-
if (!(BIT(rst_type) & HCLGE_SUPPORT_RESET_TYPE)) {
4490
-
/* To prevent reset triggered by hclge_reset_event */
4491
-
set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request);
4492
-
dev_warn(&hdev->pdev->dev, "unsupported reset type %d\n",
4493
-
rst_type);
4494
-
return;
4495
-
}
4496
4498
4497
4499
set_bit(rst_type, &hdev->default_reset_request);
4498
4500
}
···
11891
11917
11892
11918
hclge_init_rxd_adv_layout(hdev);
11893
11919
11920
+
/* Enable MISC vector(vector0) */
11921
+
hclge_enable_vector(&hdev->misc_vector, true);
11922
+
11894
11923
ret = hclge_init_wol(hdev);
11895
11924
if (ret)
11896
11925
dev_warn(&pdev->dev,
···
11905
11928
11906
11929
hclge_state_init(hdev);
11907
11930
hdev->last_reset_time = jiffies;
11908
-
11909
-
/* Enable MISC vector(vector0) */
11910
-
enable_irq(hdev->misc_vector.vector_irq);
11911
-
hclge_enable_vector(&hdev->misc_vector, true);
11912
11931
11913
11932
dev_info(&hdev->pdev->dev, "%s driver initialization finished.\n",
11914
11933
HCLGE_DRIVER_NAME);
···
12311
12338
12312
12339
/* Disable MISC vector(vector0) */
12313
12340
hclge_enable_vector(&hdev->misc_vector, false);
12314
-
disable_irq(hdev->misc_vector.vector_irq);
12341
+
synchronize_irq(hdev->misc_vector.vector_irq);
12315
12342
12316
12343
/* Disable all hw interrupts */
12317
12344
hclge_config_mac_tnl_int(hdev, false);
-3
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
-3
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
+4
-5
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c
+4
-5
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c
···
510
510
static int hclge_fetch_pf_reg(struct hclge_dev *hdev, void *data,
511
511
struct hnae3_knic_private_info *kinfo)
512
512
{
513
+
#define HCLGE_RING_REG_OFFSET 0x200
513
514
#define HCLGE_RING_INT_REG_OFFSET 0x4
514
515
515
-
struct hnae3_queue *tqp;
516
516
int i, j, reg_num;
517
517
int data_num_sum;
518
518
u32 *reg = data;
···
533
533
reg_num = ARRAY_SIZE(ring_reg_addr_list);
534
534
for (j = 0; j < kinfo->num_tqps; j++) {
535
535
reg += hclge_reg_get_tlv(HCLGE_REG_TAG_RING, reg_num, reg);
536
-
tqp = kinfo->tqp[j];
537
536
for (i = 0; i < reg_num; i++)
538
-
*reg++ = readl_relaxed(tqp->io_base -
539
-
HCLGE_TQP_REG_OFFSET +
540
-
ring_reg_addr_list[i]);
537
+
*reg++ = hclge_read_dev(&hdev->hw,
538
+
ring_reg_addr_list[i] +
539
+
HCLGE_RING_REG_OFFSET * j);
541
540
}
542
541
data_num_sum += (reg_num + HCLGE_REG_TLV_SPACE) * kinfo->num_tqps;
543
542
+7
-33
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+7
-33
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
···
1395
1395
return ret;
1396
1396
}
1397
1397
1398
-
static void hclgevf_set_reset_pending(struct hclgevf_dev *hdev,
1399
-
enum hnae3_reset_type reset_type)
1400
-
{
1401
-
/* When an incorrect reset type is executed, the get_reset_level
1402
-
* function generates the HNAE3_NONE_RESET flag. As a result, this
1403
-
* type do not need to pending.
1404
-
*/
1405
-
if (reset_type != HNAE3_NONE_RESET)
1406
-
set_bit(reset_type, &hdev->reset_pending);
1407
-
}
1408
-
1409
1398
static int hclgevf_reset_wait(struct hclgevf_dev *hdev)
1410
1399
{
1411
1400
#define HCLGEVF_RESET_WAIT_US 20000
···
1544
1555
hdev->rst_stats.rst_fail_cnt);
1545
1556
1546
1557
if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT)
1547
-
hclgevf_set_reset_pending(hdev, hdev->reset_type);
1558
+
set_bit(hdev->reset_type, &hdev->reset_pending);
1548
1559
1549
1560
if (hclgevf_is_reset_pending(hdev)) {
1550
1561
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
···
1664
1675
clear_bit(HNAE3_FLR_RESET, addr);
1665
1676
}
1666
1677
1667
-
clear_bit(HNAE3_NONE_RESET, addr);
1668
-
1669
1678
return rst_level;
1670
1679
}
1671
1680
···
1673
1686
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1674
1687
struct hclgevf_dev *hdev = ae_dev->priv;
1675
1688
1689
+
dev_info(&hdev->pdev->dev, "received reset request from VF enet\n");
1690
+
1676
1691
if (hdev->default_reset_request)
1677
1692
hdev->reset_level =
1678
1693
hclgevf_get_reset_level(&hdev->default_reset_request);
1679
1694
else
1680
1695
hdev->reset_level = HNAE3_VF_FUNC_RESET;
1681
-
1682
-
dev_info(&hdev->pdev->dev, "received reset request from VF enet, reset level is %d\n",
1683
-
hdev->reset_level);
1684
1696
1685
1697
/* reset of this VF requested */
1686
1698
set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state);
···
1691
1705
static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev,
1692
1706
enum hnae3_reset_type rst_type)
1693
1707
{
1694
-
#define HCLGEVF_SUPPORT_RESET_TYPE \
1695
-
(BIT(HNAE3_VF_RESET) | BIT(HNAE3_VF_FUNC_RESET) | \
1696
-
BIT(HNAE3_VF_PF_FUNC_RESET) | BIT(HNAE3_VF_FULL_RESET) | \
1697
-
BIT(HNAE3_FLR_RESET) | BIT(HNAE3_VF_EXP_RESET))
1698
-
1699
1708
struct hclgevf_dev *hdev = ae_dev->priv;
1700
1709
1701
-
if (!(BIT(rst_type) & HCLGEVF_SUPPORT_RESET_TYPE)) {
1702
-
/* To prevent reset triggered by hclge_reset_event */
1703
-
set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request);
1704
-
dev_info(&hdev->pdev->dev, "unsupported reset type %d\n",
1705
-
rst_type);
1706
-
return;
1707
-
}
1708
1710
set_bit(rst_type, &hdev->default_reset_request);
1709
1711
}
1710
1712
···
1849
1875
*/
1850
1876
if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) {
1851
1877
/* prepare for full reset of stack + pcie interface */
1852
-
hclgevf_set_reset_pending(hdev, HNAE3_VF_FULL_RESET);
1878
+
set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending);
1853
1879
1854
1880
/* "defer" schedule the reset task again */
1855
1881
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
1856
1882
} else {
1857
1883
hdev->reset_attempts++;
1858
1884
1859
-
hclgevf_set_reset_pending(hdev, hdev->reset_level);
1885
+
set_bit(hdev->reset_level, &hdev->reset_pending);
1860
1886
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
1861
1887
}
1862
1888
hclgevf_reset_task_schedule(hdev);
···
1979
2005
rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING);
1980
2006
dev_info(&hdev->pdev->dev,
1981
2007
"receive reset interrupt 0x%x!\n", rst_ing_reg);
1982
-
hclgevf_set_reset_pending(hdev, HNAE3_VF_RESET);
2008
+
set_bit(HNAE3_VF_RESET, &hdev->reset_pending);
1983
2009
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
1984
2010
set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);
1985
2011
*clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B);
···
2289
2315
clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state);
2290
2316
2291
2317
INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task);
2292
-
timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0);
2293
2318
2294
2319
mutex_init(&hdev->mbx_resp.mbx_mutex);
2295
2320
sema_init(&hdev->reset_sem, 1);
···
2988
3015
HCLGEVF_DRIVER_NAME);
2989
3016
2990
3017
hclgevf_task_schedule(hdev, round_jiffies_relative(HZ));
3018
+
timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0);
2991
3019
2992
3020
return 0;
2993
3021
+4
-5
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
+4
-5
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
···
123
123
void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version,
124
124
void *data)
125
125
{
126
+
#define HCLGEVF_RING_REG_OFFSET 0x200
126
127
#define HCLGEVF_RING_INT_REG_OFFSET 0x4
127
128
128
129
struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
129
-
struct hnae3_queue *tqp;
130
130
int i, j, reg_um;
131
131
u32 *reg = data;
132
132
···
147
147
reg_um = ARRAY_SIZE(ring_reg_addr_list);
148
148
for (j = 0; j < hdev->num_tqps; j++) {
149
149
reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg);
150
-
tqp = &hdev->htqp[j].q;
151
150
for (i = 0; i < reg_um; i++)
152
-
*reg++ = readl_relaxed(tqp->io_base -
153
-
HCLGEVF_TQP_REG_OFFSET +
154
-
ring_reg_addr_list[i]);
151
+
*reg++ = hclgevf_read_dev(&hdev->hw,
152
+
ring_reg_addr_list[i] +
153
+
HCLGEVF_RING_REG_OFFSET * j);
155
154
}
156
155
157
156
reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list);
+4
-13
drivers/net/ethernet/intel/e1000e/ich8lan.c
+4
-13
drivers/net/ethernet/intel/e1000e/ich8lan.c
···
1205
1205
if (ret_val)
1206
1206
goto out;
1207
1207
1208
-
if (hw->mac.type != e1000_pch_mtp) {
1209
-
ret_val = e1000e_force_smbus(hw);
1210
-
if (ret_val) {
1211
-
e_dbg("Failed to force SMBUS: %d\n", ret_val);
1212
-
goto release;
1213
-
}
1208
+
ret_val = e1000e_force_smbus(hw);
1209
+
if (ret_val) {
1210
+
e_dbg("Failed to force SMBUS: %d\n", ret_val);
1211
+
goto release;
1214
1212
}
1215
1213
1216
1214
/* Si workaround for ULP entry flow on i127/rev6 h/w. Enable
···
1271
1273
}
1272
1274
1273
1275
release:
1274
-
if (hw->mac.type == e1000_pch_mtp) {
1275
-
ret_val = e1000e_force_smbus(hw);
1276
-
if (ret_val)
1277
-
e_dbg("Failed to force SMBUS over MTL system: %d\n",
1278
-
ret_val);
1279
-
}
1280
-
1281
1276
hw->phy.ops.release(hw);
1282
1277
out:
1283
1278
if (ret_val)
+1
drivers/net/ethernet/intel/i40e/i40e.h
+1
drivers/net/ethernet/intel/i40e/i40e.h
···
755
755
I40E_FILTER_ACTIVE, /* Added to switch by FW */
756
756
I40E_FILTER_FAILED, /* Rejected by FW */
757
757
I40E_FILTER_REMOVE, /* To be removed */
758
+
I40E_FILTER_NEW_SYNC, /* New, not sent yet, is in i40e_sync_vsi_filters() */
758
759
/* There is no 'removed' state; the filter struct is freed */
759
760
};
760
761
struct i40e_mac_filter {
+1
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+1
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+10
-2
drivers/net/ethernet/intel/i40e/i40e_main.c
+10
-2
drivers/net/ethernet/intel/i40e/i40e_main.c
···
1255
1255
1256
1256
hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1257
1257
if (f->state == I40E_FILTER_NEW ||
1258
+
f->state == I40E_FILTER_NEW_SYNC ||
1258
1259
f->state == I40E_FILTER_ACTIVE)
1259
1260
++cnt;
1260
1261
}
···
1442
1441
1443
1442
new->f = add_head;
1444
1443
new->state = add_head->state;
1444
+
if (add_head->state == I40E_FILTER_NEW)
1445
+
add_head->state = I40E_FILTER_NEW_SYNC;
1445
1446
1446
1447
/* Add the new filter to the tmp list */
1447
1448
hlist_add_head(&new->hlist, tmp_add_list);
···
1553
1550
return -ENOMEM;
1554
1551
new_mac->f = add_head;
1555
1552
new_mac->state = add_head->state;
1553
+
if (add_head->state == I40E_FILTER_NEW)
1554
+
add_head->state = I40E_FILTER_NEW_SYNC;
1556
1555
1557
1556
/* Add the new filter to the tmp list */
1558
1557
hlist_add_head(&new_mac->hlist, tmp_add_list);
···
2442
2437
i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2443
2438
struct i40e_mac_filter *f)
2444
2439
{
2445
-
bool enable = f->state == I40E_FILTER_NEW;
2440
+
bool enable = f->state == I40E_FILTER_NEW ||
2441
+
f->state == I40E_FILTER_NEW_SYNC;
2446
2442
struct i40e_hw *hw = &vsi->back->hw;
2447
2443
int aq_ret;
2448
2444
···
2617
2611
2618
2612
/* Add it to the hash list */
2619
2613
hlist_add_head(&new->hlist, &tmp_add_list);
2614
+
f->state = I40E_FILTER_NEW_SYNC;
2620
2615
}
2621
2616
2622
2617
/* Count the number of active (current and new) VLAN
···
2769
2762
spin_lock_bh(&vsi->mac_filter_hash_lock);
2770
2763
hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2771
2764
/* Only update the state if we're still NEW */
2772
-
if (new->f->state == I40E_FILTER_NEW)
2765
+
if (new->f->state == I40E_FILTER_NEW ||
2766
+
new->f->state == I40E_FILTER_NEW_SYNC)
2773
2767
new->f->state = new->state;
2774
2768
hlist_del(&new->hlist);
2775
2769
netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
+2
-1
drivers/net/ethernet/intel/ice/ice_eswitch.c
+2
-1
drivers/net/ethernet/intel/ice/ice_eswitch.c
···
552
552
static void ice_eswitch_detach(struct ice_pf *pf, struct ice_repr *repr)
553
553
{
554
554
ice_eswitch_stop_reprs(pf);
555
+
repr->ops.rem(repr);
556
+
555
557
xa_erase(&pf->eswitch.reprs, repr->id);
556
558
557
559
if (xa_empty(&pf->eswitch.reprs))
558
560
ice_eswitch_disable_switchdev(pf);
559
561
560
562
ice_eswitch_release_repr(pf, repr);
561
-
repr->ops.rem(repr);
562
563
ice_repr_destroy(repr);
563
564
564
565
if (xa_empty(&pf->eswitch.reprs)) {
+2
-1
drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c
+2
-1
drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c
···
1830
1830
ice_set_fdir_input_set(struct ice_vsi *vsi, struct ethtool_rx_flow_spec *fsp,
1831
1831
struct ice_fdir_fltr *input)
1832
1832
{
1833
-
u16 dest_vsi, q_index = 0;
1833
+
s16 q_index = ICE_FDIR_NO_QUEUE_IDX;
1834
1834
u16 orig_q_index = 0;
1835
1835
struct ice_pf *pf;
1836
1836
struct ice_hw *hw;
1837
1837
int flow_type;
1838
+
u16 dest_vsi;
1838
1839
u8 dest_ctl;
1839
1840
1840
1841
if (!vsi || !fsp || !input)
+3
-1
drivers/net/ethernet/intel/ice/ice_fdir.h
+3
-1
drivers/net/ethernet/intel/ice/ice_fdir.h
···
53
53
*/
54
54
#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x20
55
55
56
+
#define ICE_FDIR_NO_QUEUE_IDX -1
57
+
56
58
enum ice_fltr_prgm_desc_dest {
57
59
ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
58
60
ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
···
188
186
u16 flex_fltr;
189
187
190
188
/* filter control */
191
-
u16 q_index;
189
+
s16 q_index;
192
190
u16 orig_q_index;
193
191
u16 dest_vsi;
194
192
u8 dest_ctl;
+2
-2
drivers/net/ethernet/intel/idpf/idpf.h
+2
-2
drivers/net/ethernet/intel/idpf/idpf.h
···
141
141
* @adapter: Adapter back pointer
142
142
* @vport: Vport back pointer
143
143
* @vport_id: Vport identifier
144
+
* @link_speed_mbps: Link speed in mbps
144
145
* @vport_idx: Relative vport index
145
146
* @state: See enum idpf_vport_state
146
147
* @netstats: Packet and byte stats
···
151
150
struct idpf_adapter *adapter;
152
151
struct idpf_vport *vport;
153
152
u32 vport_id;
153
+
u32 link_speed_mbps;
154
154
u16 vport_idx;
155
155
enum idpf_vport_state state;
156
156
struct rtnl_link_stats64 netstats;
···
289
287
* @tx_itr_profile: TX profiles for Dynamic Interrupt Moderation
290
288
* @port_stats: per port csum, header split, and other offload stats
291
289
* @link_up: True if link is up
292
-
* @link_speed_mbps: Link speed in mbps
293
290
* @sw_marker_wq: workqueue for marker packets
294
291
*/
295
292
struct idpf_vport {
···
332
331
struct idpf_port_stats port_stats;
333
332
334
333
bool link_up;
335
-
u32 link_speed_mbps;
336
334
337
335
wait_queue_head_t sw_marker_wq;
338
336
};
+3
-8
drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+3
-8
drivers/net/ethernet/intel/idpf/idpf_ethtool.c
···
1296
1296
static int idpf_get_link_ksettings(struct net_device *netdev,
1297
1297
struct ethtool_link_ksettings *cmd)
1298
1298
{
1299
-
struct idpf_vport *vport;
1300
-
1301
-
idpf_vport_ctrl_lock(netdev);
1302
-
vport = idpf_netdev_to_vport(netdev);
1299
+
struct idpf_netdev_priv *np = netdev_priv(netdev);
1303
1300
1304
1301
ethtool_link_ksettings_zero_link_mode(cmd, supported);
1305
1302
cmd->base.autoneg = AUTONEG_DISABLE;
1306
1303
cmd->base.port = PORT_NONE;
1307
-
if (vport->link_up) {
1304
+
if (netif_carrier_ok(netdev)) {
1308
1305
cmd->base.duplex = DUPLEX_FULL;
1309
-
cmd->base.speed = vport->link_speed_mbps;
1306
+
cmd->base.speed = np->link_speed_mbps;
1310
1307
} else {
1311
1308
cmd->base.duplex = DUPLEX_UNKNOWN;
1312
1309
cmd->base.speed = SPEED_UNKNOWN;
1313
1310
}
1314
-
1315
-
idpf_vport_ctrl_unlock(netdev);
1316
1311
1317
1312
return 0;
1318
1313
}
+3
-2
drivers/net/ethernet/intel/idpf/idpf_lib.c
+3
-2
drivers/net/ethernet/intel/idpf/idpf_lib.c
···
1786
1786
*/
1787
1787
err = idpf_vc_core_init(adapter);
1788
1788
if (err) {
1789
+
cancel_delayed_work_sync(&adapter->mbx_task);
1789
1790
idpf_deinit_dflt_mbx(adapter);
1790
1791
goto unlock_mutex;
1791
1792
}
···
1861
1860
* mess with. Nothing below should use those variables from new_vport
1862
1861
* and should instead always refer to them in vport if they need to.
1863
1862
*/
1864
-
memcpy(new_vport, vport, offsetof(struct idpf_vport, link_speed_mbps));
1863
+
memcpy(new_vport, vport, offsetof(struct idpf_vport, link_up));
1865
1864
1866
1865
/* Adjust resource parameters prior to reallocating resources */
1867
1866
switch (reset_cause) {
···
1907
1906
/* Same comment as above regarding avoiding copying the wait_queues and
1908
1907
* mutexes applies here. We do not want to mess with those if possible.
1909
1908
*/
1910
-
memcpy(vport, new_vport, offsetof(struct idpf_vport, link_speed_mbps));
1909
+
memcpy(vport, new_vport, offsetof(struct idpf_vport, link_up));
1911
1910
1912
1911
if (reset_cause == IDPF_SR_Q_CHANGE)
1913
1912
idpf_vport_alloc_vec_indexes(vport);
+1
-2
drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
+1
-2
drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
···
141
141
}
142
142
np = netdev_priv(vport->netdev);
143
143
144
-
vport->link_speed_mbps = le32_to_cpu(v2e->link_speed);
144
+
np->link_speed_mbps = le32_to_cpu(v2e->link_speed);
145
145
146
146
if (vport->link_up == v2e->link_status)
147
147
return;
···
3063
3063
adapter->state = __IDPF_VER_CHECK;
3064
3064
if (adapter->vcxn_mngr)
3065
3065
idpf_vc_xn_shutdown(adapter->vcxn_mngr);
3066
-
idpf_deinit_dflt_mbx(adapter);
3067
3066
set_bit(IDPF_HR_DRV_LOAD, adapter->flags);
3068
3067
queue_delayed_work(adapter->vc_event_wq, &adapter->vc_event_task,
3069
3068
msecs_to_jiffies(task_delay));
+1
drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c
+1
drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c
+1
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+1
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
···
3780
3780
/* Request the Wake IRQ in case of another line
3781
3781
* is used for WoL
3782
3782
*/
3783
+
priv->wol_irq_disabled = true;
3783
3784
if (priv->wol_irq > 0 && priv->wol_irq != dev->irq) {
3784
3785
ret = request_irq(priv->wol_irq, stmmac_interrupt,
3785
3786
IRQF_SHARED, dev->name, dev);
+32
-43
drivers/net/ethernet/ti/am65-cpsw-nuss.c
+32
-43
drivers/net/ethernet/ti/am65-cpsw-nuss.c
···
337
337
struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
338
338
struct cppi5_host_desc_t *desc_rx;
339
339
struct device *dev = common->dev;
340
+
struct am65_cpsw_swdata *swdata;
340
341
dma_addr_t desc_dma;
341
342
dma_addr_t buf_dma;
342
-
void *swdata;
343
343
344
344
desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool);
345
345
if (!desc_rx) {
···
363
363
cppi5_hdesc_attach_buf(desc_rx, buf_dma, AM65_CPSW_MAX_PACKET_SIZE,
364
364
buf_dma, AM65_CPSW_MAX_PACKET_SIZE);
365
365
swdata = cppi5_hdesc_get_swdata(desc_rx);
366
-
*((void **)swdata) = page_address(page);
366
+
swdata->page = page;
367
+
swdata->flow_id = flow_idx;
367
368
368
369
return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, flow_idx,
369
370
desc_rx, desc_dma);
···
520
519
521
520
static inline void am65_cpsw_put_page(struct am65_cpsw_rx_flow *flow,
522
521
struct page *page,
523
-
bool allow_direct,
524
-
int desc_idx)
522
+
bool allow_direct)
525
523
{
526
524
page_pool_put_full_page(flow->page_pool, page, allow_direct);
527
-
flow->pages[desc_idx] = NULL;
528
525
}
529
526
530
527
static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
531
528
{
532
-
struct am65_cpsw_rx_flow *flow = data;
529
+
struct am65_cpsw_rx_chn *rx_chn = data;
533
530
struct cppi5_host_desc_t *desc_rx;
534
-
struct am65_cpsw_rx_chn *rx_chn;
531
+
struct am65_cpsw_swdata *swdata;
535
532
dma_addr_t buf_dma;
533
+
struct page *page;
536
534
u32 buf_dma_len;
537
-
void *page_addr;
538
-
void **swdata;
539
-
int desc_idx;
535
+
u32 flow_id;
540
536
541
-
rx_chn = &flow->common->rx_chns;
542
537
desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
543
538
swdata = cppi5_hdesc_get_swdata(desc_rx);
544
-
page_addr = *swdata;
539
+
page = swdata->page;
540
+
flow_id = swdata->flow_id;
545
541
cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
546
542
k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
547
543
dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
548
544
k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
549
545
550
-
desc_idx = am65_cpsw_nuss_desc_idx(rx_chn->desc_pool, desc_rx,
551
-
rx_chn->dsize_log2);
552
-
am65_cpsw_put_page(flow, virt_to_page(page_addr), false, desc_idx);
546
+
am65_cpsw_put_page(&rx_chn->flows[flow_id], page, false);
553
547
}
554
548
555
549
static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,
···
699
703
ret = -ENOMEM;
700
704
goto fail_rx;
701
705
}
702
-
flow->pages[i] = page;
703
706
704
707
ret = am65_cpsw_nuss_rx_push(common, page, flow_idx);
705
708
if (ret < 0) {
706
709
dev_err(common->dev,
707
710
"cannot submit page to rx channel flow %d, error %d\n",
708
711
flow_idx, ret);
709
-
am65_cpsw_put_page(flow, page, false, i);
712
+
am65_cpsw_put_page(flow, page, false);
710
713
goto fail_rx;
711
714
}
712
715
}
···
759
764
760
765
fail_rx:
761
766
for (i = 0; i < common->rx_ch_num_flows; i++)
762
-
k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, &rx_chn->flows[i],
763
-
am65_cpsw_nuss_rx_cleanup, 0);
767
+
k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, rx_chn,
768
+
am65_cpsw_nuss_rx_cleanup, !!i);
764
769
765
770
am65_cpsw_destroy_xdp_rxqs(common);
766
771
···
812
817
dev_err(common->dev, "rx teardown timeout\n");
813
818
}
814
819
815
-
for (i = 0; i < common->rx_ch_num_flows; i++) {
820
+
for (i = common->rx_ch_num_flows - 1; i >= 0; i--) {
816
821
napi_disable(&rx_chn->flows[i].napi_rx);
817
822
hrtimer_cancel(&rx_chn->flows[i].rx_hrtimer);
818
-
k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, &rx_chn->flows[i],
819
-
am65_cpsw_nuss_rx_cleanup, 0);
823
+
k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, rx_chn,
824
+
am65_cpsw_nuss_rx_cleanup, !!i);
820
825
}
821
826
822
827
k3_udma_glue_disable_rx_chn(rx_chn->rx_chn);
···
1023
1028
static int am65_cpsw_run_xdp(struct am65_cpsw_rx_flow *flow,
1024
1029
struct am65_cpsw_port *port,
1025
1030
struct xdp_buff *xdp,
1026
-
int desc_idx, int cpu, int *len)
1031
+
int cpu, int *len)
1027
1032
{
1028
1033
struct am65_cpsw_common *common = flow->common;
1029
1034
struct am65_cpsw_ndev_priv *ndev_priv;
···
1096
1101
}
1097
1102
1098
1103
page = virt_to_head_page(xdp->data);
1099
-
am65_cpsw_put_page(flow, page, true, desc_idx);
1104
+
am65_cpsw_put_page(flow, page, true);
1100
1105
1101
1106
out:
1102
1107
return ret;
···
1145
1150
struct am65_cpsw_ndev_stats *stats;
1146
1151
struct cppi5_host_desc_t *desc_rx;
1147
1152
struct device *dev = common->dev;
1153
+
struct am65_cpsw_swdata *swdata;
1148
1154
struct page *page, *new_page;
1149
1155
dma_addr_t desc_dma, buf_dma;
1150
1156
struct am65_cpsw_port *port;
1151
-
int headroom, desc_idx, ret;
1152
1157
struct net_device *ndev;
1153
1158
u32 flow_idx = flow->id;
1154
1159
struct sk_buff *skb;
1155
1160
struct xdp_buff xdp;
1161
+
int headroom, ret;
1156
1162
void *page_addr;
1157
-
void **swdata;
1158
1163
u32 *psdata;
1159
1164
1160
1165
*xdp_state = AM65_CPSW_XDP_PASS;
···
1177
1182
__func__, flow_idx, &desc_dma);
1178
1183
1179
1184
swdata = cppi5_hdesc_get_swdata(desc_rx);
1180
-
page_addr = *swdata;
1181
-
page = virt_to_page(page_addr);
1185
+
page = swdata->page;
1186
+
page_addr = page_address(page);
1182
1187
cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
1183
1188
k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
1184
1189
pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
···
1194
1199
1195
1200
k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
1196
1201
1197
-
desc_idx = am65_cpsw_nuss_desc_idx(rx_chn->desc_pool, desc_rx,
1198
-
rx_chn->dsize_log2);
1199
-
1200
1202
skb = am65_cpsw_build_skb(page_addr, ndev,
1201
1203
AM65_CPSW_MAX_PACKET_SIZE);
1202
1204
if (unlikely(!skb)) {
···
1205
1213
xdp_init_buff(&xdp, PAGE_SIZE, &port->xdp_rxq[flow->id]);
1206
1214
xdp_prepare_buff(&xdp, page_addr, AM65_CPSW_HEADROOM,
1207
1215
pkt_len, false);
1208
-
*xdp_state = am65_cpsw_run_xdp(flow, port, &xdp, desc_idx,
1216
+
*xdp_state = am65_cpsw_run_xdp(flow, port, &xdp,
1209
1217
cpu, &pkt_len);
1210
1218
if (*xdp_state != AM65_CPSW_XDP_PASS)
1211
1219
goto allocate;
···
1239
1247
return -ENOMEM;
1240
1248
}
1241
1249
1242
-
flow->pages[desc_idx] = new_page;
1243
-
1244
1250
if (netif_dormant(ndev)) {
1245
-
am65_cpsw_put_page(flow, new_page, true, desc_idx);
1251
+
am65_cpsw_put_page(flow, new_page, true);
1246
1252
ndev->stats.rx_dropped++;
1247
1253
return 0;
1248
1254
}
···
1248
1258
requeue:
1249
1259
ret = am65_cpsw_nuss_rx_push(common, new_page, flow_idx);
1250
1260
if (WARN_ON(ret < 0)) {
1251
-
am65_cpsw_put_page(flow, new_page, true, desc_idx);
1261
+
am65_cpsw_put_page(flow, new_page, true);
1252
1262
ndev->stats.rx_errors++;
1253
1263
ndev->stats.rx_dropped++;
1254
1264
}
···
2392
2402
for (i = 0; i < common->rx_ch_num_flows; i++) {
2393
2403
flow = &rx_chn->flows[i];
2394
2404
flow->page_pool = NULL;
2395
-
flow->pages = devm_kcalloc(dev, AM65_CPSW_MAX_RX_DESC,
2396
-
sizeof(*flow->pages), GFP_KERNEL);
2397
-
if (!flow->pages)
2398
-
return -ENOMEM;
2399
2405
}
2400
2406
2401
2407
rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg);
···
2441
2455
flow = &rx_chn->flows[i];
2442
2456
flow->id = i;
2443
2457
flow->common = common;
2458
+
flow->irq = -EINVAL;
2444
2459
2445
2460
rx_flow_cfg.ring_rxfdq0_id = fdqring_id;
2446
2461
rx_flow_cfg.rx_cfg.size = max_desc_num;
2447
-
rx_flow_cfg.rxfdq_cfg.size = max_desc_num;
2462
+
/* share same FDQ for all flows */
2463
+
rx_flow_cfg.rxfdq_cfg.size = max_desc_num * rx_cfg.flow_id_num;
2448
2464
rx_flow_cfg.rxfdq_cfg.mode = common->pdata.fdqring_mode;
2449
2465
2450
2466
ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn,
···
2484
2496
if (ret) {
2485
2497
dev_err(dev, "failure requesting rx %d irq %u, %d\n",
2486
2498
i, flow->irq, ret);
2499
+
flow->irq = -EINVAL;
2487
2500
goto err;
2488
2501
}
2489
2502
}
···
3338
3349
3339
3350
for (i = 0; i < common->rx_ch_num_flows; i++)
3340
3351
k3_udma_glue_reset_rx_chn(rx_chan->rx_chn, i,
3341
-
&rx_chan->flows[i],
3342
-
am65_cpsw_nuss_rx_cleanup, 0);
3352
+
rx_chan,
3353
+
am65_cpsw_nuss_rx_cleanup, !!i);
3343
3354
3344
3355
k3_udma_glue_disable_rx_chn(rx_chan->rx_chn);
3345
3356
+5
-1
drivers/net/ethernet/ti/am65-cpsw-nuss.h
+5
-1
drivers/net/ethernet/ti/am65-cpsw-nuss.h
···
101
101
struct hrtimer rx_hrtimer;
102
102
unsigned long rx_pace_timeout;
103
103
struct page_pool *page_pool;
104
-
struct page **pages;
105
104
char name[32];
105
+
};
106
+
107
+
struct am65_cpsw_swdata {
108
+
u32 flow_id;
109
+
struct page *page;
106
110
};
107
111
108
112
struct am65_cpsw_rx_chn {
+3
-2
drivers/net/ethernet/vertexcom/mse102x.c
+3
-2
drivers/net/ethernet/vertexcom/mse102x.c
···
222
222
struct mse102x_net_spi *mses = to_mse102x_spi(mse);
223
223
struct spi_transfer *xfer = &mses->spi_xfer;
224
224
struct spi_message *msg = &mses->spi_msg;
225
-
struct sk_buff *tskb;
225
+
struct sk_buff *tskb = NULL;
226
226
int ret;
227
227
228
228
netif_dbg(mse, tx_queued, mse->ndev, "%s: skb %p, %d@%p\n",
···
235
235
if (!tskb)
236
236
return -ENOMEM;
237
237
238
-
dev_kfree_skb(txp);
239
238
txp = tskb;
240
239
}
241
240
···
255
256
__func__, ret);
256
257
mse->stats.xfer_err++;
257
258
}
259
+
260
+
dev_kfree_skb(tskb);
258
261
259
262
return ret;
260
263
}
+2
-2
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+2
-2
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
···
924
924
skbuf_dma->sg_len = sg_len;
925
925
dma_tx_desc->callback_param = lp;
926
926
dma_tx_desc->callback_result = axienet_dma_tx_cb;
927
-
dmaengine_submit(dma_tx_desc);
928
-
dma_async_issue_pending(lp->tx_chan);
929
927
txq = skb_get_tx_queue(lp->ndev, skb);
930
928
netdev_tx_sent_queue(txq, skb->len);
931
929
netif_txq_maybe_stop(txq, CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX),
932
930
MAX_SKB_FRAGS + 1, 2 * MAX_SKB_FRAGS);
933
931
932
+
dmaengine_submit(dma_tx_desc);
933
+
dma_async_issue_pending(lp->tx_chan);
934
934
return NETDEV_TX_OK;
935
935
936
936
xmit_error_unmap_sg:
+2
drivers/net/phy/dp83848.c
+2
drivers/net/phy/dp83848.c
+100
-19
drivers/net/virtio_net.c
+100
-19
drivers/net/virtio_net.c
···
368
368
* because table sizes may be differ according to the device configuration.
369
369
*/
370
370
#define VIRTIO_NET_RSS_MAX_KEY_SIZE 40
371
-
#define VIRTIO_NET_RSS_MAX_TABLE_LEN 128
372
371
struct virtio_net_ctrl_rss {
373
372
u32 hash_types;
374
373
u16 indirection_table_mask;
375
374
u16 unclassified_queue;
376
-
u16 indirection_table[VIRTIO_NET_RSS_MAX_TABLE_LEN];
375
+
u16 hash_cfg_reserved; /* for HASH_CONFIG (see virtio_net_hash_config for details) */
377
376
u16 max_tx_vq;
378
377
u8 hash_key_length;
379
378
u8 key[VIRTIO_NET_RSS_MAX_KEY_SIZE];
379
+
380
+
u16 *indirection_table;
380
381
};
381
382
382
383
/* Control VQ buffers: protected by the rtnl lock */
···
512
511
struct sk_buff *curr_skb,
513
512
struct page *page, void *buf,
514
513
int len, int truesize);
514
+
515
+
static int rss_indirection_table_alloc(struct virtio_net_ctrl_rss *rss, u16 indir_table_size)
516
+
{
517
+
if (!indir_table_size) {
518
+
rss->indirection_table = NULL;
519
+
return 0;
520
+
}
521
+
522
+
rss->indirection_table = kmalloc_array(indir_table_size, sizeof(u16), GFP_KERNEL);
523
+
if (!rss->indirection_table)
524
+
return -ENOMEM;
525
+
526
+
return 0;
527
+
}
528
+
529
+
static void rss_indirection_table_free(struct virtio_net_ctrl_rss *rss)
530
+
{
531
+
kfree(rss->indirection_table);
532
+
}
515
533
516
534
static bool is_xdp_frame(void *ptr)
517
535
{
···
3394
3374
dev_warn(&vi->dev->dev, "Failed to ack link announce.\n");
3395
3375
}
3396
3376
3377
+
static bool virtnet_commit_rss_command(struct virtnet_info *vi);
3378
+
3379
+
static void virtnet_rss_update_by_qpairs(struct virtnet_info *vi, u16 queue_pairs)
3380
+
{
3381
+
u32 indir_val = 0;
3382
+
int i = 0;
3383
+
3384
+
for (; i < vi->rss_indir_table_size; ++i) {
3385
+
indir_val = ethtool_rxfh_indir_default(i, queue_pairs);
3386
+
vi->rss.indirection_table[i] = indir_val;
3387
+
}
3388
+
vi->rss.max_tx_vq = queue_pairs;
3389
+
}
3390
+
3397
3391
static int virtnet_set_queues(struct virtnet_info *vi, u16 queue_pairs)
3398
3392
{
3399
3393
struct virtio_net_ctrl_mq *mq __free(kfree) = NULL;
3400
-
struct scatterlist sg;
3394
+
struct virtio_net_ctrl_rss old_rss;
3401
3395
struct net_device *dev = vi->dev;
3396
+
struct scatterlist sg;
3402
3397
3403
3398
if (!vi->has_cvq || !virtio_has_feature(vi->vdev, VIRTIO_NET_F_MQ))
3404
3399
return 0;
3400
+
3401
+
/* Firstly check if we need update rss. Do updating if both (1) rss enabled and
3402
+
* (2) no user configuration.
3403
+
*
3404
+
* During rss command processing, device updates queue_pairs using rss.max_tx_vq. That is,
3405
+
* the device updates queue_pairs together with rss, so we can skip the sperate queue_pairs
3406
+
* update (VIRTIO_NET_CTRL_MQ_VQ_PAIRS_SET below) and return directly.
3407
+
*/
3408
+
if (vi->has_rss && !netif_is_rxfh_configured(dev)) {
3409
+
memcpy(&old_rss, &vi->rss, sizeof(old_rss));
3410
+
if (rss_indirection_table_alloc(&vi->rss, vi->rss_indir_table_size)) {
3411
+
vi->rss.indirection_table = old_rss.indirection_table;
3412
+
return -ENOMEM;
3413
+
}
3414
+
3415
+
virtnet_rss_update_by_qpairs(vi, queue_pairs);
3416
+
3417
+
if (!virtnet_commit_rss_command(vi)) {
3418
+
/* restore ctrl_rss if commit_rss_command failed */
3419
+
rss_indirection_table_free(&vi->rss);
3420
+
memcpy(&vi->rss, &old_rss, sizeof(old_rss));
3421
+
3422
+
dev_warn(&dev->dev, "Fail to set num of queue pairs to %d, because committing RSS failed\n",
3423
+
queue_pairs);
3424
+
return -EINVAL;
3425
+
}
3426
+
rss_indirection_table_free(&old_rss);
3427
+
goto succ;
3428
+
}
3405
3429
3406
3430
mq = kzalloc(sizeof(*mq), GFP_KERNEL);
3407
3431
if (!mq)
···
3459
3395
dev_warn(&dev->dev, "Fail to set num of queue pairs to %d\n",
3460
3396
queue_pairs);
3461
3397
return -EINVAL;
3462
-
} else {
3463
-
vi->curr_queue_pairs = queue_pairs;
3464
-
/* virtnet_open() will refill when device is going to up. */
3465
-
if (dev->flags & IFF_UP)
3466
-
schedule_delayed_work(&vi->refill, 0);
3467
3398
}
3399
+
succ:
3400
+
vi->curr_queue_pairs = queue_pairs;
3401
+
/* virtnet_open() will refill when device is going to up. */
3402
+
if (dev->flags & IFF_UP)
3403
+
schedule_delayed_work(&vi->refill, 0);
3468
3404
3469
3405
return 0;
3470
3406
}
···
3892
3828
/* prepare sgs */
3893
3829
sg_init_table(sgs, 4);
3894
3830
3895
-
sg_buf_size = offsetof(struct virtio_net_ctrl_rss, indirection_table);
3831
+
sg_buf_size = offsetof(struct virtio_net_ctrl_rss, hash_cfg_reserved);
3896
3832
sg_set_buf(&sgs[0], &vi->rss, sg_buf_size);
3897
3833
3898
-
sg_buf_size = sizeof(uint16_t) * (vi->rss.indirection_table_mask + 1);
3899
-
sg_set_buf(&sgs[1], vi->rss.indirection_table, sg_buf_size);
3834
+
if (vi->has_rss) {
3835
+
sg_buf_size = sizeof(uint16_t) * vi->rss_indir_table_size;
3836
+
sg_set_buf(&sgs[1], vi->rss.indirection_table, sg_buf_size);
3837
+
} else {
3838
+
sg_set_buf(&sgs[1], &vi->rss.hash_cfg_reserved, sizeof(uint16_t));
3839
+
}
3900
3840
3901
3841
sg_buf_size = offsetof(struct virtio_net_ctrl_rss, key)
3902
3842
- offsetof(struct virtio_net_ctrl_rss, max_tx_vq);
···
3924
3856
3925
3857
static void virtnet_init_default_rss(struct virtnet_info *vi)
3926
3858
{
3927
-
u32 indir_val = 0;
3928
-
int i = 0;
3929
-
3930
3859
vi->rss.hash_types = vi->rss_hash_types_supported;
3931
3860
vi->rss_hash_types_saved = vi->rss_hash_types_supported;
3932
3861
vi->rss.indirection_table_mask = vi->rss_indir_table_size
3933
3862
? vi->rss_indir_table_size - 1 : 0;
3934
3863
vi->rss.unclassified_queue = 0;
3935
3864
3936
-
for (; i < vi->rss_indir_table_size; ++i) {
3937
-
indir_val = ethtool_rxfh_indir_default(i, vi->curr_queue_pairs);
3938
-
vi->rss.indirection_table[i] = indir_val;
3939
-
}
3865
+
virtnet_rss_update_by_qpairs(vi, vi->curr_queue_pairs);
3940
3866
3941
-
vi->rss.max_tx_vq = vi->has_rss ? vi->curr_queue_pairs : 0;
3942
3867
vi->rss.hash_key_length = vi->rss_key_size;
3943
3868
3944
3869
netdev_rss_key_fill(vi->rss.key, vi->rss_key_size);
···
6481
6420
virtio_cread16(vdev, offsetof(struct virtio_net_config,
6482
6421
rss_max_indirection_table_length));
6483
6422
}
6423
+
err = rss_indirection_table_alloc(&vi->rss, vi->rss_indir_table_size);
6424
+
if (err)
6425
+
goto free;
6484
6426
6485
6427
if (vi->has_rss || vi->has_rss_hash_report) {
6486
6428
vi->rss_key_size =
6487
6429
virtio_cread8(vdev, offsetof(struct virtio_net_config, rss_max_key_size));
6430
+
if (vi->rss_key_size > VIRTIO_NET_RSS_MAX_KEY_SIZE) {
6431
+
dev_err(&vdev->dev, "rss_max_key_size=%u exceeds the limit %u.\n",
6432
+
vi->rss_key_size, VIRTIO_NET_RSS_MAX_KEY_SIZE);
6433
+
err = -EINVAL;
6434
+
goto free;
6435
+
}
6488
6436
6489
6437
vi->rss_hash_types_supported =
6490
6438
virtio_cread32(vdev, offsetof(struct virtio_net_config, supported_hash_types));
···
6621
6551
6622
6552
virtio_device_ready(vdev);
6623
6553
6554
+
if (vi->has_rss || vi->has_rss_hash_report) {
6555
+
if (!virtnet_commit_rss_command(vi)) {
6556
+
dev_warn(&vdev->dev, "RSS disabled because committing failed.\n");
6557
+
dev->hw_features &= ~NETIF_F_RXHASH;
6558
+
vi->has_rss_hash_report = false;
6559
+
vi->has_rss = false;
6560
+
}
6561
+
}
6562
+
6624
6563
virtnet_set_queues(vi, vi->curr_queue_pairs);
6625
6564
6626
6565
/* a random MAC address has been assigned, notify the device.
···
6752
6673
net_failover_destroy(vi->failover);
6753
6674
6754
6675
remove_vq_common(vi);
6676
+
6677
+
rss_indirection_table_free(&vi->rss);
6755
6678
6756
6679
free_netdev(vi->dev);
6757
6680
}
+1
-1
drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c
+1
-1
drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c
+14
-7
drivers/nvme/host/core.c
+14
-7
drivers/nvme/host/core.c
···
3795
3795
int srcu_idx;
3796
3796
3797
3797
srcu_idx = srcu_read_lock(&ctrl->srcu);
3798
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
3798
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
3799
+
srcu_read_lock_held(&ctrl->srcu)) {
3799
3800
if (ns->head->ns_id == nsid) {
3800
3801
if (!nvme_get_ns(ns))
3801
3802
continue;
···
4880
4879
int srcu_idx;
4881
4880
4882
4881
srcu_idx = srcu_read_lock(&ctrl->srcu);
4883
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4882
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4883
+
srcu_read_lock_held(&ctrl->srcu))
4884
4884
blk_mark_disk_dead(ns->disk);
4885
4885
srcu_read_unlock(&ctrl->srcu, srcu_idx);
4886
4886
}
···
4893
4891
int srcu_idx;
4894
4892
4895
4893
srcu_idx = srcu_read_lock(&ctrl->srcu);
4896
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4894
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4895
+
srcu_read_lock_held(&ctrl->srcu))
4897
4896
blk_mq_unfreeze_queue(ns->queue);
4898
4897
srcu_read_unlock(&ctrl->srcu, srcu_idx);
4899
4898
clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
···
4907
4904
int srcu_idx;
4908
4905
4909
4906
srcu_idx = srcu_read_lock(&ctrl->srcu);
4910
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
4907
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4908
+
srcu_read_lock_held(&ctrl->srcu)) {
4911
4909
timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4912
4910
if (timeout <= 0)
4913
4911
break;
···
4924
4920
int srcu_idx;
4925
4921
4926
4922
srcu_idx = srcu_read_lock(&ctrl->srcu);
4927
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4923
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4924
+
srcu_read_lock_held(&ctrl->srcu))
4928
4925
blk_mq_freeze_queue_wait(ns->queue);
4929
4926
srcu_read_unlock(&ctrl->srcu, srcu_idx);
4930
4927
}
···
4938
4933
4939
4934
set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4940
4935
srcu_idx = srcu_read_lock(&ctrl->srcu);
4941
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4936
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4937
+
srcu_read_lock_held(&ctrl->srcu))
4942
4938
blk_freeze_queue_start(ns->queue);
4943
4939
srcu_read_unlock(&ctrl->srcu, srcu_idx);
4944
4940
}
···
4987
4981
int srcu_idx;
4988
4982
4989
4983
srcu_idx = srcu_read_lock(&ctrl->srcu);
4990
-
list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4984
+
list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4985
+
srcu_read_lock_held(&ctrl->srcu))
4991
4986
blk_sync_queue(ns->queue);
4992
4987
srcu_read_unlock(&ctrl->srcu, srcu_idx);
4993
4988
}
+5
drivers/platform/x86/amd/pmc/pmc.c
+5
drivers/platform/x86/amd/pmc/pmc.c
···
998
998
amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_LOW, &phys_addr_low, dev->s2d_msg_id, true);
999
999
amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_HIGH, &phys_addr_hi, dev->s2d_msg_id, true);
1000
1000
1001
+
if (!phys_addr_hi && !phys_addr_low) {
1002
+
dev_err(dev->dev, "STB is not enabled on the system; disable enable_stb or contact system vendor\n");
1003
+
return -EINVAL;
1004
+
}
1005
+
1001
1006
stb_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low);
1002
1007
1003
1008
/* Clear msg_port for other SMU operation */
+1
drivers/platform/x86/amd/pmf/core.c
+1
drivers/platform/x86/amd/pmf/core.c
+1
drivers/platform/x86/amd/pmf/spc.c
+1
drivers/platform/x86/amd/pmf/spc.c
···
86
86
ARRAY_SIZE(dev->m_table.avg_core_c0residency), in);
87
87
break;
88
88
case PCI_DEVICE_ID_AMD_1AH_M20H_ROOT:
89
+
case PCI_DEVICE_ID_AMD_1AH_M60H_ROOT:
89
90
memcpy(&dev->m_table_v2, dev->buf, dev->mtable_size);
90
91
in->ev_info.socket_power = dev->m_table_v2.apu_power + dev->m_table_v2.dgpu_power;
91
92
in->ev_info.skin_temperature = dev->m_table_v2.skin_temp;
+1
drivers/platform/x86/dell/dell-smbios-base.c
+1
drivers/platform/x86/dell/dell-smbios-base.c
···
576
576
int ret, wmi, smm;
577
577
578
578
if (!dmi_find_device(DMI_DEV_TYPE_OEM_STRING, "Dell System", NULL) &&
579
+
!dmi_find_device(DMI_DEV_TYPE_OEM_STRING, "Alienware", NULL) &&
579
580
!dmi_find_device(DMI_DEV_TYPE_OEM_STRING, "www.dell.com", NULL)) {
580
581
pr_err("Unable to run on non-Dell system\n");
581
582
return -ENODEV;
+6
drivers/platform/x86/dell/dell-wmi-base.c
+6
drivers/platform/x86/dell/dell-wmi-base.c
···
80
80
static const struct key_entry dell_wmi_keymap_type_0000[] = {
81
81
{ KE_IGNORE, 0x003a, { KEY_CAPSLOCK } },
82
82
83
+
/* Meta key lock */
84
+
{ KE_IGNORE, 0xe000, { KEY_RIGHTMETA } },
85
+
86
+
/* Meta key unlock */
87
+
{ KE_IGNORE, 0xe001, { KEY_RIGHTMETA } },
88
+
83
89
/* Key code is followed by brightness level */
84
90
{ KE_KEY, 0xe005, { KEY_BRIGHTNESSDOWN } },
85
91
{ KE_KEY, 0xe006, { KEY_BRIGHTNESSUP } },
+3
drivers/platform/x86/ideapad-laptop.c
+3
drivers/platform/x86/ideapad-laptop.c
···
1294
1294
{ KE_KEY, 0x27 | IDEAPAD_WMI_KEY, { KEY_HELP } },
1295
1295
/* Refresh Rate Toggle */
1296
1296
{ KE_KEY, 0x0a | IDEAPAD_WMI_KEY, { KEY_REFRESH_RATE_TOGGLE } },
1297
+
/* Specific to some newer models */
1298
+
{ KE_KEY, 0x3e | IDEAPAD_WMI_KEY, { KEY_MICMUTE } },
1299
+
{ KE_KEY, 0x3f | IDEAPAD_WMI_KEY, { KEY_RFKILL } },
1297
1300
1298
1301
{ KE_END },
1299
1302
};
+25
-3
drivers/platform/x86/thinkpad_acpi.c
+25
-3
drivers/platform/x86/thinkpad_acpi.c
···
7936
7936
static int fan_watchdog_maxinterval;
7937
7937
7938
7938
static bool fan_with_ns_addr;
7939
+
static bool ecfw_with_fan_dec_rpm;
7939
7940
7940
7941
static struct mutex fan_mutex;
7941
7942
···
8683
8682
if (res < 0)
8684
8683
return res;
8685
8684
8686
-
return sysfs_emit(buf, "%u\n", speed);
8685
+
/* Check for fan speeds displayed in hexadecimal */
8686
+
if (!ecfw_with_fan_dec_rpm)
8687
+
return sysfs_emit(buf, "%u\n", speed);
8688
+
else
8689
+
return sysfs_emit(buf, "%x\n", speed);
8687
8690
}
8688
8691
8689
8692
static DEVICE_ATTR(fan1_input, S_IRUGO, fan_fan1_input_show, NULL);
···
8704
8699
if (res < 0)
8705
8700
return res;
8706
8701
8707
-
return sysfs_emit(buf, "%u\n", speed);
8702
+
/* Check for fan speeds displayed in hexadecimal */
8703
+
if (!ecfw_with_fan_dec_rpm)
8704
+
return sysfs_emit(buf, "%u\n", speed);
8705
+
else
8706
+
return sysfs_emit(buf, "%x\n", speed);
8708
8707
}
8709
8708
8710
8709
static DEVICE_ATTR(fan2_input, S_IRUGO, fan_fan2_input_show, NULL);
···
8784
8775
#define TPACPI_FAN_2CTL 0x0004 /* selects fan2 control */
8785
8776
#define TPACPI_FAN_NOFAN 0x0008 /* no fan available */
8786
8777
#define TPACPI_FAN_NS 0x0010 /* For EC with non-Standard register addresses */
8778
+
#define TPACPI_FAN_DECRPM 0x0020 /* For ECFW's with RPM in register as decimal */
8787
8779
8788
8780
static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
8789
8781
TPACPI_QEC_IBM('1', 'Y', TPACPI_FAN_Q1),
···
8813
8803
TPACPI_Q_LNV3('R', '1', 'D', TPACPI_FAN_NS), /* 11e Gen5 GL-R */
8814
8804
TPACPI_Q_LNV3('R', '0', 'V', TPACPI_FAN_NS), /* 11e Gen5 KL-Y */
8815
8805
TPACPI_Q_LNV3('N', '1', 'O', TPACPI_FAN_NOFAN), /* X1 Tablet (2nd gen) */
8806
+
TPACPI_Q_LNV3('R', '0', 'Q', TPACPI_FAN_DECRPM),/* L480 */
8816
8807
};
8817
8808
8818
8809
static int __init fan_init(struct ibm_init_struct *iibm)
···
8855
8844
pr_info("ECFW with non-standard fan reg control found\n");
8856
8845
fan_with_ns_addr = 1;
8857
8846
/* Fan ctrl support from host is undefined for now */
8847
+
tp_features.fan_ctrl_status_undef = 1;
8848
+
}
8849
+
8850
+
/* Check for the EC/BIOS with RPM reported in decimal*/
8851
+
if (quirks & TPACPI_FAN_DECRPM) {
8852
+
pr_info("ECFW with fan RPM as decimal in EC register\n");
8853
+
ecfw_with_fan_dec_rpm = 1;
8858
8854
tp_features.fan_ctrl_status_undef = 1;
8859
8855
}
8860
8856
···
9085
9067
if (rc < 0)
9086
9068
return rc;
9087
9069
9088
-
seq_printf(m, "speed:\t\t%d\n", speed);
9070
+
/* Check for fan speeds displayed in hexadecimal */
9071
+
if (!ecfw_with_fan_dec_rpm)
9072
+
seq_printf(m, "speed:\t\t%d\n", speed);
9073
+
else
9074
+
seq_printf(m, "speed:\t\t%x\n", speed);
9089
9075
9090
9076
if (fan_status_access_mode == TPACPI_FAN_RD_TPEC_NS) {
9091
9077
/*
+3
-1
drivers/pwm/pwm-imx-tpm.c
+3
-1
drivers/pwm/pwm-imx-tpm.c
···
106
106
p->prescale = prescale;
107
107
108
108
period_count = (clock_unit + ((1 << prescale) >> 1)) >> prescale;
109
-
p->mod = period_count;
109
+
if (period_count == 0)
110
+
return -EINVAL;
111
+
p->mod = period_count - 1;
110
112
111
113
/* calculate real period HW can support */
112
114
tmp = (u64)period_count << prescale;
+2
drivers/regulator/rk808-regulator.c
+2
drivers/regulator/rk808-regulator.c
···
1379
1379
.n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
1380
1380
.vsel_reg = RK817_BUCK3_ON_VSEL_REG,
1381
1381
.vsel_mask = RK817_BUCK_VSEL_MASK,
1382
+
.apply_reg = RK817_POWER_CONFIG,
1383
+
.apply_bit = RK817_BUCK3_FB_RES_INTER,
1382
1384
.enable_reg = RK817_POWER_EN_REG(0),
1383
1385
.enable_mask = ENABLE_MASK(RK817_ID_DCDC3),
1384
1386
.enable_val = ENABLE_MASK(RK817_ID_DCDC3),
+1
-1
drivers/regulator/rtq2208-regulator.c
+1
-1
drivers/regulator/rtq2208-regulator.c
···
568
568
struct regmap *regmap;
569
569
struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX];
570
570
struct regulator_dev *rdev;
571
-
struct regulator_config cfg;
571
+
struct regulator_config cfg = {};
572
572
struct rtq2208_rdev_map *rdev_map;
573
573
int i, ret = 0, idx, n_regulator = 0;
574
574
unsigned int regulator_idx_table[RTQ2208_LDO_MAX],
+7
-3
drivers/rpmsg/qcom_glink_native.c
+7
-3
drivers/rpmsg/qcom_glink_native.c
···
1440
1440
goto unlock;
1441
1441
1442
1442
ret = wait_event_timeout(channel->intent_req_wq,
1443
-
READ_ONCE(channel->intent_req_result) >= 0 &&
1444
-
READ_ONCE(channel->intent_received),
1443
+
READ_ONCE(channel->intent_req_result) == 0 ||
1444
+
(READ_ONCE(channel->intent_req_result) > 0 &&
1445
+
READ_ONCE(channel->intent_received)) ||
1446
+
glink->abort_tx,
1445
1447
10 * HZ);
1446
1448
if (!ret) {
1447
1449
dev_err(glink->dev, "intent request timed out\n");
1448
1450
ret = -ETIMEDOUT;
1451
+
} else if (glink->abort_tx) {
1452
+
ret = -ECANCELED;
1449
1453
} else {
1450
-
ret = READ_ONCE(channel->intent_req_result) ? 0 : -ECANCELED;
1454
+
ret = READ_ONCE(channel->intent_req_result) ? 0 : -EAGAIN;
1451
1455
}
1452
1456
1453
1457
unlock:
+1
-2
drivers/scsi/sd_zbc.c
+1
-2
drivers/scsi/sd_zbc.c
···
188
188
bufsize = min_t(size_t, bufsize, queue_max_segments(q) << PAGE_SHIFT);
189
189
190
190
while (bufsize >= SECTOR_SIZE) {
191
-
buf = __vmalloc(bufsize,
192
-
GFP_KERNEL | __GFP_ZERO | __GFP_NORETRY);
191
+
buf = kvzalloc(bufsize, GFP_KERNEL | __GFP_NORETRY);
193
192
if (buf) {
194
193
*buflen = bufsize;
195
194
return buf;
+3
drivers/soc/qcom/llcc-qcom.c
+3
drivers/soc/qcom/llcc-qcom.c
···
139
139
int size;
140
140
bool need_llcc_cfg;
141
141
bool no_edac;
142
+
bool irq_configured;
142
143
};
143
144
144
145
struct qcom_sct_config {
···
719
718
.need_llcc_cfg = true,
720
719
.reg_offset = llcc_v2_1_reg_offset,
721
720
.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
721
+
.irq_configured = true,
722
722
},
723
723
};
724
724
···
1347
1345
drv_data->cfg = llcc_cfg;
1348
1346
drv_data->cfg_size = sz;
1349
1347
drv_data->edac_reg_offset = cfg->edac_reg_offset;
1348
+
drv_data->ecc_irq_configured = cfg->irq_configured;
1350
1349
mutex_init(&drv_data->lock);
1351
1350
platform_set_drvdata(pdev, drv_data);
1352
1351
+22
-3
drivers/soc/qcom/pmic_glink.c
+22
-3
drivers/soc/qcom/pmic_glink.c
···
4
4
* Copyright (c) 2022, Linaro Ltd
5
5
*/
6
6
#include <linux/auxiliary_bus.h>
7
+
#include <linux/delay.h>
7
8
#include <linux/module.h>
8
9
#include <linux/of.h>
9
10
#include <linux/platform_device.h>
···
13
12
#include <linux/soc/qcom/pdr.h>
14
13
#include <linux/soc/qcom/pmic_glink.h>
15
14
#include <linux/spinlock.h>
15
+
16
+
#define PMIC_GLINK_SEND_TIMEOUT (5 * HZ)
16
17
17
18
enum {
18
19
PMIC_GLINK_CLIENT_BATT = 0,
···
115
112
int pmic_glink_send(struct pmic_glink_client *client, void *data, size_t len)
116
113
{
117
114
struct pmic_glink *pg = client->pg;
115
+
bool timeout_reached = false;
116
+
unsigned long start;
118
117
int ret;
119
118
120
119
mutex_lock(&pg->state_lock);
121
-
if (!pg->ept)
120
+
if (!pg->ept) {
122
121
ret = -ECONNRESET;
123
-
else
124
-
ret = rpmsg_send(pg->ept, data, len);
122
+
} else {
123
+
start = jiffies;
124
+
for (;;) {
125
+
ret = rpmsg_send(pg->ept, data, len);
126
+
if (ret != -EAGAIN)
127
+
break;
128
+
129
+
if (timeout_reached) {
130
+
ret = -ETIMEDOUT;
131
+
break;
132
+
}
133
+
134
+
usleep_range(1000, 5000);
135
+
timeout_reached = time_after(jiffies, start + PMIC_GLINK_SEND_TIMEOUT);
136
+
}
137
+
}
125
138
mutex_unlock(&pg->state_lock);
126
139
127
140
return ret;
+7
-1
drivers/soc/qcom/socinfo.c
+7
-1
drivers/soc/qcom/socinfo.c
···
786
786
qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
787
787
SOCINFO_MAJOR(le32_to_cpu(info->ver)),
788
788
SOCINFO_MINOR(le32_to_cpu(info->ver)));
789
-
if (offsetof(struct socinfo, serial_num) <= item_size)
789
+
if (!qs->attr.soc_id || !qs->attr.revision)
790
+
return -ENOMEM;
791
+
792
+
if (offsetof(struct socinfo, serial_num) <= item_size) {
790
793
qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
791
794
"%u",
792
795
le32_to_cpu(info->serial_num));
796
+
if (!qs->attr.serial_number)
797
+
return -ENOMEM;
798
+
}
793
799
794
800
qs->soc_dev = soc_device_register(&qs->attr);
795
801
if (IS_ERR(qs->soc_dev))
+3
-1
drivers/staging/media/av7110/av7110.h
+3
-1
drivers/staging/media/av7110/av7110.h
···
88
88
u32 ir_config;
89
89
};
90
90
91
+
#define MAX_CI_SLOTS 2
92
+
91
93
/* place to store all the necessary device information */
92
94
struct av7110 {
93
95
/* devices */
···
165
163
166
164
/* CA */
167
165
168
-
struct ca_slot_info ci_slot[2];
166
+
struct ca_slot_info ci_slot[MAX_CI_SLOTS];
169
167
170
168
enum av7110_video_mode vidmode;
171
169
struct dmxdev dmxdev;
+17
-8
drivers/staging/media/av7110/av7110_ca.c
+17
-8
drivers/staging/media/av7110/av7110_ca.c
···
26
26
27
27
void CI_handle(struct av7110 *av7110, u8 *data, u16 len)
28
28
{
29
+
unsigned slot_num;
30
+
29
31
dprintk(8, "av7110:%p\n", av7110);
30
32
31
33
if (len < 3)
32
34
return;
33
35
switch (data[0]) {
34
36
case CI_MSG_CI_INFO:
35
-
if (data[2] != 1 && data[2] != 2)
37
+
if (data[2] != 1 && data[2] != MAX_CI_SLOTS)
36
38
break;
39
+
40
+
slot_num = array_index_nospec(data[2] - 1, MAX_CI_SLOTS);
41
+
37
42
switch (data[1]) {
38
43
case 0:
39
-
av7110->ci_slot[data[2] - 1].flags = 0;
44
+
av7110->ci_slot[slot_num].flags = 0;
40
45
break;
41
46
case 1:
42
-
av7110->ci_slot[data[2] - 1].flags |= CA_CI_MODULE_PRESENT;
47
+
av7110->ci_slot[slot_num].flags |= CA_CI_MODULE_PRESENT;
43
48
break;
44
49
case 2:
45
-
av7110->ci_slot[data[2] - 1].flags |= CA_CI_MODULE_READY;
50
+
av7110->ci_slot[slot_num].flags |= CA_CI_MODULE_READY;
46
51
break;
47
52
}
48
53
break;
···
267
262
case CA_GET_SLOT_INFO:
268
263
{
269
264
struct ca_slot_info *info = (struct ca_slot_info *)parg;
265
+
unsigned int slot_num;
270
266
271
267
if (info->num < 0 || info->num > 1) {
272
268
mutex_unlock(&av7110->ioctl_mutex);
273
269
return -EINVAL;
274
270
}
275
-
av7110->ci_slot[info->num].num = info->num;
276
-
av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ?
277
-
CA_CI_LINK : CA_CI;
278
-
memcpy(info, &av7110->ci_slot[info->num], sizeof(struct ca_slot_info));
271
+
slot_num = array_index_nospec(info->num, MAX_CI_SLOTS);
272
+
273
+
av7110->ci_slot[slot_num].num = info->num;
274
+
av7110->ci_slot[slot_num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ?
275
+
CA_CI_LINK : CA_CI;
276
+
memcpy(info, &av7110->ci_slot[slot_num],
277
+
sizeof(struct ca_slot_info));
279
278
break;
280
279
}
281
280
+2
-4
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+2
-4
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
···
593
593
{
594
594
struct vchiq_arm_state *platform_state;
595
595
596
-
platform_state = kzalloc(sizeof(*platform_state), GFP_KERNEL);
596
+
platform_state = devm_kzalloc(state->dev, sizeof(*platform_state), GFP_KERNEL);
597
597
if (!platform_state)
598
598
return -ENOMEM;
599
599
···
1731
1731
return -ENOENT;
1732
1732
}
1733
1733
1734
-
mgmt = kzalloc(sizeof(*mgmt), GFP_KERNEL);
1734
+
mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL);
1735
1735
if (!mgmt)
1736
1736
return -ENOMEM;
1737
1737
···
1789
1789
1790
1790
arm_state = vchiq_platform_get_arm_state(&mgmt->state);
1791
1791
kthread_stop(arm_state->ka_thread);
1792
-
1793
-
kfree(mgmt);
1794
1792
}
1795
1793
1796
1794
static struct platform_driver vchiq_driver = {
+7
drivers/thermal/qcom/lmh.c
+7
drivers/thermal/qcom/lmh.c
···
73
73
static int lmh_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
74
74
{
75
75
struct lmh_hw_data *lmh_data = d->host_data;
76
+
static struct lock_class_key lmh_lock_key;
77
+
static struct lock_class_key lmh_request_key;
76
78
79
+
/*
80
+
* This lock class tells lockdep that GPIO irqs are in a different
81
+
* category than their parents, so it won't report false recursion.
82
+
*/
83
+
irq_set_lockdep_class(irq, &lmh_lock_key, &lmh_request_key);
77
84
irq_set_chip_and_handler(irq, &lmh_irq_chip, handle_simple_irq);
78
85
irq_set_chip_data(irq, lmh_data);
79
86
+10
-11
drivers/thermal/thermal_of.c
+10
-11
drivers/thermal/thermal_of.c
···
99
99
struct device_node *trips;
100
100
int ret, count;
101
101
102
+
*ntrips = 0;
103
+
102
104
trips = of_get_child_by_name(np, "trips");
103
-
if (!trips) {
104
-
pr_err("Failed to find 'trips' node\n");
105
-
return ERR_PTR(-EINVAL);
106
-
}
105
+
if (!trips)
106
+
return NULL;
107
107
108
108
count = of_get_child_count(trips);
109
-
if (!count) {
110
-
pr_err("No trip point defined\n");
111
-
ret = -EINVAL;
112
-
goto out_of_node_put;
113
-
}
109
+
if (!count)
110
+
return NULL;
114
111
115
112
tt = kzalloc(sizeof(*tt) * count, GFP_KERNEL);
116
113
if (!tt) {
···
130
133
131
134
out_kfree:
132
135
kfree(tt);
133
-
*ntrips = 0;
134
136
out_of_node_put:
135
137
of_node_put(trips);
136
138
···
397
401
398
402
trips = thermal_of_trips_init(np, &ntrips);
399
403
if (IS_ERR(trips)) {
400
-
pr_err("Failed to find trip points for %pOFn id=%d\n", sensor, id);
404
+
pr_err("Failed to parse trip points for %pOFn id=%d\n", sensor, id);
401
405
ret = PTR_ERR(trips);
402
406
goto out_of_node_put;
403
407
}
408
+
409
+
if (!trips)
410
+
pr_info("No trip points found for %pOFn id=%d\n", sensor, id);
404
411
405
412
ret = thermal_of_monitor_init(np, &delay, &pdelay);
406
413
if (ret) {
+2
drivers/thunderbolt/retimer.c
+2
drivers/thunderbolt/retimer.c
+1
-1
drivers/thunderbolt/usb4.c
+1
-1
drivers/thunderbolt/usb4.c
+8
-2
drivers/ufs/core/ufshcd.c
+8
-2
drivers/ufs/core/ufshcd.c
···
8636
8636
ufshcd_init_clk_scaling_sysfs(hba);
8637
8637
}
8638
8638
8639
+
/*
8640
+
* The RTC update code accesses the hba->ufs_device_wlun->sdev_gendev
8641
+
* pointer and hence must only be started after the WLUN pointer has
8642
+
* been initialized by ufshcd_scsi_add_wlus().
8643
+
*/
8644
+
schedule_delayed_work(&hba->ufs_rtc_update_work,
8645
+
msecs_to_jiffies(UFS_RTC_UPDATE_INTERVAL_MS));
8646
+
8639
8647
ufs_bsg_probe(hba);
8640
8648
scsi_scan_host(hba->host);
8641
8649
···
8803
8795
ufshcd_force_reset_auto_bkops(hba);
8804
8796
8805
8797
ufshcd_set_timestamp_attr(hba);
8806
-
schedule_delayed_work(&hba->ufs_rtc_update_work,
8807
-
msecs_to_jiffies(UFS_RTC_UPDATE_INTERVAL_MS));
8808
8798
8809
8799
/* Gear up to HS gear if supported */
8810
8800
if (hba->max_pwr_info.is_valid) {
+12
-13
drivers/usb/dwc3/core.c
+12
-13
drivers/usb/dwc3/core.c
···
2342
2342
u32 reg;
2343
2343
int i;
2344
2344
2345
-
dwc->susphy_state = (dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)) &
2346
-
DWC3_GUSB2PHYCFG_SUSPHY) ||
2347
-
(dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)) &
2348
-
DWC3_GUSB3PIPECTL_SUSPHY);
2345
+
if (!pm_runtime_suspended(dwc->dev) && !PMSG_IS_AUTO(msg)) {
2346
+
dwc->susphy_state = (dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)) &
2347
+
DWC3_GUSB2PHYCFG_SUSPHY) ||
2348
+
(dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)) &
2349
+
DWC3_GUSB3PIPECTL_SUSPHY);
2350
+
/*
2351
+
* TI AM62 platform requires SUSPHY to be
2352
+
* enabled for system suspend to work.
2353
+
*/
2354
+
if (!dwc->susphy_state)
2355
+
dwc3_enable_susphy(dwc, true);
2356
+
}
2349
2357
2350
2358
switch (dwc->current_dr_role) {
2351
2359
case DWC3_GCTL_PRTCAP_DEVICE:
···
2404
2396
default:
2405
2397
/* do nothing */
2406
2398
break;
2407
-
}
2408
-
2409
-
if (!PMSG_IS_AUTO(msg)) {
2410
-
/*
2411
-
* TI AM62 platform requires SUSPHY to be
2412
-
* enabled for system suspend to work.
2413
-
*/
2414
-
if (!dwc->susphy_state)
2415
-
dwc3_enable_susphy(dwc, true);
2416
2399
}
2417
2400
2418
2401
return 0;
-2
drivers/usb/musb/sunxi.c
-2
drivers/usb/musb/sunxi.c
+4
-4
drivers/usb/serial/io_edgeport.c
+4
-4
drivers/usb/serial/io_edgeport.c
···
770
770
static void edge_bulk_out_cmd_callback(struct urb *urb)
771
771
{
772
772
struct edgeport_port *edge_port = urb->context;
773
+
struct device *dev = &urb->dev->dev;
773
774
int status = urb->status;
774
775
775
776
atomic_dec(&CmdUrbs);
776
-
dev_dbg(&urb->dev->dev, "%s - FREE URB %p (outstanding %d)\n",
777
-
__func__, urb, atomic_read(&CmdUrbs));
777
+
dev_dbg(dev, "%s - FREE URB %p (outstanding %d)\n", __func__, urb,
778
+
atomic_read(&CmdUrbs));
778
779
779
780
780
781
/* clean up the transfer buffer */
···
785
784
usb_free_urb(urb);
786
785
787
786
if (status) {
788
-
dev_dbg(&urb->dev->dev,
789
-
"%s - nonzero write bulk status received: %d\n",
787
+
dev_dbg(dev, "%s - nonzero write bulk status received: %d\n",
790
788
__func__, status);
791
789
return;
792
790
}
+6
drivers/usb/serial/option.c
+6
drivers/usb/serial/option.c
···
251
251
#define QUECTEL_VENDOR_ID 0x2c7c
252
252
/* These Quectel products use Quectel's vendor ID */
253
253
#define QUECTEL_PRODUCT_EC21 0x0121
254
+
#define QUECTEL_PRODUCT_RG650V 0x0122
254
255
#define QUECTEL_PRODUCT_EM061K_LTA 0x0123
255
256
#define QUECTEL_PRODUCT_EM061K_LMS 0x0124
256
257
#define QUECTEL_PRODUCT_EC25 0x0125
···
1274
1273
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG912Y, 0xff, 0, 0) },
1275
1274
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG916Q, 0xff, 0x00, 0x00) },
1276
1275
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500K, 0xff, 0x00, 0x00) },
1276
+
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG650V, 0xff, 0xff, 0x30) },
1277
+
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG650V, 0xff, 0, 0) },
1277
1278
1278
1279
{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
1279
1280
{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) },
···
2323
2320
{ USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x010b, 0xff, 0xff, 0x30) }, /* Fibocom FG150 Diag */
2324
2321
{ USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x010b, 0xff, 0, 0) }, /* Fibocom FG150 AT */
2325
2322
{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0111, 0xff) }, /* Fibocom FM160 (MBIM mode) */
2323
+
{ USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x0112, 0xff, 0xff, 0x30) }, /* Fibocom FG132 Diag */
2324
+
{ USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x0112, 0xff, 0xff, 0x40) }, /* Fibocom FG132 AT */
2325
+
{ USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x0112, 0xff, 0, 0) }, /* Fibocom FG132 NMEA */
2326
2326
{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0115, 0xff), /* Fibocom FM135 (laptop MBIM) */
2327
2327
.driver_info = RSVD(5) },
2328
2328
{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a0, 0xff) }, /* Fibocom NL668-AM/NL652-EU (laptop MBIM) */
+2
drivers/usb/serial/qcserial.c
+2
drivers/usb/serial/qcserial.c
···
166
166
{DEVICE_SWI(0x1199, 0x9090)}, /* Sierra Wireless EM7565 QDL */
167
167
{DEVICE_SWI(0x1199, 0x9091)}, /* Sierra Wireless EM7565 */
168
168
{DEVICE_SWI(0x1199, 0x90d2)}, /* Sierra Wireless EM9191 QDL */
169
+
{DEVICE_SWI(0x1199, 0x90e4)}, /* Sierra Wireless EM86xx QDL*/
170
+
{DEVICE_SWI(0x1199, 0x90e5)}, /* Sierra Wireless EM86xx */
169
171
{DEVICE_SWI(0x1199, 0xc080)}, /* Sierra Wireless EM7590 QDL */
170
172
{DEVICE_SWI(0x1199, 0xc081)}, /* Sierra Wireless EM7590 */
171
173
{DEVICE_SWI(0x413c, 0x81a2)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */
+4
-4
drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c
+4
-4
drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c
···
227
227
228
228
spin_lock_irqsave(&pmic_typec_pdphy->lock, flags);
229
229
230
+
hdr_len = sizeof(msg->header);
231
+
txbuf_len = pd_header_cnt_le(msg->header) * 4;
232
+
txsize_len = hdr_len + txbuf_len - 1;
233
+
230
234
ret = regmap_read(pmic_typec_pdphy->regmap,
231
235
pmic_typec_pdphy->base + USB_PDPHY_RX_ACKNOWLEDGE_REG,
232
236
&val);
···
247
243
ret = qcom_pmic_typec_pdphy_clear_tx_control_reg(pmic_typec_pdphy);
248
244
if (ret)
249
245
goto done;
250
-
251
-
hdr_len = sizeof(msg->header);
252
-
txbuf_len = pd_header_cnt_le(msg->header) * 4;
253
-
txsize_len = hdr_len + txbuf_len - 1;
254
246
255
247
/* Write message header sizeof(u16) to USB_PDPHY_TX_BUFFER_HDR_REG */
256
248
ret = regmap_bulk_write(pmic_typec_pdphy->regmap,
+2
drivers/usb/typec/ucsi/ucsi_ccg.c
+2
drivers/usb/typec/ucsi/ucsi_ccg.c
+3
-4
fs/bcachefs/bkey.c
+3
-4
fs/bcachefs/bkey.c
···
643
643
enum bch_validate_flags flags,
644
644
struct printbuf *err)
645
645
{
646
-
unsigned i, bits = KEY_PACKED_BITS_START;
646
+
unsigned bits = KEY_PACKED_BITS_START;
647
647
648
648
if (f->nr_fields != BKEY_NR_FIELDS) {
649
649
prt_printf(err, "incorrect number of fields: got %u, should be %u",
···
655
655
* Verify that the packed format can't represent fields larger than the
656
656
* unpacked format:
657
657
*/
658
-
for (i = 0; i < f->nr_fields; i++) {
659
-
if ((!c || c->sb.version_min >= bcachefs_metadata_version_snapshot) &&
660
-
bch2_bkey_format_field_overflows(f, i)) {
658
+
for (unsigned i = 0; i < f->nr_fields; i++) {
659
+
if (bch2_bkey_format_field_overflows(f, i)) {
661
660
unsigned unpacked_bits = bch2_bkey_format_current.bits_per_field[i];
662
661
u64 unpacked_max = ~((~0ULL << 1) << (unpacked_bits - 1));
663
662
unsigned packed_bits = min(64, f->bits_per_field[i]);
+66
-41
fs/bcachefs/btree_cache.c
+66
-41
fs/bcachefs/btree_cache.c
···
59
59
60
60
static void btree_node_to_freedlist(struct btree_cache *bc, struct btree *b)
61
61
{
62
+
BUG_ON(!list_empty(&b->list));
63
+
62
64
if (b->c.lock.readers)
63
-
list_move(&b->list, &bc->freed_pcpu);
65
+
list_add(&b->list, &bc->freed_pcpu);
64
66
else
65
-
list_move(&b->list, &bc->freed_nonpcpu);
67
+
list_add(&b->list, &bc->freed_nonpcpu);
66
68
}
67
69
68
-
static void btree_node_data_free(struct bch_fs *c, struct btree *b)
70
+
static void __bch2_btree_node_to_freelist(struct btree_cache *bc, struct btree *b)
71
+
{
72
+
BUG_ON(!list_empty(&b->list));
73
+
BUG_ON(!b->data);
74
+
75
+
bc->nr_freeable++;
76
+
list_add(&b->list, &bc->freeable);
77
+
}
78
+
79
+
void bch2_btree_node_to_freelist(struct bch_fs *c, struct btree *b)
69
80
{
70
81
struct btree_cache *bc = &c->btree_cache;
71
82
83
+
mutex_lock(&bc->lock);
84
+
__bch2_btree_node_to_freelist(bc, b);
85
+
mutex_unlock(&bc->lock);
86
+
87
+
six_unlock_write(&b->c.lock);
88
+
six_unlock_intent(&b->c.lock);
89
+
}
90
+
91
+
static void __btree_node_data_free(struct btree_cache *bc, struct btree *b)
92
+
{
93
+
BUG_ON(!list_empty(&b->list));
72
94
BUG_ON(btree_node_hashed(b));
73
95
74
96
/*
···
116
94
#endif
117
95
b->aux_data = NULL;
118
96
119
-
bc->nr_freeable--;
120
-
121
97
btree_node_to_freedlist(bc, b);
98
+
}
99
+
100
+
static void btree_node_data_free(struct btree_cache *bc, struct btree *b)
101
+
{
102
+
BUG_ON(list_empty(&b->list));
103
+
list_del_init(&b->list);
104
+
--bc->nr_freeable;
105
+
__btree_node_data_free(bc, b);
122
106
}
123
107
124
108
static int bch2_btree_cache_cmp_fn(struct rhashtable_compare_arg *arg,
···
202
174
203
175
bch2_btree_lock_init(&b->c, 0);
204
176
205
-
bc->nr_freeable++;
206
-
list_add(&b->list, &bc->freeable);
177
+
__bch2_btree_node_to_freelist(bc, b);
207
178
return b;
208
-
}
209
-
210
-
void bch2_btree_node_to_freelist(struct bch_fs *c, struct btree *b)
211
-
{
212
-
mutex_lock(&c->btree_cache.lock);
213
-
list_move(&b->list, &c->btree_cache.freeable);
214
-
mutex_unlock(&c->btree_cache.lock);
215
-
216
-
six_unlock_write(&b->c.lock);
217
-
six_unlock_intent(&b->c.lock);
218
179
}
219
180
220
181
static inline bool __btree_node_pinned(struct btree_cache *bc, struct btree *b)
···
253
236
254
237
/* Btree in memory cache - hash table */
255
238
256
-
void bch2_btree_node_hash_remove(struct btree_cache *bc, struct btree *b)
239
+
void __bch2_btree_node_hash_remove(struct btree_cache *bc, struct btree *b)
257
240
{
258
241
lockdep_assert_held(&bc->lock);
259
-
int ret = rhashtable_remove_fast(&bc->table, &b->hash, bch_btree_cache_params);
260
242
243
+
int ret = rhashtable_remove_fast(&bc->table, &b->hash, bch_btree_cache_params);
261
244
BUG_ON(ret);
262
245
263
246
/* Cause future lookups for this node to fail: */
···
265
248
266
249
if (b->c.btree_id < BTREE_ID_NR)
267
250
--bc->nr_by_btree[b->c.btree_id];
251
+
--bc->live[btree_node_pinned(b)].nr;
252
+
list_del_init(&b->list);
253
+
}
268
254
269
-
bc->live[btree_node_pinned(b)].nr--;
270
-
bc->nr_freeable++;
271
-
list_move(&b->list, &bc->freeable);
255
+
void bch2_btree_node_hash_remove(struct btree_cache *bc, struct btree *b)
256
+
{
257
+
__bch2_btree_node_hash_remove(bc, b);
258
+
__bch2_btree_node_to_freelist(bc, b);
272
259
}
273
260
274
261
int __bch2_btree_node_hash_insert(struct btree_cache *bc, struct btree *b)
275
262
{
263
+
BUG_ON(!list_empty(&b->list));
276
264
BUG_ON(b->hash_val);
277
-
b->hash_val = btree_ptr_hash_val(&b->key);
278
265
266
+
b->hash_val = btree_ptr_hash_val(&b->key);
279
267
int ret = rhashtable_lookup_insert_fast(&bc->table, &b->hash,
280
268
bch_btree_cache_params);
281
269
if (ret)
···
292
270
bool p = __btree_node_pinned(bc, b);
293
271
mod_bit(BTREE_NODE_pinned, &b->flags, p);
294
272
295
-
list_move_tail(&b->list, &bc->live[p].list);
273
+
list_add_tail(&b->list, &bc->live[p].list);
296
274
bc->live[p].nr++;
297
-
298
-
bc->nr_freeable--;
299
275
return 0;
300
276
}
301
277
···
505
485
goto out;
506
486
507
487
if (!btree_node_reclaim(c, b, true)) {
508
-
btree_node_data_free(c, b);
488
+
btree_node_data_free(bc, b);
509
489
six_unlock_write(&b->c.lock);
510
490
six_unlock_intent(&b->c.lock);
511
491
freed++;
···
521
501
bc->not_freed[BCH_BTREE_CACHE_NOT_FREED_access_bit]++;
522
502
--touched;;
523
503
} else if (!btree_node_reclaim(c, b, true)) {
524
-
bch2_btree_node_hash_remove(bc, b);
504
+
__bch2_btree_node_hash_remove(bc, b);
505
+
__btree_node_data_free(bc, b);
525
506
526
507
freed++;
527
-
btree_node_data_free(c, b);
528
508
bc->nr_freed++;
529
509
530
510
six_unlock_write(&b->c.lock);
···
607
587
BUG_ON(btree_node_read_in_flight(b) ||
608
588
btree_node_write_in_flight(b));
609
589
610
-
btree_node_data_free(c, b);
590
+
btree_node_data_free(bc, b);
611
591
}
612
592
613
593
BUG_ON(!bch2_journal_error(&c->journal) &&
···
806
786
807
787
BUG_ON(!six_trylock_intent(&b->c.lock));
808
788
BUG_ON(!six_trylock_write(&b->c.lock));
809
-
got_node:
810
789
790
+
got_node:
811
791
/*
812
792
* btree_free() doesn't free memory; it sticks the node on the end of
813
793
* the list. Check if there's any freed nodes there:
···
816
796
if (!btree_node_reclaim(c, b2, false)) {
817
797
swap(b->data, b2->data);
818
798
swap(b->aux_data, b2->aux_data);
799
+
800
+
list_del_init(&b2->list);
801
+
--bc->nr_freeable;
819
802
btree_node_to_freedlist(bc, b2);
803
+
mutex_unlock(&bc->lock);
804
+
820
805
six_unlock_write(&b2->c.lock);
821
806
six_unlock_intent(&b2->c.lock);
822
807
goto got_mem;
···
835
810
goto err;
836
811
}
837
812
838
-
mutex_lock(&bc->lock);
839
-
bc->nr_freeable++;
840
813
got_mem:
841
-
mutex_unlock(&bc->lock);
842
-
814
+
BUG_ON(!list_empty(&b->list));
843
815
BUG_ON(btree_node_hashed(b));
844
816
BUG_ON(btree_node_dirty(b));
845
817
BUG_ON(btree_node_write_in_flight(b));
···
867
845
if (bc->alloc_lock == current) {
868
846
b2 = btree_node_cannibalize(c);
869
847
clear_btree_node_just_written(b2);
870
-
bch2_btree_node_hash_remove(bc, b2);
848
+
__bch2_btree_node_hash_remove(bc, b2);
871
849
872
850
if (b) {
873
851
swap(b->data, b2->data);
···
877
855
six_unlock_intent(&b2->c.lock);
878
856
} else {
879
857
b = b2;
880
-
list_del_init(&b->list);
881
858
}
882
859
860
+
BUG_ON(!list_empty(&b->list));
883
861
mutex_unlock(&bc->lock);
884
862
885
863
trace_and_count(c, btree_cache_cannibalize, trans);
···
958
936
b->hash_val = 0;
959
937
960
938
mutex_lock(&bc->lock);
961
-
list_add(&b->list, &bc->freeable);
939
+
__bch2_btree_node_to_freelist(bc, b);
962
940
mutex_unlock(&bc->lock);
963
941
964
942
six_unlock_write(&b->c.lock);
···
1334
1312
1335
1313
b = bch2_btree_node_fill(trans, path, k, btree_id,
1336
1314
level, SIX_LOCK_read, false);
1337
-
if (!IS_ERR_OR_NULL(b))
1315
+
int ret = PTR_ERR_OR_ZERO(b);
1316
+
if (ret)
1317
+
return ret;
1318
+
if (b)
1338
1319
six_unlock_read(&b->c.lock);
1339
-
return bch2_trans_relock(trans) ?: PTR_ERR_OR_ZERO(b);
1320
+
return 0;
1340
1321
}
1341
1322
1342
1323
void bch2_btree_node_evict(struct btree_trans *trans, const struct bkey_i *k)
···
1378
1353
1379
1354
mutex_lock(&bc->lock);
1380
1355
bch2_btree_node_hash_remove(bc, b);
1381
-
btree_node_data_free(c, b);
1356
+
btree_node_data_free(bc, b);
1382
1357
mutex_unlock(&bc->lock);
1383
1358
out:
1384
1359
six_unlock_write(&b->c.lock);
+2
fs/bcachefs/btree_cache.h
+2
fs/bcachefs/btree_cache.h
···
14
14
15
15
void bch2_btree_node_to_freelist(struct bch_fs *, struct btree *);
16
16
17
+
void __bch2_btree_node_hash_remove(struct btree_cache *, struct btree *);
17
18
void bch2_btree_node_hash_remove(struct btree_cache *, struct btree *);
19
+
18
20
int __bch2_btree_node_hash_insert(struct btree_cache *, struct btree *);
19
21
int bch2_btree_node_hash_insert(struct btree_cache *, struct btree *,
20
22
unsigned, enum btree_id);
+1
-1
fs/bcachefs/btree_node_scan.c
+1
-1
fs/bcachefs/btree_node_scan.c
···
186
186
.ptrs[0].type = 1 << BCH_EXTENT_ENTRY_ptr,
187
187
.ptrs[0].offset = offset,
188
188
.ptrs[0].dev = ca->dev_idx,
189
-
.ptrs[0].gen = *bucket_gen(ca, sector_to_bucket(ca, offset)),
189
+
.ptrs[0].gen = bucket_gen_get(ca, sector_to_bucket(ca, offset)),
190
190
};
191
191
rcu_read_unlock();
192
192
+18
-12
fs/bcachefs/btree_update_interior.c
+18
-12
fs/bcachefs/btree_update_interior.c
···
237
237
BUG_ON(b->will_make_reachable);
238
238
239
239
clear_btree_node_noevict(b);
240
-
241
-
mutex_lock(&c->btree_cache.lock);
242
-
list_move(&b->list, &c->btree_cache.freeable);
243
-
mutex_unlock(&c->btree_cache.lock);
244
240
}
245
241
246
242
static void bch2_btree_node_free_inmem(struct btree_trans *trans,
···
248
252
249
253
bch2_btree_node_lock_write_nofail(trans, path, &b->c);
250
254
255
+
__btree_node_free(trans, b);
256
+
251
257
mutex_lock(&c->btree_cache.lock);
252
258
bch2_btree_node_hash_remove(&c->btree_cache, b);
253
259
mutex_unlock(&c->btree_cache.lock);
254
-
255
-
__btree_node_free(trans, b);
256
260
257
261
six_unlock_write(&b->c.lock);
258
262
mark_btree_node_locked_noreset(path, level, BTREE_NODE_INTENT_LOCKED);
···
285
289
clear_btree_node_need_write(b);
286
290
287
291
mutex_lock(&c->btree_cache.lock);
288
-
bch2_btree_node_hash_remove(&c->btree_cache, b);
292
+
__bch2_btree_node_hash_remove(&c->btree_cache, b);
289
293
mutex_unlock(&c->btree_cache.lock);
290
294
291
295
BUG_ON(p->nr >= ARRAY_SIZE(p->b));
···
517
521
btree_node_lock_nopath_nofail(trans, &b->c, SIX_LOCK_intent);
518
522
btree_node_lock_nopath_nofail(trans, &b->c, SIX_LOCK_write);
519
523
__btree_node_free(trans, b);
520
-
six_unlock_write(&b->c.lock);
521
-
six_unlock_intent(&b->c.lock);
524
+
bch2_btree_node_to_freelist(c, b);
522
525
}
523
526
}
524
527
}
···
1429
1434
}
1430
1435
}
1431
1436
1437
+
static bool key_deleted_in_insert(struct keylist *insert_keys, struct bpos pos)
1438
+
{
1439
+
if (insert_keys)
1440
+
for_each_keylist_key(insert_keys, k)
1441
+
if (bkey_deleted(&k->k) && bpos_eq(k->k.p, pos))
1442
+
return true;
1443
+
return false;
1444
+
}
1445
+
1432
1446
/*
1433
1447
* Move keys from n1 (original replacement node, now lower node) to n2 (higher
1434
1448
* node)
···
1445
1441
static void __btree_split_node(struct btree_update *as,
1446
1442
struct btree_trans *trans,
1447
1443
struct btree *b,
1448
-
struct btree *n[2])
1444
+
struct btree *n[2],
1445
+
struct keylist *insert_keys)
1449
1446
{
1450
1447
struct bkey_packed *k;
1451
1448
struct bpos n1_pos = POS_MIN;
···
1481
1476
if (b->c.level &&
1482
1477
u64s < n1_u64s &&
1483
1478
u64s + k->u64s >= n1_u64s &&
1484
-
bch2_key_deleted_in_journal(trans, b->c.btree_id, b->c.level, uk.p))
1479
+
(bch2_key_deleted_in_journal(trans, b->c.btree_id, b->c.level, uk.p) ||
1480
+
key_deleted_in_insert(insert_keys, uk.p)))
1485
1481
n1_u64s += k->u64s;
1486
1482
1487
1483
i = u64s >= n1_u64s;
···
1609
1603
n[0] = n1 = bch2_btree_node_alloc(as, trans, b->c.level);
1610
1604
n[1] = n2 = bch2_btree_node_alloc(as, trans, b->c.level);
1611
1605
1612
-
__btree_split_node(as, trans, b, n);
1606
+
__btree_split_node(as, trans, b, n, keys);
1613
1607
1614
1608
if (keys) {
1615
1609
btree_split_insert_keys(as, trans, path, n1, keys);
+11
-8
fs/bcachefs/buckets.h
+11
-8
fs/bcachefs/buckets.h
···
103
103
return gens->b + b;
104
104
}
105
105
106
-
static inline u8 bucket_gen_get(struct bch_dev *ca, size_t b)
106
+
static inline int bucket_gen_get_rcu(struct bch_dev *ca, size_t b)
107
+
{
108
+
u8 *gen = bucket_gen(ca, b);
109
+
return gen ? *gen : -1;
110
+
}
111
+
112
+
static inline int bucket_gen_get(struct bch_dev *ca, size_t b)
107
113
{
108
114
rcu_read_lock();
109
-
u8 gen = *bucket_gen(ca, b);
115
+
int ret = bucket_gen_get_rcu(ca, b);
110
116
rcu_read_unlock();
111
-
return gen;
117
+
return ret;
112
118
}
113
119
114
120
static inline size_t PTR_BUCKET_NR(const struct bch_dev *ca,
···
175
169
176
170
static inline int dev_ptr_stale_rcu(struct bch_dev *ca, const struct bch_extent_ptr *ptr)
177
171
{
178
-
u8 *gen = bucket_gen(ca, PTR_BUCKET_NR(ca, ptr));
179
-
if (!gen)
180
-
return -1;
181
-
return gen_after(*gen, ptr->gen);
172
+
int gen = bucket_gen_get_rcu(ca, PTR_BUCKET_NR(ca, ptr));
173
+
return gen < 0 ? gen : gen_after(gen, ptr->gen);
182
174
}
183
175
184
176
/**
···
188
184
rcu_read_lock();
189
185
int ret = dev_ptr_stale_rcu(ca, ptr);
190
186
rcu_read_unlock();
191
-
192
187
return ret;
193
188
}
194
189
+1
fs/bcachefs/errcode.h
+1
fs/bcachefs/errcode.h
+5
-5
fs/bcachefs/io_read.c
+5
-5
fs/bcachefs/io_read.c
···
262
262
bio_free_pages(&(*rbio)->bio);
263
263
kfree(*rbio);
264
264
*rbio = NULL;
265
-
kfree(op);
265
+
/* We may have added to the rhashtable and thus need rcu freeing: */
266
+
kfree_rcu(op, rcu);
266
267
bch2_write_ref_put(c, BCH_WRITE_REF_promote);
267
268
return ERR_PTR(ret);
268
269
}
···
803
802
PTR_BUCKET_POS(ca, &ptr),
804
803
BTREE_ITER_cached);
805
804
806
-
u8 *gen = bucket_gen(ca, iter.pos.offset);
807
-
if (gen) {
808
-
805
+
int gen = bucket_gen_get(ca, iter.pos.offset);
806
+
if (gen >= 0) {
809
807
prt_printf(&buf, "Attempting to read from stale dirty pointer:\n");
810
808
printbuf_indent_add(&buf, 2);
811
809
812
810
bch2_bkey_val_to_text(&buf, c, k);
813
811
prt_newline(&buf);
814
812
815
-
prt_printf(&buf, "memory gen: %u", *gen);
813
+
prt_printf(&buf, "memory gen: %u", gen);
816
814
817
815
ret = lockrestart_do(trans, bkey_err(k = bch2_btree_iter_peek_slot(&iter)));
818
816
if (!ret) {
+2
-5
fs/bcachefs/io_write.c
+2
-5
fs/bcachefs/io_write.c
···
1300
1300
bucket_to_u64(i->b),
1301
1301
BUCKET_NOCOW_LOCK_UPDATE);
1302
1302
1303
-
rcu_read_lock();
1304
-
u8 *gen = bucket_gen(ca, i->b.offset);
1305
-
stale = !gen ? -1 : gen_after(*gen, i->gen);
1306
-
rcu_read_unlock();
1307
-
1303
+
int gen = bucket_gen_get(ca, i->b.offset);
1304
+
stale = gen < 0 ? gen : gen_after(gen, i->gen);
1308
1305
if (unlikely(stale)) {
1309
1306
stale_at = i;
1310
1307
goto err_bucket_stale;
+2
fs/bcachefs/journal_io.c
+2
fs/bcachefs/journal_io.c
···
1012
1012
nr_bvecs = buf_pages(buf->data, sectors_read << 9);
1013
1013
1014
1014
bio = bio_kmalloc(nr_bvecs, GFP_KERNEL);
1015
+
if (!bio)
1016
+
return -BCH_ERR_ENOMEM_journal_read_bucket;
1015
1017
bio_init(bio, ca->disk_sb.bdev, bio->bi_inline_vecs, nr_bvecs, REQ_OP_READ);
1016
1018
1017
1019
bio->bi_iter.bi_sector = offset;
+2
-2
fs/bcachefs/opts.c
+2
-2
fs/bcachefs/opts.c
···
226
226
#define OPT_UINT(_min, _max) .type = BCH_OPT_UINT, \
227
227
.min = _min, .max = _max
228
228
#define OPT_STR(_choices) .type = BCH_OPT_STR, \
229
-
.min = 0, .max = ARRAY_SIZE(_choices), \
229
+
.min = 0, .max = ARRAY_SIZE(_choices) - 1, \
230
230
.choices = _choices
231
231
#define OPT_STR_NOLIMIT(_choices) .type = BCH_OPT_STR, \
232
232
.min = 0, .max = U64_MAX, \
···
428
428
prt_printf(out, "%lli", v);
429
429
break;
430
430
case BCH_OPT_STR:
431
-
if (v < opt->min || v >= opt->max - 1)
431
+
if (v < opt->min || v >= opt->max)
432
432
prt_printf(out, "(invalid option %lli)", v);
433
433
else if (flags & OPT_SHOW_FULL_LIST)
434
434
prt_string_option(out, opt->choices, v);
+7
fs/bcachefs/recovery.c
+7
fs/bcachefs/recovery.c
···
862
862
if (ret)
863
863
goto err;
864
864
865
+
/*
866
+
* Normally set by the appropriate recovery pass: when cleared, this
867
+
* indicates we're in early recovery and btree updates should be done by
868
+
* being applied to the journal replay keys. _Must_ be cleared before
869
+
* multithreaded use:
870
+
*/
871
+
set_bit(BCH_FS_may_go_rw, &c->flags);
865
872
clear_bit(BCH_FS_fsck_running, &c->flags);
866
873
867
874
/* in case we don't run journal replay, i.e. norecovery mode */
+6
fs/bcachefs/recovery_passes.c
+6
fs/bcachefs/recovery_passes.c
···
221
221
{
222
222
int ret = 0;
223
223
224
+
/*
225
+
* We can't allow set_may_go_rw to be excluded; that would cause us to
226
+
* use the journal replay keys for updates where it's not expected.
227
+
*/
228
+
c->opts.recovery_passes_exclude &= ~BCH_RECOVERY_PASS_set_may_go_rw;
229
+
224
230
while (c->curr_recovery_pass < ARRAY_SIZE(recovery_pass_fns)) {
225
231
if (c->opts.recovery_pass_last &&
226
232
c->curr_recovery_pass > c->opts.recovery_pass_last)
+5
fs/bcachefs/tests.c
+5
fs/bcachefs/tests.c
+1
-1
fs/btrfs/delayed-ref.c
+1
-1
fs/btrfs/delayed-ref.c
+1
-1
fs/btrfs/inode.c
+1
-1
fs/btrfs/inode.c
···
1618
1618
clear_bits |= EXTENT_CLEAR_DATA_RESV;
1619
1619
extent_clear_unlock_delalloc(inode, start, end, locked_folio,
1620
1620
&cached, clear_bits, page_ops);
1621
-
btrfs_qgroup_free_data(inode, NULL, start, cur_alloc_size, NULL);
1621
+
btrfs_qgroup_free_data(inode, NULL, start, end - start + 1, NULL);
1622
1622
}
1623
1623
return ret;
1624
1624
}
+5
-20
fs/btrfs/super.c
+5
-20
fs/btrfs/super.c
···
1979
1979
* fsconfig(FSCONFIG_SET_FLAG, "ro"). This option is seen by the filesystem
1980
1980
* in fc->sb_flags.
1981
1981
*
1982
-
* This disambiguation has rather positive consequences. Mounting a subvolume
1983
-
* ro will not also turn the superblock ro. Only the mount for the subvolume
1984
-
* will become ro.
1985
-
*
1986
-
* So, if the superblock creation request comes from the new mount API the
1987
-
* caller must have explicitly done:
1988
-
*
1989
-
* fsconfig(FSCONFIG_SET_FLAG, "ro")
1990
-
* fsmount/mount_setattr(MOUNT_ATTR_RDONLY)
1991
-
*
1992
-
* IOW, at some point the caller must have explicitly turned the whole
1993
-
* superblock ro and we shouldn't just undo it like we did for the old mount
1994
-
* API. In any case, it lets us avoid the hack in the new mount API.
1995
-
*
1996
-
* Consequently, the remounting hack must only be used for requests originating
1997
-
* from the old mount API and should be marked for full deprecation so it can be
1998
-
* turned off in a couple of years.
1999
-
*
2000
-
* The new mount API has no reason to support this hack.
1982
+
* But, currently the util-linux mount command already utilizes the new mount
1983
+
* API and is still setting fsconfig(FSCONFIG_SET_FLAG, "ro") no matter if it's
1984
+
* btrfs or not, setting the whole super block RO. To make per-subvolume mounting
1985
+
* work with different options work we need to keep backward compatibility.
2001
1986
*/
2002
1987
static struct vfsmount *btrfs_reconfigure_for_mount(struct fs_context *fc)
2003
1988
{
···
2004
2019
if (IS_ERR(mnt))
2005
2020
return mnt;
2006
2021
2007
-
if (!fc->oldapi || !ro2rw)
2022
+
if (!ro2rw)
2008
2023
return mnt;
2009
2024
2010
2025
/* We need to convert to rw, call reconfigure. */
+1
-2
fs/nfs/client.c
+1
-2
fs/nfs/client.c
···
181
181
#if IS_ENABLED(CONFIG_NFS_LOCALIO)
182
182
seqlock_init(&clp->cl_boot_lock);
183
183
ktime_get_real_ts64(&clp->cl_nfssvc_boot);
184
-
clp->cl_uuid.net = NULL;
185
-
clp->cl_uuid.dom = NULL;
184
+
nfs_uuid_init(&clp->cl_uuid);
186
185
spin_lock_init(&clp->cl_localio_lock);
187
186
#endif /* CONFIG_NFS_LOCALIO */
188
187
+47
-23
fs/nfs/inode.c
+47
-23
fs/nfs/inode.c
···
205
205
nfs_fscache_invalidate(inode, 0);
206
206
flags &= ~NFS_INO_REVAL_FORCED;
207
207
208
-
nfsi->cache_validity |= flags;
208
+
flags |= nfsi->cache_validity;
209
+
if (inode->i_mapping->nrpages == 0)
210
+
flags &= ~NFS_INO_INVALID_DATA;
209
211
210
-
if (inode->i_mapping->nrpages == 0) {
211
-
nfsi->cache_validity &= ~NFS_INO_INVALID_DATA;
212
-
nfs_ooo_clear(nfsi);
213
-
} else if (nfsi->cache_validity & NFS_INO_INVALID_DATA) {
212
+
/* pairs with nfs_clear_invalid_mapping()'s smp_load_acquire() */
213
+
smp_store_release(&nfsi->cache_validity, flags);
214
+
215
+
if (inode->i_mapping->nrpages == 0 ||
216
+
nfsi->cache_validity & NFS_INO_INVALID_DATA) {
214
217
nfs_ooo_clear(nfsi);
215
218
}
216
219
trace_nfs_set_cache_invalid(inode, 0);
···
631
628
}
632
629
}
633
630
631
+
static void nfs_update_timestamps(struct inode *inode, unsigned int ia_valid)
632
+
{
633
+
enum file_time_flags time_flags = 0;
634
+
unsigned int cache_flags = 0;
635
+
636
+
if (ia_valid & ATTR_MTIME) {
637
+
time_flags |= S_MTIME | S_CTIME;
638
+
cache_flags |= NFS_INO_INVALID_CTIME | NFS_INO_INVALID_MTIME;
639
+
}
640
+
if (ia_valid & ATTR_ATIME) {
641
+
time_flags |= S_ATIME;
642
+
cache_flags |= NFS_INO_INVALID_ATIME;
643
+
}
644
+
inode_update_timestamps(inode, time_flags);
645
+
NFS_I(inode)->cache_validity &= ~cache_flags;
646
+
}
647
+
634
648
void nfs_update_delegated_atime(struct inode *inode)
635
649
{
636
650
spin_lock(&inode->i_lock);
637
-
if (nfs_have_delegated_atime(inode)) {
638
-
inode_update_timestamps(inode, S_ATIME);
639
-
NFS_I(inode)->cache_validity &= ~NFS_INO_INVALID_ATIME;
640
-
}
651
+
if (nfs_have_delegated_atime(inode))
652
+
nfs_update_timestamps(inode, ATTR_ATIME);
641
653
spin_unlock(&inode->i_lock);
642
654
}
643
655
644
656
void nfs_update_delegated_mtime_locked(struct inode *inode)
645
657
{
646
-
if (nfs_have_delegated_mtime(inode)) {
647
-
inode_update_timestamps(inode, S_CTIME | S_MTIME);
648
-
NFS_I(inode)->cache_validity &= ~(NFS_INO_INVALID_CTIME |
649
-
NFS_INO_INVALID_MTIME);
650
-
}
658
+
if (nfs_have_delegated_mtime(inode))
659
+
nfs_update_timestamps(inode, ATTR_MTIME);
651
660
}
652
661
653
662
void nfs_update_delegated_mtime(struct inode *inode)
···
697
682
attr->ia_valid &= ~ATTR_SIZE;
698
683
}
699
684
700
-
if (nfs_have_delegated_mtime(inode)) {
701
-
if (attr->ia_valid & ATTR_MTIME) {
702
-
nfs_update_delegated_mtime(inode);
703
-
attr->ia_valid &= ~ATTR_MTIME;
704
-
}
705
-
if (attr->ia_valid & ATTR_ATIME) {
706
-
nfs_update_delegated_atime(inode);
707
-
attr->ia_valid &= ~ATTR_ATIME;
708
-
}
685
+
if (nfs_have_delegated_mtime(inode) && attr->ia_valid & ATTR_MTIME) {
686
+
spin_lock(&inode->i_lock);
687
+
nfs_update_timestamps(inode, attr->ia_valid);
688
+
spin_unlock(&inode->i_lock);
689
+
attr->ia_valid &= ~(ATTR_MTIME | ATTR_ATIME);
690
+
} else if (nfs_have_delegated_atime(inode) &&
691
+
attr->ia_valid & ATTR_ATIME &&
692
+
!(attr->ia_valid & ATTR_MTIME)) {
693
+
nfs_update_delegated_atime(inode);
694
+
attr->ia_valid &= ~ATTR_ATIME;
709
695
}
710
696
711
697
/* Optimization: if the end result is no change, don't RPC */
···
1424
1408
TASK_KILLABLE|TASK_FREEZABLE_UNSAFE);
1425
1409
if (ret)
1426
1410
goto out;
1411
+
smp_rmb(); /* pairs with smp_wmb() below */
1412
+
if (test_bit(NFS_INO_INVALIDATING, bitlock))
1413
+
continue;
1414
+
/* pairs with nfs_set_cache_invalid()'s smp_store_release() */
1415
+
if (!(smp_load_acquire(&nfsi->cache_validity) & NFS_INO_INVALID_DATA))
1416
+
goto out;
1417
+
/* Slow-path that double-checks with spinlock held */
1427
1418
spin_lock(&inode->i_lock);
1428
1419
if (test_bit(NFS_INO_INVALIDATING, bitlock)) {
1429
1420
spin_unlock(&inode->i_lock);
···
1656
1633
fattr->gencount = nfs_inc_attr_generation_counter();
1657
1634
fattr->owner_name = NULL;
1658
1635
fattr->group_name = NULL;
1636
+
fattr->mdsthreshold = NULL;
1659
1637
}
1660
1638
EXPORT_SYMBOL_GPL(nfs_fattr_init);
1661
1639
+2
-1
fs/nfs/localio.c
+2
-1
fs/nfs/localio.c
+4
fs/nfs/nfs4proc.c
+4
fs/nfs/nfs4proc.c
···
3452
3452
adjust_flags |= NFS_INO_INVALID_MODE;
3453
3453
if (sattr->ia_valid & (ATTR_UID | ATTR_GID))
3454
3454
adjust_flags |= NFS_INO_INVALID_OTHER;
3455
+
if (sattr->ia_valid & ATTR_ATIME)
3456
+
adjust_flags |= NFS_INO_INVALID_ATIME;
3457
+
if (sattr->ia_valid & ATTR_MTIME)
3458
+
adjust_flags |= NFS_INO_INVALID_MTIME;
3455
3459
3456
3460
do {
3457
3461
nfs4_bitmap_copy_adjust(bitmask, nfs4_bitmask(server, fattr->label),
+9
-1
fs/nfs/super.c
+9
-1
fs/nfs/super.c
···
885
885
* Now ask the mount server to map our export path
886
886
* to a file handle.
887
887
*/
888
-
status = nfs_mount(&request, ctx->timeo, ctx->retrans);
888
+
if ((request.protocol == XPRT_TRANSPORT_UDP) ==
889
+
!(ctx->flags & NFS_MOUNT_TCP))
890
+
/*
891
+
* NFS protocol and mount protocol are both UDP or neither UDP
892
+
* so timeouts are compatible. Use NFS timeouts for MOUNT
893
+
*/
894
+
status = nfs_mount(&request, ctx->timeo, ctx->retrans);
895
+
else
896
+
status = nfs_mount(&request, NFS_UNSPEC_TIMEO, NFS_UNSPEC_RETRANS);
889
897
if (status != 0) {
890
898
dfprintk(MOUNT, "NFS: unable to mount server %s, error %d\n",
891
899
request.hostname, status);
+18
-5
fs/nfs_common/nfslocalio.c
+18
-5
fs/nfs_common/nfslocalio.c
···
5
5
*/
6
6
7
7
#include <linux/module.h>
8
-
#include <linux/rculist.h>
8
+
#include <linux/list.h>
9
9
#include <linux/nfslocalio.h>
10
10
#include <net/netns/generic.h>
11
11
···
20
20
*/
21
21
static LIST_HEAD(nfs_uuids);
22
22
23
-
void nfs_uuid_begin(nfs_uuid_t *nfs_uuid)
23
+
void nfs_uuid_init(nfs_uuid_t *nfs_uuid)
24
24
{
25
25
nfs_uuid->net = NULL;
26
26
nfs_uuid->dom = NULL;
27
-
uuid_gen(&nfs_uuid->uuid);
27
+
INIT_LIST_HEAD(&nfs_uuid->list);
28
+
}
29
+
EXPORT_SYMBOL_GPL(nfs_uuid_init);
28
30
31
+
bool nfs_uuid_begin(nfs_uuid_t *nfs_uuid)
32
+
{
29
33
spin_lock(&nfs_uuid_lock);
30
-
list_add_tail_rcu(&nfs_uuid->list, &nfs_uuids);
34
+
/* Is this nfs_uuid already in use? */
35
+
if (!list_empty(&nfs_uuid->list)) {
36
+
spin_unlock(&nfs_uuid_lock);
37
+
return false;
38
+
}
39
+
uuid_gen(&nfs_uuid->uuid);
40
+
list_add_tail(&nfs_uuid->list, &nfs_uuids);
31
41
spin_unlock(&nfs_uuid_lock);
42
+
43
+
return true;
32
44
}
33
45
EXPORT_SYMBOL_GPL(nfs_uuid_begin);
34
46
···
48
36
{
49
37
if (nfs_uuid->net == NULL) {
50
38
spin_lock(&nfs_uuid_lock);
51
-
list_del_init(&nfs_uuid->list);
39
+
if (nfs_uuid->net == NULL)
40
+
list_del_init(&nfs_uuid->list);
52
41
spin_unlock(&nfs_uuid_lock);
53
42
}
54
43
}
+5
-8
fs/nfsd/vfs.c
+5
-8
fs/nfsd/vfs.c
···
903
903
goto out;
904
904
}
905
905
906
-
if (may_flags & NFSD_MAY_64BIT_COOKIE)
907
-
file->f_mode |= FMODE_64BITHASH;
908
-
else
909
-
file->f_mode |= FMODE_32BITHASH;
910
-
911
906
*filp = file;
912
907
out:
913
908
return host_err;
···
2169
2174
loff_t offset = *offsetp;
2170
2175
int may_flags = NFSD_MAY_READ;
2171
2176
2172
-
if (fhp->fh_64bit_cookies)
2173
-
may_flags |= NFSD_MAY_64BIT_COOKIE;
2174
-
2175
2177
err = nfsd_open(rqstp, fhp, S_IFDIR, may_flags, &file);
2176
2178
if (err)
2177
2179
goto out;
2180
+
2181
+
if (fhp->fh_64bit_cookies)
2182
+
file->f_mode |= FMODE_64BITHASH;
2183
+
else
2184
+
file->f_mode |= FMODE_32BITHASH;
2178
2185
2179
2186
offset = vfs_llseek(file, offset, SEEK_SET);
2180
2187
if (offset < 0) {
+1
-2
fs/ocfs2/xattr.c
+1
-2
fs/ocfs2/xattr.c
+1
-1
fs/proc/softirqs.c
+1
-1
fs/proc/softirqs.c
···
20
20
for (i = 0; i < NR_SOFTIRQS; i++) {
21
21
seq_printf(p, "%12s:", softirq_to_name[i]);
22
22
for_each_possible_cpu(j)
23
-
seq_printf(p, " %10u", kstat_softirqs_cpu(i, j));
23
+
seq_put_decimal_ull_width(p, " ", kstat_softirqs_cpu(i, j), 10);
24
24
seq_putc(p, '\n');
25
25
}
26
26
return 0;
+5
-4
fs/proc/vmcore.c
+5
-4
fs/proc/vmcore.c
···
457
457
#endif
458
458
}
459
459
460
-
static const struct vm_operations_struct vmcore_mmap_ops = {
461
-
.fault = mmap_vmcore_fault,
462
-
};
463
-
464
460
/**
465
461
* vmcore_alloc_buf - allocate buffer in vmalloc memory
466
462
* @size: size of buffer
···
484
488
* virtually contiguous user-space in ELF layout.
485
489
*/
486
490
#ifdef CONFIG_MMU
491
+
492
+
static const struct vm_operations_struct vmcore_mmap_ops = {
493
+
.fault = mmap_vmcore_fault,
494
+
};
495
+
487
496
/*
488
497
* remap_oldmem_pfn_checked - do remap_oldmem_pfn_range replacing all pages
489
498
* reported as not being ram with the zero page.
+11
-3
fs/smb/client/connect.c
+11
-3
fs/smb/client/connect.c
···
1037
1037
*/
1038
1038
}
1039
1039
1040
+
put_net(cifs_net_ns(server));
1040
1041
kfree(server->leaf_fullpath);
1041
1042
kfree(server);
1042
1043
···
1635
1634
1636
1635
/* srv_count can never go negative */
1637
1636
WARN_ON(server->srv_count < 0);
1638
-
1639
-
put_net(cifs_net_ns(server));
1640
1637
1641
1638
list_del_init(&server->tcp_ses_list);
1642
1639
spin_unlock(&cifs_tcp_ses_lock);
···
3069
3070
if (server->ssocket) {
3070
3071
socket = server->ssocket;
3071
3072
} else {
3072
-
rc = __sock_create(cifs_net_ns(server), sfamily, SOCK_STREAM,
3073
+
struct net *net = cifs_net_ns(server);
3074
+
struct sock *sk;
3075
+
3076
+
rc = __sock_create(net, sfamily, SOCK_STREAM,
3073
3077
IPPROTO_TCP, &server->ssocket, 1);
3074
3078
if (rc < 0) {
3075
3079
cifs_server_dbg(VFS, "Error %d creating socket\n", rc);
3076
3080
return rc;
3077
3081
}
3082
+
3083
+
sk = server->ssocket->sk;
3084
+
__netns_tracker_free(net, &sk->ns_tracker, false);
3085
+
sk->sk_net_refcnt = 1;
3086
+
get_net_track(net, &sk->ns_tracker, GFP_KERNEL);
3087
+
sock_inuse_add(net, 1);
3078
3088
3079
3089
/* BB other socket options to set KEEPALIVE, NODELAY? */
3080
3090
cifs_dbg(FYI, "Socket created\n");
+1
fs/smb/server/connection.c
+1
fs/smb/server/connection.c
+1
fs/smb/server/connection.h
+1
fs/smb/server/connection.h
+10
-5
fs/smb/server/mgmt/user_session.c
+10
-5
fs/smb/server/mgmt/user_session.c
···
90
90
91
91
int ksmbd_session_rpc_open(struct ksmbd_session *sess, char *rpc_name)
92
92
{
93
-
struct ksmbd_session_rpc *entry;
93
+
struct ksmbd_session_rpc *entry, *old;
94
94
struct ksmbd_rpc_command *resp;
95
95
int method;
96
96
···
106
106
entry->id = ksmbd_ipc_id_alloc();
107
107
if (entry->id < 0)
108
108
goto free_entry;
109
-
xa_store(&sess->rpc_handle_list, entry->id, entry, GFP_KERNEL);
109
+
old = xa_store(&sess->rpc_handle_list, entry->id, entry, GFP_KERNEL);
110
+
if (xa_is_err(old))
111
+
goto free_id;
110
112
111
113
resp = ksmbd_rpc_open(sess, entry->id);
112
114
if (!resp)
113
-
goto free_id;
115
+
goto erase_xa;
114
116
115
117
kvfree(resp);
116
118
return entry->id;
117
-
free_id:
119
+
erase_xa:
118
120
xa_erase(&sess->rpc_handle_list, entry->id);
121
+
free_id:
119
122
ksmbd_rpc_id_free(entry->id);
120
123
free_entry:
121
124
kfree(entry);
···
178
175
unsigned long id;
179
176
struct ksmbd_session *sess;
180
177
178
+
down_write(&sessions_table_lock);
181
179
down_write(&conn->session_lock);
182
180
xa_for_each(&conn->sessions, id, sess) {
183
181
if (atomic_read(&sess->refcnt) == 0 &&
···
192
188
}
193
189
}
194
190
up_write(&conn->session_lock);
191
+
up_write(&sessions_table_lock);
195
192
}
196
193
197
194
int ksmbd_session_register(struct ksmbd_conn *conn,
···
234
229
}
235
230
}
236
231
}
237
-
up_write(&sessions_table_lock);
238
232
239
233
down_write(&conn->session_lock);
240
234
xa_for_each(&conn->sessions, id, sess) {
···
253
249
}
254
250
}
255
251
up_write(&conn->session_lock);
252
+
up_write(&sessions_table_lock);
256
253
}
257
254
258
255
struct ksmbd_session *ksmbd_session_lookup(struct ksmbd_conn *conn,
+12
-8
fs/smb/server/server.c
+12
-8
fs/smb/server/server.c
···
238
238
} while (is_chained == true);
239
239
240
240
send:
241
-
if (work->sess)
242
-
ksmbd_user_session_put(work->sess);
243
241
if (work->tcon)
244
242
ksmbd_tree_connect_put(work->tcon);
245
243
smb3_preauth_hash_rsp(work);
244
+
if (work->sess)
245
+
ksmbd_user_session_put(work->sess);
246
246
if (work->sess && work->sess->enc && work->encrypted &&
247
247
conn->ops->encrypt_resp) {
248
248
rc = conn->ops->encrypt_resp(work);
···
270
270
271
271
ksmbd_conn_try_dequeue_request(work);
272
272
ksmbd_free_work_struct(work);
273
+
atomic_dec(&conn->mux_smb_requests);
273
274
/*
274
275
* Checking waitqueue to dropping pending requests on
275
276
* disconnection. waitqueue_active is safe because it
···
292
291
struct ksmbd_work *work;
293
292
int err;
294
293
294
+
err = ksmbd_init_smb_server(conn);
295
+
if (err)
296
+
return 0;
297
+
298
+
if (atomic_inc_return(&conn->mux_smb_requests) >= conn->vals->max_credits) {
299
+
atomic_dec_return(&conn->mux_smb_requests);
300
+
return -ENOSPC;
301
+
}
302
+
295
303
work = ksmbd_alloc_work_struct();
296
304
if (!work) {
297
305
pr_err("allocation for work failed\n");
···
310
300
work->conn = conn;
311
301
work->request_buf = conn->request_buf;
312
302
conn->request_buf = NULL;
313
-
314
-
err = ksmbd_init_smb_server(work);
315
-
if (err) {
316
-
ksmbd_free_work_struct(work);
317
-
return 0;
318
-
}
319
303
320
304
ksmbd_conn_enqueue_request(work);
321
305
atomic_inc(&conn->r_count);
+7
-3
fs/smb/server/smb_common.c
+7
-3
fs/smb/server/smb_common.c
···
388
388
.set_rsp_status = set_smb1_rsp_status,
389
389
};
390
390
391
+
static struct smb_version_values smb1_server_values = {
392
+
.max_credits = SMB2_MAX_CREDITS,
393
+
};
394
+
391
395
static int smb1_negotiate(struct ksmbd_work *work)
392
396
{
393
397
return ksmbd_smb_negotiate_common(work, SMB_COM_NEGOTIATE);
···
403
399
404
400
static int init_smb1_server(struct ksmbd_conn *conn)
405
401
{
402
+
conn->vals = &smb1_server_values;
406
403
conn->ops = &smb1_server_ops;
407
404
conn->cmds = smb1_server_cmds;
408
405
conn->max_cmds = ARRAY_SIZE(smb1_server_cmds);
409
406
return 0;
410
407
}
411
408
412
-
int ksmbd_init_smb_server(struct ksmbd_work *work)
409
+
int ksmbd_init_smb_server(struct ksmbd_conn *conn)
413
410
{
414
-
struct ksmbd_conn *conn = work->conn;
415
411
__le32 proto;
416
412
417
-
proto = *(__le32 *)((struct smb_hdr *)work->request_buf)->Protocol;
413
+
proto = *(__le32 *)((struct smb_hdr *)conn->request_buf)->Protocol;
418
414
if (conn->need_neg == false) {
419
415
if (proto == SMB1_PROTO_NUMBER)
420
416
return -EINVAL;
+1
-1
fs/smb/server/smb_common.h
+1
-1
fs/smb/server/smb_common.h
···
427
427
428
428
int ksmbd_lookup_dialect_by_id(__le16 *cli_dialects, __le16 dialects_count);
429
429
430
-
int ksmbd_init_smb_server(struct ksmbd_work *work);
430
+
int ksmbd_init_smb_server(struct ksmbd_conn *conn);
431
431
432
432
struct ksmbd_kstat;
433
433
int ksmbd_populate_dot_dotdot_entries(struct ksmbd_work *work,
+9
-3
fs/tracefs/inode.c
+9
-3
fs/tracefs/inode.c
···
392
392
struct tracefs_fs_info *sb_opts = sb->s_fs_info;
393
393
struct tracefs_fs_info *new_opts = fc->s_fs_info;
394
394
395
+
if (!new_opts)
396
+
return 0;
397
+
395
398
sync_filesystem(sb);
396
399
/* structure copy of new mount options to sb */
397
400
*sb_opts = *new_opts;
···
481
478
sb->s_op = &tracefs_super_operations;
482
479
sb->s_d_op = &tracefs_dentry_operations;
483
480
484
-
tracefs_apply_options(sb, false);
485
-
486
481
return 0;
487
482
}
488
483
489
484
static int tracefs_get_tree(struct fs_context *fc)
490
485
{
491
-
return get_tree_single(fc, tracefs_fill_super);
486
+
int err = get_tree_single(fc, tracefs_fill_super);
487
+
488
+
if (err)
489
+
return err;
490
+
491
+
return tracefs_reconfigure(fc);
492
492
}
493
493
494
494
static void tracefs_free_fc(struct fs_context *fc)
+2
include/acpi/processor.h
+2
include/acpi/processor.h
-4
include/linux/arch_topology.h
-4
include/linux/arch_topology.h
···
11
11
void topology_normalize_cpu_scale(void);
12
12
int topology_update_cpu_topology(void);
13
13
14
-
#ifdef CONFIG_ACPI_CPPC_LIB
15
-
void topology_init_cpu_capacity_cppc(void);
16
-
#endif
17
-
18
14
struct device_node;
19
15
bool topology_parse_cpu_capacity(struct device_node *cpu_node, int cpu);
20
16
+3
-29
include/linux/arm-smccc.h
+3
-29
include/linux/arm-smccc.h
···
315
315
316
316
void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
317
317
318
-
extern u64 smccc_has_sve_hint;
319
-
320
318
/**
321
319
* arm_smccc_get_soc_id_version()
322
320
*
···
413
415
};
414
416
415
417
/**
416
-
* __arm_smccc_sve_check() - Set the SVE hint bit when doing SMC calls
417
-
*
418
-
* Sets the SMCCC hint bit to indicate if there is live state in the SVE
419
-
* registers, this modifies x0 in place and should never be called from C
420
-
* code.
421
-
*/
422
-
asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0);
423
-
424
-
/**
425
418
* __arm_smccc_smc() - make SMC calls
426
419
* @a0-a7: arguments passed in registers 0 to 7
427
420
* @res: result values from registers 0 to 3
···
476
487
477
488
#define SMCCC_SMC_INST __SMC(0)
478
489
#define SMCCC_HVC_INST __HVC(0)
479
-
480
-
#endif
481
-
482
-
/* nVHE hypervisor doesn't have a current thread so needs separate checks */
483
-
#if defined(CONFIG_ARM64_SVE) && !defined(__KVM_NVHE_HYPERVISOR__)
484
-
485
-
#define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \
486
-
ARM64_SVE)
487
-
#define smccc_sve_clobbers "x16", "x30", "cc",
488
-
489
-
#else
490
-
491
-
#define SMCCC_SVE_CHECK
492
-
#define smccc_sve_clobbers
493
490
494
491
#endif
495
492
···
549
574
register unsigned long r3 asm("r3"); \
550
575
CONCATENATE(__declare_arg_, \
551
576
COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
552
-
asm volatile(SMCCC_SVE_CHECK \
553
-
inst "\n" : \
577
+
asm volatile(inst "\n" : \
554
578
"=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
555
579
: CONCATENATE(__constraint_read_, \
556
580
COUNT_ARGS(__VA_ARGS__)) \
557
-
: smccc_sve_clobbers "memory"); \
581
+
: "memory"); \
558
582
if (___res) \
559
583
*___res = (typeof(*___res)){r0, r1, r2, r3}; \
560
584
} while (0)
···
602
628
asm ("" : \
603
629
: CONCATENATE(__constraint_read_, \
604
630
COUNT_ARGS(__VA_ARGS__)) \
605
-
: smccc_sve_clobbers "memory"); \
631
+
: "memory"); \
606
632
if (___res) \
607
633
___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
608
634
} while (0)
+22
-6
include/linux/mman.h
+22
-6
include/linux/mman.h
···
2
2
#ifndef _LINUX_MMAN_H
3
3
#define _LINUX_MMAN_H
4
4
5
+
#include <linux/fs.h>
5
6
#include <linux/mm.h>
6
7
#include <linux/percpu_counter.h>
7
8
···
95
94
#endif
96
95
97
96
#ifndef arch_calc_vm_flag_bits
98
-
#define arch_calc_vm_flag_bits(flags) 0
97
+
#define arch_calc_vm_flag_bits(file, flags) 0
99
98
#endif
100
99
101
100
#ifndef arch_validate_prot
···
152
151
* Combine the mmap "flags" argument into "vm_flags" used internally.
153
152
*/
154
153
static inline unsigned long
155
-
calc_vm_flag_bits(unsigned long flags)
154
+
calc_vm_flag_bits(struct file *file, unsigned long flags)
156
155
{
157
156
return _calc_vm_trans(flags, MAP_GROWSDOWN, VM_GROWSDOWN ) |
158
157
_calc_vm_trans(flags, MAP_LOCKED, VM_LOCKED ) |
159
158
_calc_vm_trans(flags, MAP_SYNC, VM_SYNC ) |
160
159
_calc_vm_trans(flags, MAP_STACK, VM_NOHUGEPAGE) |
161
-
arch_calc_vm_flag_bits(flags);
160
+
arch_calc_vm_flag_bits(file, flags);
162
161
}
163
162
164
163
unsigned long vm_commit_limit(void);
···
189
188
*
190
189
* d) mmap(PROT_READ | PROT_EXEC)
191
190
* mmap(PROT_READ | PROT_EXEC | PROT_BTI)
191
+
*
192
+
* This is only applicable if the user has set the Memory-Deny-Write-Execute
193
+
* (MDWE) protection mask for the current process.
194
+
*
195
+
* @old specifies the VMA flags the VMA originally possessed, and @new the ones
196
+
* we propose to set.
197
+
*
198
+
* Return: false if proposed change is OK, true if not ok and should be denied.
192
199
*/
193
-
static inline bool map_deny_write_exec(struct vm_area_struct *vma, unsigned long vm_flags)
200
+
static inline bool map_deny_write_exec(unsigned long old, unsigned long new)
194
201
{
202
+
/* If MDWE is disabled, we have nothing to deny. */
195
203
if (!test_bit(MMF_HAS_MDWE, ¤t->mm->flags))
196
204
return false;
197
205
198
-
if ((vm_flags & VM_EXEC) && (vm_flags & VM_WRITE))
206
+
/* If the new VMA is not executable, we have nothing to deny. */
207
+
if (!(new & VM_EXEC))
208
+
return false;
209
+
210
+
/* Under MDWE we do not accept newly writably executable VMAs... */
211
+
if (new & VM_WRITE)
199
212
return true;
200
213
201
-
if (!(vma->vm_flags & VM_EXEC) && (vm_flags & VM_EXEC))
214
+
/* ...nor previously non-executable VMAs becoming executable. */
215
+
if (!(old & VM_EXEC))
202
216
return true;
203
217
204
218
return false;
+1
include/linux/mmzone.h
+1
include/linux/mmzone.h
+2
-1
include/linux/nfslocalio.h
+2
-1
include/linux/nfslocalio.h
···
32
32
struct auth_domain *dom; /* auth_domain for localio */
33
33
} nfs_uuid_t;
34
34
35
-
void nfs_uuid_begin(nfs_uuid_t *);
35
+
void nfs_uuid_init(nfs_uuid_t *);
36
+
bool nfs_uuid_begin(nfs_uuid_t *);
36
37
void nfs_uuid_end(nfs_uuid_t *);
37
38
void nfs_uuid_is_local(const uuid_t *, struct list_head *,
38
39
struct net *, struct auth_domain *, struct module *);
+2
include/linux/soc/qcom/llcc-qcom.h
+2
include/linux/soc/qcom/llcc-qcom.h
···
125
125
* @num_banks: Number of llcc banks
126
126
* @bitmap: Bit map to track the active slice ids
127
127
* @ecc_irq: interrupt for llcc cache error detection and reporting
128
+
* @ecc_irq_configured: 'True' if firmware has already configured the irq propagation
128
129
* @version: Indicates the LLCC version
129
130
*/
130
131
struct llcc_drv_data {
···
140
139
u32 num_banks;
141
140
unsigned long *bitmap;
142
141
int ecc_irq;
142
+
bool ecc_irq_configured;
143
143
u32 version;
144
144
};
145
145
+2
-1
include/linux/user_namespace.h
+2
-1
include/linux/user_namespace.h
···
141
141
142
142
long inc_rlimit_ucounts(struct ucounts *ucounts, enum rlimit_type type, long v);
143
143
bool dec_rlimit_ucounts(struct ucounts *ucounts, enum rlimit_type type, long v);
144
-
long inc_rlimit_get_ucounts(struct ucounts *ucounts, enum rlimit_type type);
144
+
long inc_rlimit_get_ucounts(struct ucounts *ucounts, enum rlimit_type type,
145
+
bool override_rlimit);
145
146
void dec_rlimit_put_ucounts(struct ucounts *ucounts, enum rlimit_type type);
146
147
bool is_rlimit_overlimit(struct ucounts *ucounts, enum rlimit_type type, unsigned long max);
147
148
+4
include/net/netfilter/nf_tables.h
+4
include/net/netfilter/nf_tables.h
···
1103
1103
* @name: name of the chain
1104
1104
* @udlen: user data length
1105
1105
* @udata: user data in the chain
1106
+
* @rcu_head: rcu head for deferred release
1106
1107
* @blob_next: rule blob pointer to the next in the chain
1107
1108
*/
1108
1109
struct nft_chain {
···
1121
1120
char *name;
1122
1121
u16 udlen;
1123
1122
u8 *udata;
1123
+
struct rcu_head rcu_head;
1124
1124
1125
1125
/* Only used during control plane commit phase: */
1126
1126
struct nft_rule_blob *blob_next;
···
1265
1263
* @sets: sets in the table
1266
1264
* @objects: stateful objects in the table
1267
1265
* @flowtables: flow tables in the table
1266
+
* @net: netnamespace this table belongs to
1268
1267
* @hgenerator: handle generator state
1269
1268
* @handle: table handle
1270
1269
* @use: number of chain references to this table
···
1285
1282
struct list_head sets;
1286
1283
struct list_head objects;
1287
1284
struct list_head flowtables;
1285
+
possible_net_t net;
1288
1286
u64 hgenerator;
1289
1287
u64 handle;
1290
1288
u32 use;
+1
include/trace/events/rxrpc.h
+1
include/trace/events/rxrpc.h
···
287
287
EM(rxrpc_call_see_input, "SEE input ") \
288
288
EM(rxrpc_call_see_release, "SEE release ") \
289
289
EM(rxrpc_call_see_userid_exists, "SEE u-exists") \
290
+
EM(rxrpc_call_see_waiting_call, "SEE q-conn ") \
290
291
E_(rxrpc_call_see_zap, "SEE zap ")
291
292
292
293
#define rxrpc_txqueue_traces \
+2
-1
kernel/signal.c
+2
-1
kernel/signal.c
···
419
419
*/
420
420
rcu_read_lock();
421
421
ucounts = task_ucounts(t);
422
-
sigpending = inc_rlimit_get_ucounts(ucounts, UCOUNT_RLIMIT_SIGPENDING);
422
+
sigpending = inc_rlimit_get_ucounts(ucounts, UCOUNT_RLIMIT_SIGPENDING,
423
+
override_rlimit);
423
424
rcu_read_unlock();
424
425
if (!sigpending)
425
426
return NULL;
+4
kernel/trace/trace.c
+4
kernel/trace/trace.c
···
5501
5501
5502
5502
static const char readme_msg[] =
5503
5503
"tracing mini-HOWTO:\n\n"
5504
+
"By default tracefs removes all OTH file permission bits.\n"
5505
+
"When mounting tracefs an optional group id can be specified\n"
5506
+
"which adds the group to every directory and file in tracefs:\n\n"
5507
+
"\t e.g. mount -t tracefs [-o [gid=<gid>]] nodev /sys/kernel/tracing\n\n"
5504
5508
"# echo 0 > tracing_on : quick way to disable tracing\n"
5505
5509
"# echo 1 > tracing_on : quick way to re-enable tracing\n\n"
5506
5510
" Important files:\n"
+5
-4
kernel/ucount.c
+5
-4
kernel/ucount.c
···
307
307
do_dec_rlimit_put_ucounts(ucounts, NULL, type);
308
308
}
309
309
310
-
long inc_rlimit_get_ucounts(struct ucounts *ucounts, enum rlimit_type type)
310
+
long inc_rlimit_get_ucounts(struct ucounts *ucounts, enum rlimit_type type,
311
+
bool override_rlimit)
311
312
{
312
313
/* Caller must hold a reference to ucounts */
313
314
struct ucounts *iter;
···
318
317
for (iter = ucounts; iter; iter = iter->ns->ucounts) {
319
318
long new = atomic_long_add_return(1, &iter->rlimit[type]);
320
319
if (new < 0 || new > max)
321
-
goto unwind;
320
+
goto dec_unwind;
322
321
if (iter == ucounts)
323
322
ret = new;
324
-
max = get_userns_rlimit_max(iter->ns, type);
323
+
if (!override_rlimit)
324
+
max = get_userns_rlimit_max(iter->ns, type);
325
325
/*
326
326
* Grab an extra ucount reference for the caller when
327
327
* the rlimit count was previously 0.
···
336
334
dec_unwind:
337
335
dec = atomic_long_sub_return(1, &iter->rlimit[type]);
338
336
WARN_ON_ONCE(dec < 0);
339
-
unwind:
340
337
do_dec_rlimit_put_ucounts(ucounts, iter, type);
341
338
return 0;
342
339
}
+12
-6
lib/objpool.c
+12
-6
lib/objpool.c
···
74
74
* warm caches and TLB hits. in default vmalloc is used to
75
75
* reduce the pressure of kernel slab system. as we know,
76
76
* mimimal size of vmalloc is one page since vmalloc would
77
-
* always align the requested size to page size
77
+
* always align the requested size to page size.
78
+
* but if vmalloc fails or it is not available (e.g. GFP_ATOMIC)
79
+
* allocate percpu slot with kmalloc.
78
80
*/
79
-
if ((pool->gfp & GFP_ATOMIC) == GFP_ATOMIC)
80
-
slot = kmalloc_node(size, pool->gfp, cpu_to_node(i));
81
-
else
81
+
slot = NULL;
82
+
83
+
if ((pool->gfp & (GFP_ATOMIC | GFP_KERNEL)) != GFP_ATOMIC)
82
84
slot = __vmalloc_node(size, sizeof(void *), pool->gfp,
83
85
cpu_to_node(i), __builtin_return_address(0));
84
-
if (!slot)
85
-
return -ENOMEM;
86
+
87
+
if (!slot) {
88
+
slot = kmalloc_node(size, pool->gfp, cpu_to_node(i));
89
+
if (!slot)
90
+
return -ENOMEM;
91
+
}
86
92
memset(slot, 0, size);
87
93
pool->cpu_slots[i] = slot;
88
94
+28
-14
mm/damon/core.c
+28
-14
mm/damon/core.c
···
1412
1412
damon_for_each_scheme(s, c) {
1413
1413
struct damos_quota *quota = &s->quota;
1414
1414
1415
-
if (c->passed_sample_intervals != s->next_apply_sis)
1415
+
if (c->passed_sample_intervals < s->next_apply_sis)
1416
1416
continue;
1417
1417
1418
1418
if (!s->wmarks.activated)
···
1456
1456
unsigned long score)
1457
1457
{
1458
1458
const unsigned long goal = 10000;
1459
-
unsigned long score_goal_diff = max(goal, score) - min(goal, score);
1460
-
unsigned long score_goal_diff_bp = score_goal_diff * 10000 / goal;
1461
-
unsigned long compensation = last_input * score_goal_diff_bp / 10000;
1462
1459
/* Set minimum input as 10000 to avoid compensation be zero */
1463
1460
const unsigned long min_input = 10000;
1461
+
unsigned long score_goal_diff, compensation;
1462
+
bool over_achieving = score > goal;
1464
1463
1465
-
if (goal > score)
1464
+
if (score == goal)
1465
+
return last_input;
1466
+
if (score >= goal * 2)
1467
+
return min_input;
1468
+
1469
+
if (over_achieving)
1470
+
score_goal_diff = score - goal;
1471
+
else
1472
+
score_goal_diff = goal - score;
1473
+
1474
+
if (last_input < ULONG_MAX / score_goal_diff)
1475
+
compensation = last_input * score_goal_diff / goal;
1476
+
else
1477
+
compensation = last_input / goal * score_goal_diff;
1478
+
1479
+
if (over_achieving)
1480
+
return max(last_input - compensation, min_input);
1481
+
if (last_input < ULONG_MAX - compensation)
1466
1482
return last_input + compensation;
1467
-
if (last_input > compensation + min_input)
1468
-
return last_input - compensation;
1469
-
return min_input;
1483
+
return ULONG_MAX;
1470
1484
}
1471
1485
1472
1486
#ifdef CONFIG_PSI
···
1636
1622
bool has_schemes_to_apply = false;
1637
1623
1638
1624
damon_for_each_scheme(s, c) {
1639
-
if (c->passed_sample_intervals != s->next_apply_sis)
1625
+
if (c->passed_sample_intervals < s->next_apply_sis)
1640
1626
continue;
1641
1627
1642
1628
if (!s->wmarks.activated)
···
1656
1642
}
1657
1643
1658
1644
damon_for_each_scheme(s, c) {
1659
-
if (c->passed_sample_intervals != s->next_apply_sis)
1645
+
if (c->passed_sample_intervals < s->next_apply_sis)
1660
1646
continue;
1661
-
s->next_apply_sis +=
1647
+
s->next_apply_sis = c->passed_sample_intervals +
1662
1648
(s->apply_interval_us ? s->apply_interval_us :
1663
1649
c->attrs.aggr_interval) / sample_interval;
1664
1650
}
···
2014
2000
if (ctx->ops.check_accesses)
2015
2001
max_nr_accesses = ctx->ops.check_accesses(ctx);
2016
2002
2017
-
if (ctx->passed_sample_intervals == next_aggregation_sis) {
2003
+
if (ctx->passed_sample_intervals >= next_aggregation_sis) {
2018
2004
kdamond_merge_regions(ctx,
2019
2005
max_nr_accesses / 10,
2020
2006
sz_limit);
···
2032
2018
2033
2019
sample_interval = ctx->attrs.sample_interval ?
2034
2020
ctx->attrs.sample_interval : 1;
2035
-
if (ctx->passed_sample_intervals == next_aggregation_sis) {
2021
+
if (ctx->passed_sample_intervals >= next_aggregation_sis) {
2036
2022
ctx->next_aggregation_sis = next_aggregation_sis +
2037
2023
ctx->attrs.aggr_interval / sample_interval;
2038
2024
···
2042
2028
ctx->ops.reset_aggregated(ctx);
2043
2029
}
2044
2030
2045
-
if (ctx->passed_sample_intervals == next_ops_update_sis) {
2031
+
if (ctx->passed_sample_intervals >= next_ops_update_sis) {
2046
2032
ctx->next_ops_update_sis = next_ops_update_sis +
2047
2033
ctx->attrs.ops_update_interval /
2048
2034
sample_interval;
+1
-1
mm/filemap.c
+1
-1
mm/filemap.c
+43
-13
mm/huge_memory.c
+43
-13
mm/huge_memory.c
···
3588
3588
return split_huge_page_to_list_to_order(&folio->page, list, ret);
3589
3589
}
3590
3590
3591
-
void __folio_undo_large_rmappable(struct folio *folio)
3591
+
/*
3592
+
* __folio_unqueue_deferred_split() is not to be called directly:
3593
+
* the folio_unqueue_deferred_split() inline wrapper in mm/internal.h
3594
+
* limits its calls to those folios which may have a _deferred_list for
3595
+
* queueing THP splits, and that list is (racily observed to be) non-empty.
3596
+
*
3597
+
* It is unsafe to call folio_unqueue_deferred_split() until folio refcount is
3598
+
* zero: because even when split_queue_lock is held, a non-empty _deferred_list
3599
+
* might be in use on deferred_split_scan()'s unlocked on-stack list.
3600
+
*
3601
+
* If memory cgroups are enabled, split_queue_lock is in the mem_cgroup: it is
3602
+
* therefore important to unqueue deferred split before changing folio memcg.
3603
+
*/
3604
+
bool __folio_unqueue_deferred_split(struct folio *folio)
3592
3605
{
3593
3606
struct deferred_split *ds_queue;
3594
3607
unsigned long flags;
3608
+
bool unqueued = false;
3609
+
3610
+
WARN_ON_ONCE(folio_ref_count(folio));
3611
+
WARN_ON_ONCE(!mem_cgroup_disabled() && !folio_memcg(folio));
3595
3612
3596
3613
ds_queue = get_deferred_split_queue(folio);
3597
3614
spin_lock_irqsave(&ds_queue->split_queue_lock, flags);
···
3620
3603
MTHP_STAT_NR_ANON_PARTIALLY_MAPPED, -1);
3621
3604
}
3622
3605
list_del_init(&folio->_deferred_list);
3606
+
unqueued = true;
3623
3607
}
3624
3608
spin_unlock_irqrestore(&ds_queue->split_queue_lock, flags);
3609
+
3610
+
return unqueued; /* useful for debug warnings */
3625
3611
}
3626
3612
3627
3613
/* partially_mapped=false won't clear PG_partially_mapped folio flag */
···
3647
3627
return;
3648
3628
3649
3629
/*
3650
-
* The try_to_unmap() in page reclaim path might reach here too,
3651
-
* this may cause a race condition to corrupt deferred split queue.
3652
-
* And, if page reclaim is already handling the same folio, it is
3653
-
* unnecessary to handle it again in shrinker.
3654
-
*
3655
-
* Check the swapcache flag to determine if the folio is being
3656
-
* handled by page reclaim since THP swap would add the folio into
3657
-
* swap cache before calling try_to_unmap().
3630
+
* Exclude swapcache: originally to avoid a corrupt deferred split
3631
+
* queue. Nowadays that is fully prevented by mem_cgroup_swapout();
3632
+
* but if page reclaim is already handling the same folio, it is
3633
+
* unnecessary to handle it again in the shrinker, so excluding
3634
+
* swapcache here may still be a useful optimization.
3658
3635
*/
3659
3636
if (folio_test_swapcache(folio))
3660
3637
return;
···
3735
3718
struct deferred_split *ds_queue = &pgdata->deferred_split_queue;
3736
3719
unsigned long flags;
3737
3720
LIST_HEAD(list);
3738
-
struct folio *folio, *next;
3739
-
int split = 0;
3721
+
struct folio *folio, *next, *prev = NULL;
3722
+
int split = 0, removed = 0;
3740
3723
3741
3724
#ifdef CONFIG_MEMCG
3742
3725
if (sc->memcg)
···
3792
3775
*/
3793
3776
if (!did_split && !folio_test_partially_mapped(folio)) {
3794
3777
list_del_init(&folio->_deferred_list);
3795
-
ds_queue->split_queue_len--;
3778
+
removed++;
3779
+
} else {
3780
+
/*
3781
+
* That unlocked list_del_init() above would be unsafe,
3782
+
* unless its folio is separated from any earlier folios
3783
+
* left on the list (which may be concurrently unqueued)
3784
+
* by one safe folio with refcount still raised.
3785
+
*/
3786
+
swap(folio, prev);
3796
3787
}
3797
-
folio_put(folio);
3788
+
if (folio)
3789
+
folio_put(folio);
3798
3790
}
3799
3791
3800
3792
spin_lock_irqsave(&ds_queue->split_queue_lock, flags);
3801
3793
list_splice_tail(&list, &ds_queue->split_queue);
3794
+
ds_queue->split_queue_len -= removed;
3802
3795
spin_unlock_irqrestore(&ds_queue->split_queue_lock, flags);
3796
+
3797
+
if (prev)
3798
+
folio_put(prev);
3803
3799
3804
3800
/*
3805
3801
* Stop shrinker if we didn't split any page, but the queue is empty.
+50
-5
mm/internal.h
+50
-5
mm/internal.h
···
108
108
return (void *)(mapping & ~PAGE_MAPPING_FLAGS);
109
109
}
110
110
111
+
/*
112
+
* This is a file-backed mapping, and is about to be memory mapped - invoke its
113
+
* mmap hook and safely handle error conditions. On error, VMA hooks will be
114
+
* mutated.
115
+
*
116
+
* @file: File which backs the mapping.
117
+
* @vma: VMA which we are mapping.
118
+
*
119
+
* Returns: 0 if success, error otherwise.
120
+
*/
121
+
static inline int mmap_file(struct file *file, struct vm_area_struct *vma)
122
+
{
123
+
int err = call_mmap(file, vma);
124
+
125
+
if (likely(!err))
126
+
return 0;
127
+
128
+
/*
129
+
* OK, we tried to call the file hook for mmap(), but an error
130
+
* arose. The mapping is in an inconsistent state and we most not invoke
131
+
* any further hooks on it.
132
+
*/
133
+
vma->vm_ops = &vma_dummy_vm_ops;
134
+
135
+
return err;
136
+
}
137
+
138
+
/*
139
+
* If the VMA has a close hook then close it, and since closing it might leave
140
+
* it in an inconsistent state which makes the use of any hooks suspect, clear
141
+
* them down by installing dummy empty hooks.
142
+
*/
143
+
static inline void vma_close(struct vm_area_struct *vma)
144
+
{
145
+
if (vma->vm_ops && vma->vm_ops->close) {
146
+
vma->vm_ops->close(vma);
147
+
148
+
/*
149
+
* The mapping is in an inconsistent state, and no further hooks
150
+
* may be invoked upon it.
151
+
*/
152
+
vma->vm_ops = &vma_dummy_vm_ops;
153
+
}
154
+
}
155
+
111
156
#ifdef CONFIG_MMU
112
157
113
158
/* Flags for folio_pte_batch(). */
···
684
639
#endif
685
640
}
686
641
687
-
void __folio_undo_large_rmappable(struct folio *folio);
688
-
static inline void folio_undo_large_rmappable(struct folio *folio)
642
+
bool __folio_unqueue_deferred_split(struct folio *folio);
643
+
static inline bool folio_unqueue_deferred_split(struct folio *folio)
689
644
{
690
645
if (folio_order(folio) <= 1 || !folio_test_large_rmappable(folio))
691
-
return;
646
+
return false;
692
647
693
648
/*
694
649
* At this point, there is no one trying to add the folio to
···
696
651
* to check without acquiring the split_queue_lock.
697
652
*/
698
653
if (data_race(list_empty(&folio->_deferred_list)))
699
-
return;
654
+
return false;
700
655
701
-
__folio_undo_large_rmappable(folio);
656
+
return __folio_unqueue_deferred_split(folio);
702
657
}
703
658
704
659
static inline struct folio *page_rmappable_folio(struct page *page)
+25
mm/memcontrol-v1.c
+25
mm/memcontrol-v1.c
···
848
848
css_get(&to->css);
849
849
css_put(&from->css);
850
850
851
+
/* Warning should never happen, so don't worry about refcount non-0 */
852
+
WARN_ON_ONCE(folio_unqueue_deferred_split(folio));
851
853
folio->memcg_data = (unsigned long)to;
852
854
853
855
__folio_memcg_unlock(from);
···
1219
1217
enum mc_target_type target_type;
1220
1218
union mc_target target;
1221
1219
struct folio *folio;
1220
+
bool tried_split_before = false;
1222
1221
1222
+
retry_pmd:
1223
1223
ptl = pmd_trans_huge_lock(pmd, vma);
1224
1224
if (ptl) {
1225
1225
if (mc.precharge < HPAGE_PMD_NR) {
···
1231
1227
target_type = get_mctgt_type_thp(vma, addr, *pmd, &target);
1232
1228
if (target_type == MC_TARGET_PAGE) {
1233
1229
folio = target.folio;
1230
+
/*
1231
+
* Deferred split queue locking depends on memcg,
1232
+
* and unqueue is unsafe unless folio refcount is 0:
1233
+
* split or skip if on the queue? first try to split.
1234
+
*/
1235
+
if (!list_empty(&folio->_deferred_list)) {
1236
+
spin_unlock(ptl);
1237
+
if (!tried_split_before)
1238
+
split_folio(folio);
1239
+
folio_unlock(folio);
1240
+
folio_put(folio);
1241
+
if (tried_split_before)
1242
+
return 0;
1243
+
tried_split_before = true;
1244
+
goto retry_pmd;
1245
+
}
1246
+
/*
1247
+
* So long as that pmd lock is held, the folio cannot
1248
+
* be racily added to the _deferred_list, because
1249
+
* __folio_remove_rmap() will find !partially_mapped.
1250
+
*/
1234
1251
if (folio_isolate_lru(folio)) {
1235
1252
if (!mem_cgroup_move_account(folio, true,
1236
1253
mc.from, mc.to)) {
+5
-4
mm/memcontrol.c
+5
-4
mm/memcontrol.c
···
4629
4629
struct obj_cgroup *objcg;
4630
4630
4631
4631
VM_BUG_ON_FOLIO(folio_test_lru(folio), folio);
4632
-
VM_BUG_ON_FOLIO(folio_order(folio) > 1 &&
4633
-
!folio_test_hugetlb(folio) &&
4634
-
!list_empty(&folio->_deferred_list) &&
4635
-
folio_test_partially_mapped(folio), folio);
4636
4632
4637
4633
/*
4638
4634
* Nobody should be changing or seriously looking at
···
4675
4679
ug->nr_memory += nr_pages;
4676
4680
ug->pgpgout++;
4677
4681
4682
+
WARN_ON_ONCE(folio_unqueue_deferred_split(folio));
4678
4683
folio->memcg_data = 0;
4679
4684
}
4680
4685
···
4787
4790
4788
4791
/* Transfer the charge and the css ref */
4789
4792
commit_charge(new, memcg);
4793
+
4794
+
/* Warning should never happen, so don't worry about refcount non-0 */
4795
+
WARN_ON_ONCE(folio_unqueue_deferred_split(old));
4790
4796
old->memcg_data = 0;
4791
4797
}
4792
4798
···
4976
4976
VM_BUG_ON_FOLIO(oldid, folio);
4977
4977
mod_memcg_state(swap_memcg, MEMCG_SWAP, nr_entries);
4978
4978
4979
+
folio_unqueue_deferred_split(folio);
4979
4980
folio->memcg_data = 0;
4980
4981
4981
4982
if (!mem_cgroup_is_root(memcg))
+2
-2
mm/migrate.c
+2
-2
mm/migrate.c
···
490
490
folio_test_large_rmappable(folio)) {
491
491
if (!folio_ref_freeze(folio, expected_count))
492
492
return -EAGAIN;
493
-
folio_undo_large_rmappable(folio);
493
+
folio_unqueue_deferred_split(folio);
494
494
folio_ref_unfreeze(folio, expected_count);
495
495
}
496
496
···
515
515
}
516
516
517
517
/* Take off deferred split queue while frozen and memcg set */
518
-
folio_undo_large_rmappable(folio);
518
+
folio_unqueue_deferred_split(folio);
519
519
520
520
/*
521
521
* Now we know that no one else is looking at the folio:
+6
-3
mm/mlock.c
+6
-3
mm/mlock.c
···
725
725
}
726
726
727
727
for_each_vma(vmi, vma) {
728
+
int error;
728
729
vm_flags_t newflags;
729
730
730
731
newflags = vma->vm_flags & ~VM_LOCKED_MASK;
731
732
newflags |= to_add;
732
733
733
-
/* Ignore errors */
734
-
mlock_fixup(&vmi, vma, &prev, vma->vm_start, vma->vm_end,
735
-
newflags);
734
+
error = mlock_fixup(&vmi, vma, &prev, vma->vm_start, vma->vm_end,
735
+
newflags);
736
+
/* Ignore errors, but prev needs fixing up. */
737
+
if (error)
738
+
prev = vma;
736
739
cond_resched();
737
740
}
738
741
out:
+70
-60
mm/mmap.c
+70
-60
mm/mmap.c
···
344
344
* to. we assume access permissions have been handled by the open
345
345
* of the memory object, so we don't do any here.
346
346
*/
347
-
vm_flags |= calc_vm_prot_bits(prot, pkey) | calc_vm_flag_bits(flags) |
347
+
vm_flags |= calc_vm_prot_bits(prot, pkey) | calc_vm_flag_bits(file, flags) |
348
348
mm->def_flags | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC;
349
349
350
350
/* Obtain the address to map to. we verify (or select) it and ensure
···
1358
1358
return do_vmi_munmap(&vmi, mm, start, len, uf, false);
1359
1359
}
1360
1360
1361
-
unsigned long mmap_region(struct file *file, unsigned long addr,
1361
+
static unsigned long __mmap_region(struct file *file, unsigned long addr,
1362
1362
unsigned long len, vm_flags_t vm_flags, unsigned long pgoff,
1363
1363
struct list_head *uf)
1364
1364
{
1365
1365
struct mm_struct *mm = current->mm;
1366
1366
struct vm_area_struct *vma = NULL;
1367
1367
pgoff_t pglen = PHYS_PFN(len);
1368
-
struct vm_area_struct *merge;
1369
1368
unsigned long charged = 0;
1370
1369
struct vma_munmap_struct vms;
1371
1370
struct ma_state mas_detach;
1372
1371
struct maple_tree mt_detach;
1373
1372
unsigned long end = addr + len;
1374
-
bool writable_file_mapping = false;
1375
1373
int error;
1376
1374
VMA_ITERATOR(vmi, mm, addr);
1377
1375
VMG_STATE(vmg, mm, &vmi, addr, end, vm_flags, pgoff);
···
1420
1422
/*
1421
1423
* clear PTEs while the vma is still in the tree so that rmap
1422
1424
* cannot race with the freeing later in the truncate scenario.
1423
-
* This is also needed for call_mmap(), which is why vm_ops
1425
+
* This is also needed for mmap_file(), which is why vm_ops
1424
1426
* close function is called.
1425
1427
*/
1426
1428
vms_clean_up_area(&vms, &mas_detach);
···
1443
1445
vm_flags_init(vma, vm_flags);
1444
1446
vma->vm_page_prot = vm_get_page_prot(vm_flags);
1445
1447
1448
+
if (vma_iter_prealloc(&vmi, vma)) {
1449
+
error = -ENOMEM;
1450
+
goto free_vma;
1451
+
}
1452
+
1446
1453
if (file) {
1447
1454
vma->vm_file = get_file(file);
1448
-
error = call_mmap(file, vma);
1455
+
error = mmap_file(file, vma);
1449
1456
if (error)
1450
-
goto unmap_and_free_vma;
1457
+
goto unmap_and_free_file_vma;
1451
1458
1452
-
if (vma_is_shared_maywrite(vma)) {
1453
-
error = mapping_map_writable(file->f_mapping);
1454
-
if (error)
1455
-
goto close_and_free_vma;
1456
-
1457
-
writable_file_mapping = true;
1458
-
}
1459
-
1459
+
/* Drivers cannot alter the address of the VMA. */
1460
+
WARN_ON_ONCE(addr != vma->vm_start);
1460
1461
/*
1461
-
* Expansion is handled above, merging is handled below.
1462
-
* Drivers should not alter the address of the VMA.
1462
+
* Drivers should not permit writability when previously it was
1463
+
* disallowed.
1463
1464
*/
1464
-
if (WARN_ON((addr != vma->vm_start))) {
1465
-
error = -EINVAL;
1466
-
goto close_and_free_vma;
1467
-
}
1465
+
VM_WARN_ON_ONCE(vm_flags != vma->vm_flags &&
1466
+
!(vm_flags & VM_MAYWRITE) &&
1467
+
(vma->vm_flags & VM_MAYWRITE));
1468
1468
1469
1469
vma_iter_config(&vmi, addr, end);
1470
1470
/*
1471
-
* If vm_flags changed after call_mmap(), we should try merge
1471
+
* If vm_flags changed after mmap_file(), we should try merge
1472
1472
* vma again as we may succeed this time.
1473
1473
*/
1474
1474
if (unlikely(vm_flags != vma->vm_flags && vmg.prev)) {
1475
+
struct vm_area_struct *merge;
1476
+
1475
1477
vmg.flags = vma->vm_flags;
1476
1478
/* If this fails, state is reset ready for a reattempt. */
1477
1479
merge = vma_merge_new_range(&vmg);
···
1489
1491
vma = merge;
1490
1492
/* Update vm_flags to pick up the change. */
1491
1493
vm_flags = vma->vm_flags;
1492
-
goto unmap_writable;
1494
+
goto file_expanded;
1493
1495
}
1494
1496
vma_iter_config(&vmi, addr, end);
1495
1497
}
···
1498
1500
} else if (vm_flags & VM_SHARED) {
1499
1501
error = shmem_zero_setup(vma);
1500
1502
if (error)
1501
-
goto free_vma;
1503
+
goto free_iter_vma;
1502
1504
} else {
1503
1505
vma_set_anonymous(vma);
1504
1506
}
1505
1507
1506
-
if (map_deny_write_exec(vma, vma->vm_flags)) {
1507
-
error = -EACCES;
1508
-
goto close_and_free_vma;
1509
-
}
1510
-
1511
-
/* Allow architectures to sanity-check the vm_flags */
1512
-
if (!arch_validate_flags(vma->vm_flags)) {
1513
-
error = -EINVAL;
1514
-
goto close_and_free_vma;
1515
-
}
1516
-
1517
-
if (vma_iter_prealloc(&vmi, vma)) {
1518
-
error = -ENOMEM;
1519
-
goto close_and_free_vma;
1520
-
}
1508
+
#ifdef CONFIG_SPARC64
1509
+
/* TODO: Fix SPARC ADI! */
1510
+
WARN_ON_ONCE(!arch_validate_flags(vm_flags));
1511
+
#endif
1521
1512
1522
1513
/* Lock the VMA since it is modified after insertion into VMA tree */
1523
1514
vma_start_write(vma);
···
1520
1533
*/
1521
1534
khugepaged_enter_vma(vma, vma->vm_flags);
1522
1535
1523
-
/* Once vma denies write, undo our temporary denial count */
1524
-
unmap_writable:
1525
-
if (writable_file_mapping)
1526
-
mapping_unmap_writable(file->f_mapping);
1536
+
file_expanded:
1527
1537
file = vma->vm_file;
1528
1538
ksm_add_vma(vma);
1529
1539
expanded:
···
1553
1569
1554
1570
vma_set_page_prot(vma);
1555
1571
1556
-
validate_mm(mm);
1557
1572
return addr;
1558
1573
1559
-
close_and_free_vma:
1560
-
if (file && !vms.closed_vm_ops && vma->vm_ops && vma->vm_ops->close)
1561
-
vma->vm_ops->close(vma);
1574
+
unmap_and_free_file_vma:
1575
+
fput(vma->vm_file);
1576
+
vma->vm_file = NULL;
1562
1577
1563
-
if (file || vma->vm_file) {
1564
-
unmap_and_free_vma:
1565
-
fput(vma->vm_file);
1566
-
vma->vm_file = NULL;
1567
-
1568
-
vma_iter_set(&vmi, vma->vm_end);
1569
-
/* Undo any partial mapping done by a device driver. */
1570
-
unmap_region(&vmi.mas, vma, vmg.prev, vmg.next);
1571
-
}
1572
-
if (writable_file_mapping)
1573
-
mapping_unmap_writable(file->f_mapping);
1578
+
vma_iter_set(&vmi, vma->vm_end);
1579
+
/* Undo any partial mapping done by a device driver. */
1580
+
unmap_region(&vmi.mas, vma, vmg.prev, vmg.next);
1581
+
free_iter_vma:
1582
+
vma_iter_free(&vmi);
1574
1583
free_vma:
1575
1584
vm_area_free(vma);
1576
1585
unacct_error:
···
1573
1596
abort_munmap:
1574
1597
vms_abort_munmap_vmas(&vms, &mas_detach);
1575
1598
gather_failed:
1576
-
validate_mm(mm);
1577
1599
return error;
1600
+
}
1601
+
1602
+
unsigned long mmap_region(struct file *file, unsigned long addr,
1603
+
unsigned long len, vm_flags_t vm_flags, unsigned long pgoff,
1604
+
struct list_head *uf)
1605
+
{
1606
+
unsigned long ret;
1607
+
bool writable_file_mapping = false;
1608
+
1609
+
/* Check to see if MDWE is applicable. */
1610
+
if (map_deny_write_exec(vm_flags, vm_flags))
1611
+
return -EACCES;
1612
+
1613
+
/* Allow architectures to sanity-check the vm_flags. */
1614
+
if (!arch_validate_flags(vm_flags))
1615
+
return -EINVAL;
1616
+
1617
+
/* Map writable and ensure this isn't a sealed memfd. */
1618
+
if (file && is_shared_maywrite(vm_flags)) {
1619
+
int error = mapping_map_writable(file->f_mapping);
1620
+
1621
+
if (error)
1622
+
return error;
1623
+
writable_file_mapping = true;
1624
+
}
1625
+
1626
+
ret = __mmap_region(file, addr, len, vm_flags, pgoff, uf);
1627
+
1628
+
/* Clear our write mapping regardless of error. */
1629
+
if (writable_file_mapping)
1630
+
mapping_unmap_writable(file->f_mapping);
1631
+
1632
+
validate_mm(current->mm);
1633
+
return ret;
1578
1634
}
1579
1635
1580
1636
static int __vm_munmap(unsigned long start, size_t len, bool unlock)
···
1944
1934
do {
1945
1935
if (vma->vm_flags & VM_ACCOUNT)
1946
1936
nr_accounted += vma_pages(vma);
1947
-
remove_vma(vma, /* unreachable = */ true, /* closed = */ false);
1937
+
remove_vma(vma, /* unreachable = */ true);
1948
1938
count++;
1949
1939
cond_resched();
1950
1940
vma = vma_next(&vmi);
+1
-1
mm/mprotect.c
+1
-1
mm/mprotect.c
+4
-5
mm/nommu.c
+4
-5
mm/nommu.c
···
589
589
*/
590
590
static void delete_vma(struct mm_struct *mm, struct vm_area_struct *vma)
591
591
{
592
-
if (vma->vm_ops && vma->vm_ops->close)
593
-
vma->vm_ops->close(vma);
592
+
vma_close(vma);
594
593
if (vma->vm_file)
595
594
fput(vma->vm_file);
596
595
put_nommu_region(vma->vm_region);
···
842
843
{
843
844
unsigned long vm_flags;
844
845
845
-
vm_flags = calc_vm_prot_bits(prot, 0) | calc_vm_flag_bits(flags);
846
+
vm_flags = calc_vm_prot_bits(prot, 0) | calc_vm_flag_bits(file, flags);
846
847
847
848
if (!file) {
848
849
/*
···
884
885
{
885
886
int ret;
886
887
887
-
ret = call_mmap(vma->vm_file, vma);
888
+
ret = mmap_file(vma->vm_file, vma);
888
889
if (ret == 0) {
889
890
vma->vm_region->vm_top = vma->vm_region->vm_end;
890
891
return 0;
···
917
918
* happy.
918
919
*/
919
920
if (capabilities & NOMMU_MAP_DIRECT) {
920
-
ret = call_mmap(vma->vm_file, vma);
921
+
ret = mmap_file(vma->vm_file, vma);
921
922
/* shouldn't return success if we're not sharing */
922
923
if (WARN_ON_ONCE(!is_nommu_shared_mapping(vma->vm_flags)))
923
924
ret = -ENOSYS;
+9
-7
mm/page_alloc.c
+9
-7
mm/page_alloc.c
···
635
635
static inline void account_freepages(struct zone *zone, int nr_pages,
636
636
int migratetype)
637
637
{
638
+
lockdep_assert_held(&zone->lock);
639
+
638
640
if (is_migrate_isolate(migratetype))
639
641
return;
640
642
···
644
642
645
643
if (is_migrate_cma(migratetype))
646
644
__mod_zone_page_state(zone, NR_FREE_CMA_PAGES, nr_pages);
645
+
else if (is_migrate_highatomic(migratetype))
646
+
WRITE_ONCE(zone->nr_free_highatomic,
647
+
zone->nr_free_highatomic + nr_pages);
647
648
}
648
649
649
650
/* Used for pages not on another list */
···
966
961
break;
967
962
case 2:
968
963
/* the second tail page: deferred_list overlaps ->mapping */
969
-
if (unlikely(!list_empty(&folio->_deferred_list) &&
970
-
folio_test_partially_mapped(folio))) {
971
-
bad_page(page, "partially mapped folio on deferred list");
964
+
if (unlikely(!list_empty(&folio->_deferred_list))) {
965
+
bad_page(page, "on deferred list");
972
966
goto out;
973
967
}
974
968
break;
···
2686
2682
unsigned long pfn = folio_pfn(folio);
2687
2683
unsigned int order = folio_order(folio);
2688
2684
2689
-
folio_undo_large_rmappable(folio);
2690
2685
if (!free_pages_prepare(&folio->page, order))
2691
2686
continue;
2692
2687
/*
···
3084
3081
3085
3082
/*
3086
3083
* If the caller does not have rights to reserves below the min
3087
-
* watermark then subtract the high-atomic reserves. This will
3088
-
* over-estimate the size of the atomic reserve but it avoids a search.
3084
+
* watermark then subtract the free pages reserved for highatomic.
3089
3085
*/
3090
3086
if (likely(!(alloc_flags & ALLOC_RESERVES)))
3091
-
unusable_free += z->nr_reserved_highatomic;
3087
+
unusable_free += READ_ONCE(z->nr_free_highatomic);
3092
3088
3093
3089
#ifdef CONFIG_CMA
3094
3090
/* If allocation can't use CMA areas don't use free CMA pages */
-3
mm/shmem.c
-3
mm/shmem.c
···
2733
2733
if (ret)
2734
2734
return ret;
2735
2735
2736
-
/* arm64 - allow memory tagging on RAM-based files */
2737
-
vm_flags_set(vma, VM_MTE_ALLOWED);
2738
-
2739
2736
file_accessed(file);
2740
2737
/* This is anonymous shared memory if it is unlinked at the time of mmap */
2741
2738
if (inode->i_nlink)
+20
-11
mm/slab_common.c
+20
-11
mm/slab_common.c
···
380
380
unsigned int usersize,
381
381
void (*ctor)(void *))
382
382
{
383
+
unsigned long mask = 0;
384
+
unsigned int idx;
383
385
kmem_buckets *b;
384
-
int idx;
386
+
387
+
BUILD_BUG_ON(ARRAY_SIZE(kmalloc_caches[KMALLOC_NORMAL]) > BITS_PER_LONG);
385
388
386
389
/*
387
390
* When the separate buckets API is not built in, just return
···
406
403
for (idx = 0; idx < ARRAY_SIZE(kmalloc_caches[KMALLOC_NORMAL]); idx++) {
407
404
char *short_size, *cache_name;
408
405
unsigned int cache_useroffset, cache_usersize;
409
-
unsigned int size;
406
+
unsigned int size, aligned_idx;
410
407
411
408
if (!kmalloc_caches[KMALLOC_NORMAL][idx])
412
409
continue;
···
419
416
if (WARN_ON(!short_size))
420
417
goto fail;
421
418
422
-
cache_name = kasprintf(GFP_KERNEL, "%s-%s", name, short_size + 1);
423
-
if (WARN_ON(!cache_name))
424
-
goto fail;
425
-
426
419
if (useroffset >= size) {
427
420
cache_useroffset = 0;
428
421
cache_usersize = 0;
···
426
427
cache_useroffset = useroffset;
427
428
cache_usersize = min(size - cache_useroffset, usersize);
428
429
}
429
-
(*b)[idx] = kmem_cache_create_usercopy(cache_name, size,
430
+
431
+
aligned_idx = __kmalloc_index(size, false);
432
+
if (!(*b)[aligned_idx]) {
433
+
cache_name = kasprintf(GFP_KERNEL, "%s-%s", name, short_size + 1);
434
+
if (WARN_ON(!cache_name))
435
+
goto fail;
436
+
(*b)[aligned_idx] = kmem_cache_create_usercopy(cache_name, size,
430
437
0, flags, cache_useroffset,
431
438
cache_usersize, ctor);
432
-
kfree(cache_name);
433
-
if (WARN_ON(!(*b)[idx]))
434
-
goto fail;
439
+
kfree(cache_name);
440
+
if (WARN_ON(!(*b)[aligned_idx]))
441
+
goto fail;
442
+
set_bit(aligned_idx, &mask);
443
+
}
444
+
if (idx != aligned_idx)
445
+
(*b)[idx] = (*b)[aligned_idx];
435
446
}
436
447
437
448
return b;
438
449
439
450
fail:
440
-
for (idx = 0; idx < ARRAY_SIZE(kmalloc_caches[KMALLOC_NORMAL]); idx++)
451
+
for_each_set_bit(idx, &mask, ARRAY_SIZE(kmalloc_caches[KMALLOC_NORMAL]))
441
452
kmem_cache_destroy((*b)[idx]);
442
453
kmem_cache_free(kmem_buckets_cache, b);
443
454
+2
-2
mm/swap.c
+2
-2
mm/swap.c
···
121
121
}
122
122
123
123
page_cache_release(folio);
124
-
folio_undo_large_rmappable(folio);
124
+
folio_unqueue_deferred_split(folio);
125
125
mem_cgroup_uncharge(folio);
126
126
free_unref_page(&folio->page, folio_order(folio));
127
127
}
···
988
988
free_huge_folio(folio);
989
989
continue;
990
990
}
991
-
folio_undo_large_rmappable(folio);
991
+
folio_unqueue_deferred_split(folio);
992
992
__page_cache_release(folio, &lruvec, &flags);
993
993
994
994
if (j != i)
+5
-9
mm/vma.c
+5
-9
mm/vma.c
···
323
323
/*
324
324
* Close a vm structure and free it.
325
325
*/
326
-
void remove_vma(struct vm_area_struct *vma, bool unreachable, bool closed)
326
+
void remove_vma(struct vm_area_struct *vma, bool unreachable)
327
327
{
328
328
might_sleep();
329
-
if (!closed && vma->vm_ops && vma->vm_ops->close)
330
-
vma->vm_ops->close(vma);
329
+
vma_close(vma);
331
330
if (vma->vm_file)
332
331
fput(vma->vm_file);
333
332
mpol_put(vma_policy(vma));
···
1114
1115
vms_clear_ptes(vms, mas_detach, true);
1115
1116
mas_set(mas_detach, 0);
1116
1117
mas_for_each(mas_detach, vma, ULONG_MAX)
1117
-
if (vma->vm_ops && vma->vm_ops->close)
1118
-
vma->vm_ops->close(vma);
1119
-
vms->closed_vm_ops = true;
1118
+
vma_close(vma);
1120
1119
}
1121
1120
1122
1121
/*
···
1157
1160
/* Remove and clean up vmas */
1158
1161
mas_set(mas_detach, 0);
1159
1162
mas_for_each(mas_detach, vma, ULONG_MAX)
1160
-
remove_vma(vma, /* = */ false, vms->closed_vm_ops);
1163
+
remove_vma(vma, /* unreachable = */ false);
1161
1164
1162
1165
vm_unacct_memory(vms->nr_accounted);
1163
1166
validate_mm(mm);
···
1681
1684
return new_vma;
1682
1685
1683
1686
out_vma_link:
1684
-
if (new_vma->vm_ops && new_vma->vm_ops->close)
1685
-
new_vma->vm_ops->close(new_vma);
1687
+
vma_close(new_vma);
1686
1688
1687
1689
if (new_vma->vm_file)
1688
1690
fput(new_vma->vm_file);
+2
-4
mm/vma.h
+2
-4
mm/vma.h
···
42
42
int vma_count; /* Number of vmas that will be removed */
43
43
bool unlock; /* Unlock after the munmap */
44
44
bool clear_ptes; /* If there are outstanding PTE to be cleared */
45
-
bool closed_vm_ops; /* call_mmap() was encountered, so vmas may be closed */
46
-
/* 1 byte hole */
45
+
/* 2 byte hole */
47
46
unsigned long nr_pages; /* Number of pages being removed */
48
47
unsigned long locked_vm; /* Number of locked pages */
49
48
unsigned long nr_accounted; /* Number of VM_ACCOUNT pages */
···
197
198
vms->unmap_start = FIRST_USER_ADDRESS;
198
199
vms->unmap_end = USER_PGTABLES_CEILING;
199
200
vms->clear_ptes = false;
200
-
vms->closed_vm_ops = false;
201
201
}
202
202
#endif
203
203
···
267
269
unsigned long start, size_t len, struct list_head *uf,
268
270
bool unlock);
269
271
270
-
void remove_vma(struct vm_area_struct *vma, bool unreachable, bool closed);
272
+
void remove_vma(struct vm_area_struct *vma, bool unreachable);
271
273
272
274
void unmap_region(struct ma_state *mas, struct vm_area_struct *vma,
273
275
struct vm_area_struct *prev, struct vm_area_struct *next);
+2
-2
mm/vmscan.c
+2
-2
mm/vmscan.c
···
1476
1476
*/
1477
1477
nr_reclaimed += nr_pages;
1478
1478
1479
-
folio_undo_large_rmappable(folio);
1479
+
folio_unqueue_deferred_split(folio);
1480
1480
if (folio_batch_add(&free_folios, folio) == 0) {
1481
1481
mem_cgroup_uncharge_folios(&free_folios);
1482
1482
try_to_unmap_flush();
···
1864
1864
if (unlikely(folio_put_testzero(folio))) {
1865
1865
__folio_clear_lru_flags(folio);
1866
1866
1867
-
folio_undo_large_rmappable(folio);
1867
+
folio_unqueue_deferred_split(folio);
1868
1868
if (folio_batch_add(&free_folios, folio) == 0) {
1869
1869
spin_unlock_irq(&lruvec->lru_lock);
1870
1870
mem_cgroup_uncharge_folios(&free_folios);
-1
net/mptcp/mptcp_pm_gen.c
-1
net/mptcp/mptcp_pm_gen.c
+2
-1
net/mptcp/pm_userspace.c
+2
-1
net/mptcp/pm_userspace.c
···
91
91
struct mptcp_pm_addr_entry *addr)
92
92
{
93
93
struct mptcp_pm_addr_entry *entry, *tmp;
94
+
struct sock *sk = (struct sock *)msk;
94
95
95
96
list_for_each_entry_safe(entry, tmp, &msk->pm.userspace_pm_local_addr_list, list) {
96
97
if (mptcp_addresses_equal(&entry->addr, &addr->addr, false)) {
···
99
98
* be used multiple times (e.g. fullmesh mode).
100
99
*/
101
100
list_del_rcu(&entry->list);
102
-
kfree(entry);
101
+
sock_kfree_s(sk, entry, sizeof(*entry));
103
102
msk->pm.local_addr_used--;
104
103
return 0;
105
104
}
+34
-7
net/netfilter/nf_tables_api.c
+34
-7
net/netfilter/nf_tables_api.c
···
1495
1495
INIT_LIST_HEAD(&table->sets);
1496
1496
INIT_LIST_HEAD(&table->objects);
1497
1497
INIT_LIST_HEAD(&table->flowtables);
1498
+
write_pnet(&table->net, net);
1498
1499
table->family = family;
1499
1500
table->flags = flags;
1500
1501
table->handle = ++nft_net->table_handle;
···
11431
11430
}
11432
11431
EXPORT_SYMBOL_GPL(nft_data_dump);
11433
11432
11434
-
int __nft_release_basechain(struct nft_ctx *ctx)
11433
+
static void __nft_release_basechain_now(struct nft_ctx *ctx)
11435
11434
{
11436
11435
struct nft_rule *rule, *nr;
11437
11436
11438
-
if (WARN_ON(!nft_is_base_chain(ctx->chain)))
11437
+
list_for_each_entry_safe(rule, nr, &ctx->chain->rules, list) {
11438
+
list_del(&rule->list);
11439
+
nf_tables_rule_release(ctx, rule);
11440
+
}
11441
+
nf_tables_chain_destroy(ctx->chain);
11442
+
}
11443
+
11444
+
static void nft_release_basechain_rcu(struct rcu_head *head)
11445
+
{
11446
+
struct nft_chain *chain = container_of(head, struct nft_chain, rcu_head);
11447
+
struct nft_ctx ctx = {
11448
+
.family = chain->table->family,
11449
+
.chain = chain,
11450
+
.net = read_pnet(&chain->table->net),
11451
+
};
11452
+
11453
+
__nft_release_basechain_now(&ctx);
11454
+
put_net(ctx.net);
11455
+
}
11456
+
11457
+
int __nft_release_basechain(struct nft_ctx *ctx)
11458
+
{
11459
+
struct nft_rule *rule;
11460
+
11461
+
if (WARN_ON_ONCE(!nft_is_base_chain(ctx->chain)))
11439
11462
return 0;
11440
11463
11441
11464
nf_tables_unregister_hook(ctx->net, ctx->chain->table, ctx->chain);
11442
-
list_for_each_entry_safe(rule, nr, &ctx->chain->rules, list) {
11443
-
list_del(&rule->list);
11465
+
list_for_each_entry(rule, &ctx->chain->rules, list)
11444
11466
nft_use_dec(&ctx->chain->use);
11445
-
nf_tables_rule_release(ctx, rule);
11446
-
}
11467
+
11447
11468
nft_chain_del(ctx->chain);
11448
11469
nft_use_dec(&ctx->table->use);
11449
-
nf_tables_chain_destroy(ctx->chain);
11470
+
11471
+
if (maybe_get_net(ctx->net))
11472
+
call_rcu(&ctx->chain->rcu_head, nft_release_basechain_rcu);
11473
+
else
11474
+
__nft_release_basechain_now(ctx);
11450
11475
11451
11476
return 0;
11452
11477
}
+4
net/rxrpc/conn_client.c
+4
net/rxrpc/conn_client.c
···
516
516
517
517
spin_lock(&local->client_call_lock);
518
518
list_move_tail(&call->wait_link, &bundle->waiting_calls);
519
+
rxrpc_see_call(call, rxrpc_call_see_waiting_call);
519
520
spin_unlock(&local->client_call_lock);
520
521
521
522
if (rxrpc_bundle_has_space(bundle))
···
587
586
_debug("call is waiting");
588
587
ASSERTCMP(call->call_id, ==, 0);
589
588
ASSERT(!test_bit(RXRPC_CALL_EXPOSED, &call->flags));
589
+
/* May still be on ->new_client_calls. */
590
+
spin_lock(&local->client_call_lock);
590
591
list_del_init(&call->wait_link);
592
+
spin_unlock(&local->client_call_lock);
591
593
return;
592
594
}
593
595
+1
-1
net/sctp/sm_statefuns.c
+1
-1
net/sctp/sm_statefuns.c
+3
-1
net/smc/af_smc.c
+3
-1
net/smc/af_smc.c
+2
-6
net/smc/smc_ib.c
+2
-6
net/smc/smc_ib.c
···
899
899
struct ib_device *ibdev = smcibdev->ibdev;
900
900
struct net_device *ndev;
901
901
902
-
if (!ibdev->ops.get_netdev)
903
-
return;
904
-
ndev = ibdev->ops.get_netdev(ibdev, port + 1);
902
+
ndev = ib_device_get_netdev(ibdev, port + 1);
905
903
if (ndev) {
906
904
smcibdev->ndev_ifidx[port] = ndev->ifindex;
907
905
dev_put(ndev);
···
919
921
port_cnt = smcibdev->ibdev->phys_port_cnt;
920
922
for (i = 0; i < min_t(size_t, port_cnt, SMC_MAX_PORTS); i++) {
921
923
libdev = smcibdev->ibdev;
922
-
if (!libdev->ops.get_netdev)
923
-
continue;
924
-
lndev = libdev->ops.get_netdev(libdev, i + 1);
924
+
lndev = ib_device_get_netdev(libdev, i + 1);
925
925
dev_put(lndev);
926
926
if (lndev != ndev)
927
927
continue;
+1
-3
net/smc/smc_pnet.c
+1
-3
net/smc/smc_pnet.c
···
1054
1054
for (i = 1; i <= SMC_MAX_PORTS; i++) {
1055
1055
if (!rdma_is_port_valid(ibdev->ibdev, i))
1056
1056
continue;
1057
-
if (!ibdev->ibdev->ops.get_netdev)
1058
-
continue;
1059
-
ndev = ibdev->ibdev->ops.get_netdev(ibdev->ibdev, i);
1057
+
ndev = ib_device_get_netdev(ibdev->ibdev, i);
1060
1058
if (!ndev)
1061
1059
continue;
1062
1060
dev_put(ndev);
+1
net/sunrpc/xprtsock.c
+1
net/sunrpc/xprtsock.c
+5
-2
security/keys/keyring.c
+5
-2
security/keys/keyring.c
···
772
772
for (; slot < ASSOC_ARRAY_FAN_OUT; slot++) {
773
773
ptr = READ_ONCE(node->slots[slot]);
774
774
775
-
if (assoc_array_ptr_is_meta(ptr) && node->back_pointer)
776
-
goto descend_to_node;
775
+
if (assoc_array_ptr_is_meta(ptr)) {
776
+
if (node->back_pointer ||
777
+
assoc_array_ptr_is_shortcut(ptr))
778
+
goto descend_to_node;
779
+
}
777
780
778
781
if (!keyring_ptr_is_keyring(ptr))
779
782
continue;
+5
-4
security/keys/trusted-keys/trusted_dcp.c
+5
-4
security/keys/trusted-keys/trusted_dcp.c
···
133
133
struct scatterlist src_sg, dst_sg;
134
134
struct crypto_aead *aead;
135
135
int ret;
136
+
DECLARE_CRYPTO_WAIT(wait);
136
137
137
138
aead = crypto_alloc_aead("gcm(aes)", 0, CRYPTO_ALG_ASYNC);
138
139
if (IS_ERR(aead)) {
···
164
163
}
165
164
166
165
aead_request_set_crypt(aead_req, &src_sg, &dst_sg, len, nonce);
167
-
aead_request_set_callback(aead_req, CRYPTO_TFM_REQ_MAY_SLEEP, NULL,
168
-
NULL);
166
+
aead_request_set_callback(aead_req, CRYPTO_TFM_REQ_MAY_SLEEP,
167
+
crypto_req_done, &wait);
169
168
aead_request_set_ad(aead_req, 0);
170
169
171
170
if (crypto_aead_setkey(aead, key, AES_KEYSIZE_128)) {
···
175
174
}
176
175
177
176
if (do_encrypt)
178
-
ret = crypto_aead_encrypt(aead_req);
177
+
ret = crypto_wait_req(crypto_aead_encrypt(aead_req), &wait);
179
178
else
180
-
ret = crypto_aead_decrypt(aead_req);
179
+
ret = crypto_wait_req(crypto_aead_decrypt(aead_req), &wait);
181
180
182
181
free_req:
183
182
aead_request_free(aead_req);
+1
-1
sound/core/ump.c
+1
-1
sound/core/ump.c
+1
-1
sound/firewire/tascam/amdtp-tascam.c
+1
-1
sound/firewire/tascam/amdtp-tascam.c
-2
sound/pci/hda/patch_conexant.c
-2
sound/pci/hda/patch_conexant.c
···
205
205
{
206
206
struct conexant_spec *spec = codec->spec;
207
207
208
-
snd_hda_gen_shutup_speakers(codec);
209
-
210
208
/* Turn the problematic codec into D3 to avoid spurious noises
211
209
from the internal speaker during (and after) reboot */
212
210
cx_auto_turn_eapd(codec, spec->num_eapds, spec->eapds, false);
+14
sound/soc/amd/yc/acp6x-mach.c
+14
sound/soc/amd/yc/acp6x-mach.c
···
231
231
.driver_data = &acp6x_card,
232
232
.matches = {
233
233
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
234
+
DMI_MATCH(DMI_PRODUCT_NAME, "21M4"),
235
+
}
236
+
},
237
+
{
238
+
.driver_data = &acp6x_card,
239
+
.matches = {
240
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
234
241
DMI_MATCH(DMI_PRODUCT_NAME, "21M5"),
235
242
}
236
243
},
···
400
393
.matches = {
401
394
DMI_MATCH(DMI_BOARD_VENDOR, "TIMI"),
402
395
DMI_MATCH(DMI_PRODUCT_NAME, "Redmi Book Pro 15 2022"),
396
+
}
397
+
},
398
+
{
399
+
.driver_data = &acp6x_card,
400
+
.matches = {
401
+
DMI_MATCH(DMI_BOARD_VENDOR, "TIMI"),
402
+
DMI_MATCH(DMI_PRODUCT_NAME, "Xiaomi Book Pro 14 2022"),
403
403
}
404
404
},
405
405
{
+1
sound/soc/codecs/tas2781-fmwlib.c
+1
sound/soc/codecs/tas2781-fmwlib.c
+9
-1
sound/soc/sof/amd/acp.c
+9
-1
sound/soc/sof/amd/acp.c
···
342
342
{
343
343
struct snd_sof_dev *sdev = adata->dev;
344
344
unsigned int val;
345
+
unsigned int acp_dma_ch_sts;
345
346
int ret = 0;
346
347
348
+
switch (adata->pci_rev) {
349
+
case ACP70_PCI_ID:
350
+
acp_dma_ch_sts = ACP70_DMA_CH_STS;
351
+
break;
352
+
default:
353
+
acp_dma_ch_sts = ACP_DMA_CH_STS;
354
+
}
347
355
val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32));
348
356
if (val & ACP_DMA_CH_RUN) {
349
-
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_DMA_CH_STS, val, !val,
357
+
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, acp_dma_ch_sts, val, !val,
350
358
ACP_REG_POLL_INTERVAL,
351
359
ACP_DMA_COMPLETE_TIMEOUT_US);
352
360
if (ret < 0)
+1
sound/soc/sof/sof-client-probes-ipc4.c
+1
sound/soc/sof/sof-client-probes-ipc4.c
···
125
125
msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
126
126
msg.extension = SOF_IPC4_MOD_EXT_DST_MOD_INSTANCE(INVALID_PIPELINE_ID);
127
127
msg.extension |= SOF_IPC4_MOD_EXT_CORE_ID(0);
128
+
msg.extension |= SOF_IPC4_MOD_EXT_PARAM_SIZE(sizeof(cfg) / sizeof(uint32_t));
128
129
129
130
msg.data_size = sizeof(cfg);
130
131
msg.data_ptr = &cfg;
+3
-3
sound/soc/stm/stm32_sai_sub.c
+3
-3
sound/soc/stm/stm32_sai_sub.c
···
317
317
int div;
318
318
319
319
div = DIV_ROUND_CLOSEST(input_rate, output_rate);
320
-
if (div > SAI_XCR1_MCKDIV_MAX(version)) {
320
+
if (div > SAI_XCR1_MCKDIV_MAX(version) || div <= 0) {
321
321
dev_err(&sai->pdev->dev, "Divider %d out of range\n", div);
322
322
return -EINVAL;
323
323
}
···
378
378
int div;
379
379
380
380
div = stm32_sai_get_clk_div(sai, *prate, rate);
381
-
if (div < 0)
382
-
return div;
381
+
if (div <= 0)
382
+
return -EINVAL;
383
383
384
384
mclk->freq = *prate / div;
385
385
+1
-1
sound/soc/stm/stm32_spdifrx.c
+1
-1
sound/soc/stm/stm32_spdifrx.c
+1
sound/usb/mixer.c
+1
sound/usb/mixer.c
···
1205
1205
}
1206
1206
break;
1207
1207
case USB_ID(0x1bcf, 0x2283): /* NexiGo N930AF FHD Webcam */
1208
+
case USB_ID(0x03f0, 0x654a): /* HP 320 FHD Webcam */
1208
1209
if (!strcmp(kctl->id.name, "Mic Capture Volume")) {
1209
1210
usb_audio_info(chip,
1210
1211
"set resolution quirk: cval->res = 16\n");
+2
sound/usb/quirks.c
+2
sound/usb/quirks.c
···
2114
2114
2115
2115
static const struct usb_audio_quirk_flags_table quirk_flags_table[] = {
2116
2116
/* Device matches */
2117
+
DEVICE_FLG(0x03f0, 0x654a, /* HP 320 FHD Webcam */
2118
+
QUIRK_FLAG_GET_SAMPLE_RATE),
2117
2119
DEVICE_FLG(0x041e, 0x3000, /* Creative SB Extigy */
2118
2120
QUIRK_FLAG_IGNORE_CTL_ERROR),
2119
2121
DEVICE_FLG(0x041e, 0x4080, /* Creative Live Cam VF0610 */
+3
-1
tools/lib/thermal/Makefile
+3
-1
tools/lib/thermal/Makefile
···
121
121
122
122
clean:
123
123
$(call QUIET_CLEAN, libthermal) $(RM) $(LIBTHERMAL_A) \
124
-
*.o *~ *.a *.so *.so.$(VERSION) *.so.$(LIBTHERMAL_VERSION) .*.d .*.cmd LIBTHERMAL-CFLAGS $(LIBTHERMAL_PC)
124
+
*.o *~ *.a *.so *.so.$(VERSION) *.so.$(LIBTHERMAL_VERSION) \
125
+
.*.d .*.cmd LIBTHERMAL-CFLAGS $(LIBTHERMAL_PC) \
126
+
$(srctree)/tools/$(THERMAL_UAPI)
125
127
126
128
$(LIBTHERMAL_PC):
127
129
$(QUIET_GEN)sed -e "s|@PREFIX@|$(prefix)|" \
+2
tools/lib/thermal/sampling.c
+2
tools/lib/thermal/sampling.c
+101
tools/testing/selftests/ftrace/test.d/00basic/mount_options.tc
+101
tools/testing/selftests/ftrace/test.d/00basic/mount_options.tc
···
1
+
#!/bin/sh
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
# description: Test tracefs GID mount option
4
+
# requires: "[gid=<gid>]":README
5
+
6
+
fail() {
7
+
local msg="$1"
8
+
9
+
echo "FAILED: $msg"
10
+
exit_fail
11
+
}
12
+
13
+
find_alternate_gid() {
14
+
local original_gid="$1"
15
+
tac /etc/group | grep -v ":$original_gid:" | head -1 | cut -d: -f3
16
+
}
17
+
18
+
mount_tracefs_with_options() {
19
+
local mount_point="$1"
20
+
local options="$2"
21
+
22
+
mount -t tracefs -o "$options" nodev "$mount_point"
23
+
24
+
setup
25
+
}
26
+
27
+
unmount_tracefs() {
28
+
local mount_point="$1"
29
+
30
+
# Need to make sure the mount isn't busy so that we can umount it
31
+
(cd $mount_point; finish_ftrace;)
32
+
33
+
cleanup
34
+
}
35
+
36
+
create_instance() {
37
+
local mount_point="$1"
38
+
local instance="$mount_point/instances/$(mktemp -u test-XXXXXX)"
39
+
40
+
mkdir "$instance"
41
+
echo "$instance"
42
+
}
43
+
44
+
remove_instance() {
45
+
local instance="$1"
46
+
47
+
rmdir "$instance"
48
+
}
49
+
50
+
check_gid() {
51
+
local mount_point="$1"
52
+
local expected_gid="$2"
53
+
54
+
echo "Checking permission group ..."
55
+
56
+
cd "$mount_point"
57
+
58
+
for file in "." "events" "events/sched" "events/sched/sched_switch" "events/sched/sched_switch/enable"; do
59
+
local gid=`stat -c "%g" $file`
60
+
if [ "$gid" -ne "$expected_gid" ]; then
61
+
cd - # Return to the previous working directory (tracefs root)
62
+
fail "$(realpath $file): Expected group $expected_gid; Got group $gid"
63
+
fi
64
+
done
65
+
66
+
cd - # Return to the previous working directory (tracefs root)
67
+
}
68
+
69
+
test_gid_mount_option() {
70
+
local mount_point=$(get_mount_point)
71
+
local mount_options=$(get_mnt_options "$mount_point")
72
+
local original_group=$(stat -c "%g" .)
73
+
local other_group=$(find_alternate_gid "$original_group")
74
+
75
+
# Set up mount options with new GID for testing
76
+
local new_options=`echo "$mount_options" | sed -e "s/gid=[0-9]*/gid=$other_group/"`
77
+
if [ "$new_options" = "$mount_options" ]; then
78
+
new_options="$mount_options,gid=$other_group"
79
+
mount_options="$mount_options,gid=$original_group"
80
+
fi
81
+
82
+
# Unmount existing tracefs instance and mount with new GID
83
+
unmount_tracefs "$mount_point"
84
+
mount_tracefs_with_options "$mount_point" "$new_options"
85
+
86
+
check_gid "$mount_point" "$other_group"
87
+
88
+
# Check that files created after the mount inherit the GID
89
+
local instance=$(create_instance "$mount_point")
90
+
check_gid "$instance" "$other_group"
91
+
remove_instance "$instance"
92
+
93
+
# Unmount and remount with the original GID
94
+
unmount_tracefs "$mount_point"
95
+
mount_tracefs_with_options "$mount_point" "$mount_options"
96
+
check_gid "$mount_point" "$original_group"
97
+
}
98
+
99
+
test_gid_mount_option
100
+
101
+
exit 0
+3
-13
tools/testing/selftests/ftrace/test.d/00basic/test_ownership.tc
+3
-13
tools/testing/selftests/ftrace/test.d/00basic/test_ownership.tc
···
1
1
#!/bin/sh
2
2
# SPDX-License-Identifier: GPL-2.0
3
3
# description: Test file and directory ownership changes for eventfs
4
+
# requires: "[gid=<gid>]":README
4
5
5
6
original_group=`stat -c "%g" .`
6
7
original_owner=`stat -c "%u" .`
7
8
8
-
mount_point=`stat -c '%m' .`
9
+
local mount_point=$(get_mount_point)
9
10
10
-
# If stat -c '%m' does not work (e.g. busybox) or failed, try to use the
11
-
# current working directory (which should be a tracefs) as the mount point.
12
-
if [ ! -d "$mount_point" ]; then
13
-
if mount | grep -qw $PWD ; then
14
-
mount_point=$PWD
15
-
else
16
-
# If PWD doesn't work, that is an environmental problem.
17
-
exit_unresolved
18
-
fi
19
-
fi
20
-
21
-
mount_options=`mount | grep "$mount_point" | sed -e 's/.*(\(.*\)).*/\1/'`
11
+
mount_options=$(get_mnt_options "$mount_point")
22
12
23
13
# find another owner and group that is not the original
24
14
other_group=`tac /etc/group | grep -v ":$original_group:" | head -1 | cut -d: -f3`
+25
tools/testing/selftests/ftrace/test.d/functions
+25
tools/testing/selftests/ftrace/test.d/functions
···
193
193
# " Command: " and "^\n" => 13
194
194
test $(expr 13 + $pos) -eq $N
195
195
}
196
+
197
+
# Helper to get the tracefs mount point
198
+
get_mount_point() {
199
+
local mount_point=`stat -c '%m' .`
200
+
201
+
# If stat -c '%m' does not work (e.g. busybox) or failed, try to use the
202
+
# current working directory (which should be a tracefs) as the mount point.
203
+
if [ ! -d "$mount_point" ]; then
204
+
if mount | grep -qw "$PWD"; then
205
+
mount_point=$PWD
206
+
else
207
+
# If PWD doesn't work, that is an environmental problem.
208
+
exit_unresolved
209
+
fi
210
+
fi
211
+
echo "$mount_point"
212
+
}
213
+
214
+
# Helper function to retrieve mount options for a given mount point
215
+
get_mnt_options() {
216
+
local mnt_point="$1"
217
+
local opts=$(mount | grep -m1 "$mnt_point" | sed -e 's/.*(\(.*\)).*/\1/')
218
+
219
+
echo "$opts"
220
+
}
+12
-7
tools/testing/selftests/mm/hugetlb_dio.c
+12
-7
tools/testing/selftests/mm/hugetlb_dio.c
···
44
44
if (fd < 0)
45
45
ksft_exit_fail_perror("Error opening file\n");
46
46
47
-
/* Get the free huge pages before allocation */
48
-
free_hpage_b = get_free_hugepages();
49
-
if (free_hpage_b == 0) {
50
-
close(fd);
51
-
ksft_exit_skip("No free hugepage, exiting!\n");
52
-
}
53
-
54
47
/* Allocate a hugetlb page */
55
48
orig_buffer = mmap(NULL, h_pagesize, mmap_prot, mmap_flags, -1, 0);
56
49
if (orig_buffer == MAP_FAILED) {
···
87
94
int main(void)
88
95
{
89
96
size_t pagesize = 0;
97
+
int fd;
90
98
91
99
ksft_print_header();
100
+
101
+
/* Open the file to DIO */
102
+
fd = open("/tmp", O_TMPFILE | O_RDWR | O_DIRECT, 0664);
103
+
if (fd < 0)
104
+
ksft_exit_skip("Unable to allocate file: %s\n", strerror(errno));
105
+
close(fd);
106
+
107
+
/* Check if huge pages are free */
108
+
if (!get_free_hugepages())
109
+
ksft_exit_skip("No free hugepage, exiting\n");
110
+
92
111
ksft_set_plan(4);
93
112
94
113
/* Get base page size */