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RDMA/hns: Add bonding cmds

Add three bonding cmds to configure bonding settings to HW.

Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Link: https://patch.msgid.link/20251112093510.3696363-5-huangjunxian6@hisilicon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

authored by

Junxian Huang and committed by
Leon Romanovsky
14f0455e d31d410b

+108
+20
drivers/infiniband/hw/hns/hns_roce_bond.h
··· 14 14 15 15 #define BOND_ID(id) BIT(id) 16 16 17 + enum { 18 + BOND_MODE_1, 19 + BOND_MODE_2_4, 20 + }; 21 + 22 + enum hns_roce_bond_hashtype { 23 + BOND_HASH_L2, 24 + BOND_HASH_L34, 25 + BOND_HASH_L23, 26 + }; 27 + 17 28 enum bond_support_type { 18 29 BOND_NOT_SUPPORT, 19 30 /* ··· 43 32 HNS_ROCE_BOND_SLAVE_CHANGESTATE, 44 33 }; 45 34 35 + enum hns_roce_bond_cmd_type { 36 + HNS_ROCE_SET_BOND, 37 + HNS_ROCE_CHANGE_BOND, 38 + HNS_ROCE_CLEAR_BOND, 39 + }; 40 + 46 41 struct hns_roce_func_info { 47 42 struct net_device *net_dev; 48 43 struct hnae3_handle *handle; ··· 57 40 struct hns_roce_bond_group { 58 41 struct net_device *upper_dev; 59 42 struct hns_roce_dev *main_hr_dev; 43 + u8 active_slave_num; 44 + u32 slave_map; 45 + u32 active_slave_map; 60 46 u8 bond_id; 61 47 u8 bus_num; 62 48 struct hns_roce_func_info bond_func_info[ROCE_BOND_FUNC_MAX];
+73
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
··· 1431 1431 return ret; 1432 1432 } 1433 1433 1434 + static enum hns_roce_opcode_type 1435 + get_bond_opcode(enum hns_roce_bond_cmd_type bond_type) 1436 + { 1437 + switch (bond_type) { 1438 + case HNS_ROCE_SET_BOND: 1439 + return HNS_ROCE_OPC_SET_BOND_INFO; 1440 + case HNS_ROCE_CHANGE_BOND: 1441 + return HNS_ROCE_OPC_CHANGE_ACTIVE_PORT; 1442 + case HNS_ROCE_CLEAR_BOND: 1443 + return HNS_ROCE_OPC_CLEAR_BOND_INFO; 1444 + default: 1445 + WARN(true, "Invalid bond type %d!\n", bond_type); 1446 + return HNS_ROCE_OPC_SET_BOND_INFO; 1447 + } 1448 + } 1449 + 1450 + static enum hns_roce_bond_hashtype 1451 + get_bond_hashtype(enum netdev_lag_hash netdev_hashtype) 1452 + { 1453 + switch (netdev_hashtype) { 1454 + case NETDEV_LAG_HASH_L2: 1455 + return BOND_HASH_L2; 1456 + case NETDEV_LAG_HASH_L34: 1457 + return BOND_HASH_L34; 1458 + case NETDEV_LAG_HASH_L23: 1459 + return BOND_HASH_L23; 1460 + default: 1461 + WARN(true, "Invalid hash type %d!\n", netdev_hashtype); 1462 + return BOND_HASH_L2; 1463 + } 1464 + } 1465 + 1466 + int hns_roce_cmd_bond(struct hns_roce_bond_group *bond_grp, 1467 + enum hns_roce_bond_cmd_type bond_type) 1468 + { 1469 + enum hns_roce_opcode_type opcode = get_bond_opcode(bond_type); 1470 + struct hns_roce_bond_info *slave_info; 1471 + struct hns_roce_cmq_desc desc = {}; 1472 + int ret; 1473 + 1474 + slave_info = (struct hns_roce_bond_info *)desc.data; 1475 + hns_roce_cmq_setup_basic_desc(&desc, opcode, false); 1476 + 1477 + slave_info->bond_id = cpu_to_le32(bond_grp->bond_id); 1478 + if (bond_type == HNS_ROCE_CLEAR_BOND) 1479 + goto out; 1480 + 1481 + if (bond_grp->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) { 1482 + slave_info->bond_mode = cpu_to_le32(BOND_MODE_1); 1483 + if (bond_grp->active_slave_num != 1) 1484 + ibdev_warn(&bond_grp->main_hr_dev->ib_dev, 1485 + "active slave cnt(%u) in Mode 1 is invalid.\n", 1486 + bond_grp->active_slave_num); 1487 + } else { 1488 + slave_info->bond_mode = cpu_to_le32(BOND_MODE_2_4); 1489 + slave_info->hash_policy = 1490 + cpu_to_le32(get_bond_hashtype(bond_grp->hash_type)); 1491 + } 1492 + 1493 + slave_info->active_slave_cnt = cpu_to_le32(bond_grp->active_slave_num); 1494 + slave_info->active_slave_mask = cpu_to_le32(bond_grp->active_slave_map); 1495 + slave_info->slave_mask = cpu_to_le32(bond_grp->slave_map); 1496 + 1497 + out: 1498 + ret = hns_roce_cmq_send(bond_grp->main_hr_dev, &desc, 1); 1499 + if (ret) 1500 + ibdev_err(&bond_grp->main_hr_dev->ib_dev, 1501 + "cmq bond type(%d) failed, ret = %d.\n", 1502 + bond_type, ret); 1503 + 1504 + return ret; 1505 + } 1506 + 1434 1507 static int config_hem_ba_to_hw(struct hns_roce_dev *hr_dev, 1435 1508 dma_addr_t base_addr, u8 cmd, unsigned long tag) 1436 1509 {
+15
drivers/infiniband/hw/hns/hns_roce_hw_v2.h
··· 35 35 36 36 #include <linux/bitops.h> 37 37 #include "hnae3.h" 38 + #include "hns_roce_bond.h" 38 39 39 40 #define HNS_ROCE_V2_MAX_RC_INL_INN_SZ 32 40 41 #define HNS_ROCE_V2_MTT_ENTRY_SZ 64 ··· 229 228 HNS_ROCE_OPC_CFG_GMV_BT = 0x8510, 230 229 HNS_ROCE_QUERY_RAM_ECC = 0x8513, 231 230 HNS_SWITCH_PARAMETER_CFG = 0x1033, 231 + HNS_ROCE_OPC_SET_BOND_INFO = 0x8601, 232 + HNS_ROCE_OPC_CLEAR_BOND_INFO = 0x8602, 233 + HNS_ROCE_OPC_CHANGE_ACTIVE_PORT = 0x8603, 232 234 }; 233 235 234 236 #define HNS_ROCE_OPC_POST_MB_TIMEOUT 35000 ··· 1469 1465 __le32 rsv[5]; 1470 1466 }; 1471 1467 1468 + struct hns_roce_bond_info { 1469 + __le32 bond_id; 1470 + __le32 bond_mode; 1471 + __le32 active_slave_cnt; 1472 + __le32 active_slave_mask; 1473 + __le32 slave_mask; 1474 + __le32 hash_policy; 1475 + }; 1476 + 1472 1477 int hns_roce_v2_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata); 1478 + int hns_roce_cmd_bond(struct hns_roce_bond_group *bond_grp, 1479 + enum hns_roce_bond_cmd_type bond_type); 1473 1480 1474 1481 static inline void hns_roce_write64(struct hns_roce_dev *hr_dev, __le32 val[2], 1475 1482 void __iomem *dest)