Merge tag 'irq-urgent-2022-04-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
"A set of interrupt chip driver fixes:

- A fix for a long standing bug in the ARM GICv3 redistributor
polling which uses the wrong bit number to test.

- Prevent translation of bogus ACPI table entries which map device
interrupts into the IPI space on ARM GICs.

- Don't write into the pending register of ARM GICV4 before the scan
in hardware has completed.

- A set of build and correctness fixes for the Qualcomm MPM driver"

* tag 'irq-urgent-2022-04-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/gic, gic-v3: Prevent GSI to SGI translations
irqchip/gic-v3: Fix GICR_CTLR.RWP polling
irqchip/gic-v4: Wait for GICR_VPENDBASER.Dirty to clear before descheduling
irqchip/irq-qcom-mpm: fix return value check in qcom_mpm_init()
irq/qcom-mpm: Fix build error without MAILBOX

Linus Torvalds 4 years ago 1519610b 9c6913b7

+37 -14

5 changed files

expand all

drivers

irqchip

Kconfig

irq-gic-v3-its.c

irq-gic-v3.c

irq-gic.c

irq-qcom-mpm.c

drivers/irqchip/Kconfig

··· 433 433 config QCOM_MPM 434 434 tristate "QCOM MPM" 435 435 depends on ARCH_QCOM 436 + depends on MAILBOX 436 437 select IRQ_DOMAIN_HIERARCHY 437 438 help 438 439 MSM Power Manager driver to manage and configure wakeup

+19 -9

drivers/irqchip/irq-gic-v3-its.c

··· 3011 3011 return 0; 3012 3012 } 3013 3013 3014 - static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 3014 + static u64 read_vpend_dirty_clear(void __iomem *vlpi_base) 3015 3015 { 3016 3016 u32 count = 1000000; /* 1s! */ 3017 3017 bool clean; 3018 3018 u64 val; 3019 - 3020 - val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 3021 - val &= ~GICR_VPENDBASER_Valid; 3022 - val &= ~clr; 3023 - val |= set; 3024 - gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3025 3019 3026 3020 do { 3027 3021 val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); ··· 3027 3033 } 3028 3034 } while (!clean && count); 3029 3035 3030 - if (unlikely(val & GICR_VPENDBASER_Dirty)) { 3036 + if (unlikely(!clean)) 3031 3037 pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3038 + 3039 + return val; 3040 + } 3041 + 3042 + static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 3043 + { 3044 + u64 val; 3045 + 3046 + /* Make sure we wait until the RD is done with the initial scan */ 3047 + val = read_vpend_dirty_clear(vlpi_base); 3048 + val &= ~GICR_VPENDBASER_Valid; 3049 + val &= ~clr; 3050 + val |= set; 3051 + gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3052 + 3053 + val = read_vpend_dirty_clear(vlpi_base); 3054 + if (unlikely(val & GICR_VPENDBASER_Dirty)) 3032 3055 val |= GICR_VPENDBASER_PendingLast; 3033 - } 3034 3056 3035 3057 return val; 3036 3058 }

+10 -4

drivers/irqchip/irq-gic-v3.c

··· 206 206 } 207 207 } 208 208 209 - static void gic_do_wait_for_rwp(void __iomem *base) 209 + static void gic_do_wait_for_rwp(void __iomem *base, u32 bit) 210 210 { 211 211 u32 count = 1000000; /* 1s! */ 212 212 213 - while (readl_relaxed(base + GICD_CTLR) & GICD_CTLR_RWP) { 213 + while (readl_relaxed(base + GICD_CTLR) & bit) { 214 214 count--; 215 215 if (!count) { 216 216 pr_err_ratelimited("RWP timeout, gone fishing\n"); ··· 224 224 /* Wait for completion of a distributor change */ 225 225 static void gic_dist_wait_for_rwp(void) 226 226 { 227 - gic_do_wait_for_rwp(gic_data.dist_base); 227 + gic_do_wait_for_rwp(gic_data.dist_base, GICD_CTLR_RWP); 228 228 } 229 229 230 230 /* Wait for completion of a redistributor change */ 231 231 static void gic_redist_wait_for_rwp(void) 232 232 { 233 - gic_do_wait_for_rwp(gic_data_rdist_rd_base()); 233 + gic_do_wait_for_rwp(gic_data_rdist_rd_base(), GICR_CTLR_RWP); 234 234 } 235 235 236 236 #ifdef CONFIG_ARM64 ··· 1465 1465 if (is_fwnode_irqchip(fwspec->fwnode)) { 1466 1466 if(fwspec->param_count != 2) 1467 1467 return -EINVAL; 1468 + 1469 + if (fwspec->param[0] < 16) { 1470 + pr_err(FW_BUG "Illegal GSI%d translation request\n", 1471 + fwspec->param[0]); 1472 + return -EINVAL; 1473 + } 1468 1474 1469 1475 *hwirq = fwspec->param[0]; 1470 1476 *type = fwspec->param[1];

drivers/irqchip/irq-gic.c

··· 1123 1123 if(fwspec->param_count != 2) 1124 1124 return -EINVAL; 1125 1125 1126 + if (fwspec->param[0] < 16) { 1127 + pr_err(FW_BUG "Illegal GSI%d translation request\n", 1128 + fwspec->param[0]); 1129 + return -EINVAL; 1130 + } 1131 + 1126 1132 *hwirq = fwspec->param[0]; 1127 1133 *type = fwspec->param[1]; 1128 1134

+1 -1

drivers/irqchip/irq-qcom-mpm.c

··· 375 375 raw_spin_lock_init(&priv->lock); 376 376 377 377 priv->base = devm_platform_ioremap_resource(pdev, 0); 378 - if (!priv->base) 378 + if (IS_ERR(priv->base)) 379 379 return PTR_ERR(priv->base); 380 380 381 381 for (i = 0; i < priv->reg_stride; i++) {

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